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SIGARCH Computer Architecture News 17(2), SIGOPS Operating System Review 23(Special Issue April 1989), and SIGPLAN Notices 24(Special Issue May 1989)

• 
  Robert Cohn, Thomas R. Gross, Monica Lam, P. S. Tseng:
  Architecture and Compiler Tradeoffs for a Long Instruction Word Microprocessor. 2-14
• 
  Gurindar S. Sohi, Sriram Vajapeyam:
  Tradeoffs in Instruction Format Design for Horizontal Architectures. 15-25
• 
  James C. Dehnert, Peter Y.-T. Hsu, Joseph P. Bratt:
  Overlapped Loop Support in the Cydra 5. 26-38

• 
  Forbes J. Burkowski, Gordon V. Cormack, G. D. P. Dueck:
  Architectural Support for Synchronous Task Communication. 40-53
• 
  Rajiv Gupta:
  The Fuzzy Barrier: A Mechanism for High Speed Synchronization of Processors. 54-63
• 
  James R. Goodman, Mary K. Vernon, Philip J. Woest:
  Efficent Synchronization Primitives for Large-Scale Cache-Coherent Multiprocessors. 64-75

• 
  John M. Mellor-Crummey, Thomas J. LeBlanc:
  A Software Instruction Counter. 78-86
• 
  Ziya Aral, Ilya Gertner, Greg Schaffer:
  Efficient Debugging Primitives for Multiprocessors. 87-95
• 
  Mark E. Staknis:
  Sheaved Memory: Architectural Support for State Saving and Restoration in Paged Systems. 96-102

• 
  Mark A. Holliday:
  Reference History, Page Size, and Migration Daemons in Local/Remote Architectures. 104-112
• 
  David L. Black, Richard F. Rashid, David B. Golub, Charles R. Hill, Robert V. Baron:
  Translation Lookaside Buffer Consistency: A Software Approach. 113-122
• 
  Garth A. Gibson, Lisa Hellerstein, Richard M. Karp, Randy H. Katz, David A. Patterson:
  Failure Correction Techniques for Large Disk Arrays. 123-132

• 
  Norman P. Jouppi, Jonathan Bertoni, David W. Wall:
  A Unified Vector/Scalar Floating-Point Architecture. 134-143
• 
  Hans M. Mulder:
  Data Buffering: Run-Time Versus Compile-Time Support. 144-151
• 
  Thomas L. Adams, Richard E. Zimmerman:
  An Analysis of 8086 Instruction Set Usage in MS DOS Programs. 152-160

• 
  Joachim Roos:
  A Real-Time Support Processor for Ada Tasking. 162-171
• 
  Steven R. Vegdahl, Uwe F. Pleban:
  The Run-Time Environment for Screme, A Scheme Implementation on the 88000. 172-182
• 
  Scott McFarling:
  Program Optimization for Instruction Caches. 183-191

• 
  Paul A. Karger:
  Using Registers to Optimize Cross-Domain Call Performance. 194-204
• 
  Emmanuel A. Arnould, Francois J. Bitz, Eric C. Cooper, H. T. Kung, Robert D. Sansom, Peter Steenkiste:
  The Design of Nectar: A Network Backplane for Heterogeneous Multicomputers. 205-216
• 
  Sergio A. Delgado-Rannauro, T. J. Reynolds:
  A Message Driven Or-Parallel Machine. 217-228

• 
  Susan S. Owicki, Anant Agarwal:
  Evaluating the Performance of Software Cache Coherence. 230-242
• 
  Wolf-Dietrich Weber, Anoop Gupta:
  Analysis of Cache Invalidation Patterns in Multiprocessors. 243-256
• 
  Susan J. Eggers, Randy H. Katz:
  The Effect of Sharing on the Cache and Bus Performance of Parallel Programs. 257-270

• 
  Norman P. Jouppi, David W. Wall:
  Available Instruction-Level Parallelism for Superscalar and Superpipelined Machines. 272-282
• 
  William J. Dally:
  Micro-Optimization of Floating Point Operations. 283-289
• 
  Michael D. Smith, Mike Johnson, Mark Horowitz:
  Limits on Multiple Instruction Issue. 290-302

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last updated on 2024-04-26 17:30 CEST by the dblp team

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