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ORCID17th ASYNC 2011: Cornell University, Ithaca, New York, USA
- 17th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2011, Cornell University, Ithaca, New York, USA, 27-29 April 2011. IEEE Computer Society 2011, ISBN 978-0-7695-4383-3
Design Automation Techniques
- Victor Khomenko:
Logic Decomposition of Asynchronous Circuits Using STG Unfoldings. 3-12 - Nikolaos Andrikos, Luciano Lavagno:
Optimal and Heuristic Scheduling Algorithms for Asynchronous High-Level Synthesis. 13-21 - Evriklis Kounalakis, Christos P. Sotiriou:
CPlace: A Constructive Placer for Synchronous and Asynchronous Circuits. 22-29
Analysis
- Suwen Yang, Ian W. Jones, Mark R. Greenstreet:
Synchronizer Performance in Deep Sub-Micron Technology. 33-42 - Xin Fan, Milos Krstic
, Christoph Wolf, Eckhard Grass:
GALS Design for On-chip Ground Bounce Suppression. 43-52
Validation and Improving Functionality
- Chao Yan, Florent Ouchet, Laurent Fesquet, Katell Morin-Allory:
Formal Verification of C-element Circuits. 55-64 - Masashi Imai, Tomohiro Yoneda:
Improving Dependability and Performance of Fully Asynchronous On-chip Networks. 65-76 - Hock Soon Low, Delong Shang, Fei Xia, Alexandre Yakovlev:
Variation Tolerant AFPGA Architecture. 77-86
Circuit Designs
- Xuefu Zhang, Delong Shang, Fei Xia, Alexandre Yakovlev:
A Novel Power Delivery Method for Asynchronous Loads in Energy Harvesting Systems. 89-98 - Nabil Imam, Rajit Manohar:
Address-Event Communication Using Token-Ring Mutual Exclusion. 99-108 - Jo C. Ebergen, Bill Coates, Austin Lee:
Long-Distance On-chip Communication Using GasP. 109-116
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