John Feo, Paolo Faraboschi, Oreste Villa (Eds.):
Proceedings of the Computing Frontiers Conference, CF'12, Caligari, Italy - May 15 - 17, 2012.
ACM 2012, ISBN 978-1-4503-1215-8 
Keynote address
- Moray McLaren:
Towards truly integrated photonic and electronic computing.
1-2
Computing at the frontier
- Lingamneni Avinash, Kirthi Krishna Muntimadugu, Christian C. Enz, Richard M. Karp, Krishna V. Palem, Christian Piguet:
Algorithmic methodologies for ultra-efficient inexact architectures for sustaining technology scaling.
3-12
- Diego Lugones, Kostas Katrinis, Martin Collier:
A reconfigurable optical/electrical interconnect architecture for large-scale clusters and datacenters.
13-22
- Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé:
BSArc: blacksmith streaming architecture for HPC accelerators.
23-32
- Jichuan Chang, Parthasarathy Ranganathan, Trevor N. Mudge, David Roberts, Mehul A. Shah, Kevin T. Lim:
A limits study of benefits from nanostore-based future data-centric system architectures.
33-42
Compilation, programming and runtime systems
- Carlo Bertolli, Adam Betts, Paul H. J. Kelly, Gihan R. Mudalige, Mike B. Giles:
Mesh independent loop fusion for unstructured mesh applications.
43-52
- Vinod Tipparaju, Jeffrey S. Vetter:
GA-GPU: extending a library-based global address spaceprogramming model for scalable heterogeneouscomputing systems.
53-64
- Isuru Herath, Demian Rosas-Ham, Mikel Luján, Ian Watson:
SnCTM: reducing false transaction aborts by adaptively changing the source of conflict detection.
65-74
- Weidong Shi, Jong-Hyuk Lee, Taeweon Suh, Dong Hyuk Woo, Xinwen Zhang:
Architectural support of multiple hypervisors over single platform for enhancing cloud computing security.
75-84
Memory systems
- Bharghava Rajaram, Vijay Nagarajan, Andrew J. McPherson, Marcelo Cintra:
SuperCoP: a general, correct, and performance-efficient supervised memory system.
85-94
- Doe Hyun Yoon, Tobin Gonzalez, Parthasarathy Ranganathan, Robert S. Schreiber:
Exploring latency-power tradeoffs in deep nonvolatile memory hierarchies.
95-102
- Kyle Spafford, Jeremy S. Meredith, Seyong Lee, Dong Li, Philip C. Roth, Jeffrey S. Vetter:
The tradeoffs of fused memory hierarchies in heterogeneous computing architectures.
103-112
- Nikola Vujic, Lluc Alvarez, Marc González, Xavier Martorell, Eduard Ayguadé:
DMA-circular: an enhanced high level programmable DMA controller for optimized management of on-chip local memories.
113-122
Energy efficiency
- Shah Mohammad Faizur Rahman, Jichi Guo, Akshatha Bhat, Carlos Garcia, Majedul Haque Sujon, Qing Yi, Chunhua Liao, Daniel J. Quinlan:
Studying the impact of application-level optimizations on the power consumption of multi-core architectures.
123-132
- Alexander W. Min, Ren Wang, James Tsai, Mesut A. Ergin, Tsung-Yuan Charlie Tai:
Improving energy efficiency for mobile platforms by exploiting low-power sleep states.
133-142
- Lucia G. Menezo, Valentin Puente, Pablo Abad, José-Ángel Gregorio:
Improving coherence protocol reactiveness by trading bandwidth for latency.
143-152
Massive parallelism and streaming
- Junghee Lee, Hyung Gyu Lee, Soonhoi Ha, Jongman Kim, Chrysostomos Nicopoulos:
A programmable processing array architecture supporting dynamic task scheduling and module-level prefetching.
153-162
- Yoonseo Choi, Cheng-Hong Li, Dilma Da Silva, Alan Bivens, Eugen Schenfeld:
Adaptive task duplication using on-line bottleneck detection for streaming applications.
163-172
- Francesca Palumbo, Danilo Pani, Andrea Congiu, Luigi Raffo:
Concurrent hybrid switching for massively parallel systems-on-chip: the CYBER architecture.
173-182
- Francesco Galluppi, Sergio Davies, Alexander D. Rast, Thomas Sharp, Luis A. Plana, Steve Furber:
A hierachical configuration system for a massively parallel neural hardware platform.
183-192
Modeling, benchmarking and characterization
Poster session
- Ye Gao, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
An out-of-order vector processing mechanism for multimedia applications.
233-236
- Noor Shaker, Georgios N. Yannakakis, Julian Togelius:
Towards player-driven procedural content generation.
237-240
- Wolfgang Eckhardt, Alexander Heinecke:
An efficient vectorization of linked-cell particle simulations.
241-244
- Elkin Garcia, Daniel A. Orozco, Rishi Khan, Ioannis E. Venetis, Kelly Livingston, Guang R. Gao:
Dynamic percolation: a case of study on the shortcomings of traditional optimization in many-core architectures.
245-248
- Tomoyuki Nagatsuka, Yoshito Sakaguchi, Kenji Kise:
CoreSymphony architecture.
249-252
- Silvia Lovergine, Fabrizio Ferrandi:
Instructions activating conditions for hardware-based auto-scheduling.
253-256
- Rosario Cammarota, Arun Kejariwal, Debora Donato, Alexandru Nicolau, Alexander V. Veidenbaum:
Selective search of inlining vectors for program optimization.
257-260
- Lorenzo Verdoscia, Roberto Vaccaro:
D3AS project: a different approach to the manycore challenges.
261-264
- Masayuki Sato, Yusuke Tobo, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A capacity-efficient insertion policy for dynamic cache resizing mechanisms.
265-268
- Teng Li, Vikram K. Narayana, Tarek A. El-Ghazawi:
Accelerated high-performance computing through efficient multi-process GPU resource sharing.
269-272
- Orhan Kislal, Piotr Berman, Mahmut T. Kandemir:
Improving the performance of k-means clustering through computation skipping and data locality optimizations.
273-276
Computer intelligence in games
Exascale in Europe
- Mark I. Parsons:
CRESTA: a software focussed approach to exascale co-design.
301-302
- Roberto Giorgi:
TERAFLUX: exploiting dataflow parallelism in teradevices.
303-304
- Arndt Bode:
DEEP: an exascale prototype architecture based on a flexible configuration.
305-306
- Nikola Puzovic:
Mont-Blanc: towards energy-efficient HPC systems.
307-308
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