47. DAC 2010: Anaheim, CA, USA

Panel

Special session: Post-silicon validation or avoiding the $50 million paperweight

Speed up your model! RTL, data-flow, or SystemC

Embedded software timing matters!

Thermal tracking, monitoring and characterization

Advanced clock design and flip-chip layout

Panel

Special session: Virtualization in the embedded systems: where do we go?

Memory and multiprocessor design space exploration

Interconnect networks: present and future

Core techniques in formal verification

New frontiers in routing

Panel

Special session: Joint DAC/IWBDA special session engineering biology: fundamentals and applications

Reliability and integrity of circuits and systems

Embedded hardware for security, data type refinement, and arbitration

Statistical techniques for silicon-to-model correlation

Placement: from traditional techniques to novel circuit styles

Panel

Special session: A decade of NOC research - where do we stand?

Exploiting concurrency for system-level performance

Data Access Times Define Performance!

Tools for effective post-silicon validation and test

Shapes and statistics: manufacturability and yield

Panel

Special session: The analog model crisis - how can we solve it?

Application-driven network-on-chip design

Exploiting FPGA-specific features for robustness and efficiency

Leakage estimation and optimization

Logic synthesis is alive and kicking

Panel

Special session: Design closure for reliability

Energy-efficient embedded hardware design and management

Parallel and efficient techniques in circuit simulation

Thermal management and optimization

Catch of the day in benchmarking and optimal synthesis

Panel

Special session: WACI: wild and crazy ideas

Algorithms and architectures for emerging technologies

Simulation and modeling techniques for devices and interconnect

Design of ultra low-power systems

Variation-aware methods for SRAMs and clocks

Joint user track panel: What will make your next design experience a much better one?

Special session: Cyber-physical systems demystified

Application and improvement of dynamic verification

Timing analysis and circuit optimization for novel technologies and DFM

System power modeling and management

Management of power integrity and circuit reliability

Panel

Special session: Computing without guarantees

Design and modeling of technologies beyond CMOS

Yield-aware optimization and modeling for analog circuits

Reducing the cost of test

Special session: Smart power: from your cell phone to your home