12. DDECS 2009: Liberec, Czech Republic

Invited Talks

Poster Session I

ATPG and Fault Simulation Techniques

Asynchronous Circuit Design

RF and High Speed Circuit Design

Architecture and Symbolic RTL Synthesis

Memory Design and Test

Poster Session II

Power Supply and Interconnect Related Faults

Industrial Session

Student Session: RF and High Speed Circuits

Student Session: Miscellaneous

Poster Session III

Analog Design and Sensors

Off-Line and On-Line Testing