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ORCIDERSA 2006: Las Vegas, Nevada, USA
- Toomas P. Plaks:
Proceedings of the 2006 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA 2006, Las Vegas, Nevada, USA, June 26-29, 2006. CSREA Press 2006, ISBN 1-60132-011-6
Worldcomp'06 Keynote
- Chris Rowen:
The Reinvention of the Microprocessor. ERSA 2006: 3-6
ERSA'06 Keynote
- Chris Rowen:
Using configurable processors for high-efficiency multiple-processor systems. ERSA 2006: 7-10
Invited Talks
- Maya B. Gokhale, Christopher Rickett, Justin L. Tripp, Chung Hsu, Ronald Scrofano:
Promises and Pitfalls of Reconfigurable Supercomputing. ERSA 2006: 11-20 - David L. Andrews, Ron Sass, Erik K. Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp:
The Case for High Level Programming Models for Reconfigurable Computers. ERSA 2006: 21-32
Runtime Resource Management of Reconfigurable Hardware
- Brian Holland, James Greco, Ian A. Troxel, Gabe Barfield, Vikas Aggarwal, Alan D. George:
Compile- and Run-Time Services for Distributed Hetergeneous Reconfigurable Computing. ERSA 2006: 33-41 - Dirk Koch, Matthiaas Koerber, Jürgen Teich:
Searching RC5-Keys with Distributed Reconfigurable Computing. ERSA 2006: 42-48 - Vincent Nollet, Prabhat Avasare, Diederik Verkest, Henk Corporaal:
Exploiting Hierarchical Configuration to Improve Run-Time MPSoC Task Assignment. ERSA 2006: 49-55 - Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci Memik:
A Sensor Distribution Algorithm for FPGAs with Minimal Dynamic Reconfiguration Overhead. ERSA 2006: 56-62 - Carlo Amicucci, Fabrizio Ferrandi, Marco D. Santambrogio, Donatella Sciuto:
SyCERS: a SystemC Design Exploration Framework for SoC Reconfigurable Architecture. ERSA 2006: 63-69 - Markus Koester, Heiko Kalte, Mario Porrmann:
Relocation and Defragmentation for Heterogeneous Reconfigurable Systems. ERSA 2006: 70-76 - Sebastian Lange, Martin Middendorf:
Cache Architectures for Reconfigurable Hardware. ERSA 2006: 77-83 - Yvan Eustache, Jean-Philippe Diguet, Milad El Khodary:
RTOS-Based Hardware Software Communications and Configuration Management in the Context of a Smart Camera. ERSA 2006: 84-92
Reconfigurable Multiprocessors and Supercomputing
- Craig D. Ulmer, Adrian Javelo:
Floating-Point Unit Reuse in an FPGA Implementation of a Ray-Triangle Intersection Algorithm. ERSA 2006: 93-102 - Cao Liang, Jing Ma, Xinming Huang:
An FPGA based Co-Design Architecture for MIMO Lattice Decoders. ERSA 2006: 103-109 - Gerard K. Rauwerda, Gerard J. M. Smit, Casper R. W. van Benthem, Paul M. Heysters:
Reconfigurable Turbo/Viterbi Channel Decoder in the Coarse-Grained Montium Architecture. ERSA 2006: 110-116 - Yuanqing Guo, Cornelis Hoede, Gerard J. M. Smit:
A Column Arrangement Algorithm for a Coarse-grained Reconfigurable Architecture. ERSA 2006: 117-122 - Mitchell J. Myjak, Jonathan Larson, José G. Delgado-Frias:
Mapping and Performance of DSP Benchmarks on a Medium-Grain Reconfigurable Architecture. ERSA 2006: 123-129 - Daihan Wang, Hiroki Matsutani, Masato Yoshimi, Michihiro Koibuchi, Hideharu Amano:
A Parametric Study of Scalable Interconnects on FPGAs. ERSA 2006: 130-135 - Chuan He, Guan Qin, Mi Lu, Wei Zhao:
Group-Alignment based Accurate Floating-Point Summation on FPGAs. ERSA 2006: 136-142 - Volodymyr V. Kindratenko:
Code Partitioning for Reconfigurable High-Performance Computing: A Case Study. ERSA 2006: 143-152
Emerging Technologies and Architectures
- Jeoong Sung Park, Hong-Jip Jung, Viktor K. Prasanna:
Efficient FPGA-based Implementations of the MIMO-OFDM Physical Layer. ERSA 2006: 153-163 - Herwin Chan, Patrick Schaumont, Ingrid Verbauwhede:
Process Isolation for Reconfigurable Hardware. ERSA 2006: 164-170 - Marcel D. van de Burgwal, Gerard J. M. Smit, Gerard K. Rauwerda, Paul M. Heysters:
Hydra: An Energy-efficient and Reconfigurable Network Interface. ERSA 2006: 171-177 - Muhammad Akhtar Khan, Abdul Hameed, Ahmet T. Erdogan:
Low Power Programmable FIR Filtering IP Cores Targeting System-on-a-Reprogrammable-Chip (SoRC). ERSA 2006: 178-183 - Chun Hok Ho, Ka Fai Cedric Yiu, Jiaquan Huo, Sven Nordholm, Wayne Luk:
Reconfigurable Acceleration of Robust Frequency-Domain Echo Cancellation. ERSA 2006: 184-190 - Joshua Noseworthy, Miriam Leeser:
Efficient Use of Communications Between an FPGAs Embedded Processor and its Reconfigurable Logic. ERSA 2006: 191-197 - Minoru Watanabe, Mototsugu Miyano, Fuminori Kobayashi:
Differential Reconfiguration Architecture suitable for a Holographic Memory. ERSA 2006: 198-206
Short Papers
- Ryan Glabb, Laurent Imbert, Graham A. Jullien, Arnaud Tisserand, Nicolas Veyrat-Charvillon:
Multi-Mode Operator for SHA-2 Hash Functions. ERSA 2006: 207-210 - Saumil G. Merchant, Gregory D. Peterson, Seong G. Kong:
Intrinsic Embedded Hardware Evolution of Block-based Neural Networks. ERSA 2006: 211-214 - Yu Bi, Gregory D. Peterson, G. Lee Warren, Robert J. Harrison:
Hardware Acceleration of Parallel Lagged-Fibonacci Pseudo Random Number Generation. ERSA 2006: 215-218 - Mohammad Samie, Gabriel Dragffy, Ebrahim Farjah:
Metamorphic Memory Based Bio-Inspired Reconfigurable Celluar Systems. ERSA 2006: 219-222 - Xuejun Liang, Qutaibah M. Malluhi:
Combinatorial Optimization in Mapping Generalized Template Matching onto Reconfigurable Computers. ERSA 2006: 223-226 - Farhad Mehdipour, Morteza Saheb Zamani, Mehdi Sedighi, Kazuaki J. Murakami, Hamid Noori:
GifT: A Gravity-Directed and Life-Time Based Algorithm for Temporal Partitioning of Data Flow Graphs. ERSA 2006: 227-230 - Fei Wang, Jack S. N. Jean:
Architectural Support for Runtime 2D Partial Reconfiguration. ERSA 2006: 231-236
Posters
- Minoru Watanabe, Fuminori Kobayashi:
Logic Synthesis and Place-and-Route Environment for ORGAs. ERSA 2006: 237-238 - Minoru Watanabe, Fuminori Kobayashi:
Shield Effect Analysis for a Gate Array on An Optically Reconfigurable Gate Array. ERSA 2006: 239-240 - Vinay Sriram, David Kearney:
A High Speed, Run Time Reconfigurable Image Acquisition processor for a Missile Approach Warning System. ERSA 2006: 241-243 - Vinay Sriram, David Kearney:
An Area Time Efficient Field Programmable Mersenne Twister Uniform Random Number Generator. ERSA 2006: 244-246 - Janardhan Singaraju, John A. Chandy:
A Generic Lookup Cache Architecture for Network Processing Applications. ERSA 2006: 247-248 - Giovanni Agosta, Francesco Bruschi, Marco D. Santambrogio, Donatella Sciuto:
Synthesis of Object Oriented Models on Reconfigurable Hardware. ERSA 2006: 249-250 - Alireza Sarvi, Jenny Fan, Reto Stamm:
A Dual Configuration BIST-Based Modular Diagnostic Methodology for Embedded Cores in FPGAs. ERSA 2006: 251-252 - Heng Tan, Ronald F. DeMara, Anuja Jayraj Thakkar, Abdel Ejnioui, Jason Sattler:
Complexity and Performance Evaluation of Two Partial Reconfiguration Interfaces on FPGAs: A Case Study. ERSA 2006: 253-256
Late Papers
- Paul M. Heysters:
The Era of Reconfigurable Computing. ERSA 2006: 257-264 - Steven Smith:
Dynamic Scheduling and Resource Management in Heterogeneous Computing Environments with Reconfigurable Hardware. ERSA 2006: 265-271 - Paul M. Heysters:
Coarse-Grained Reconfigurable Computing for Power Aware Applications. ERSA 2006: 272-
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