Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID7th FDL 2004: Lille, France
- Forum on specification and Design Languages, FDL 2004, September 14-17, 2004, Lille, France, Proceedings. ECSI 2004
AMS-1: Tools For AMS Desing
- J.-C. Hammon, Daniel Esteve, Pascal Pampagnin:
High Level System desing using HiLes Designer. 1-12 - C. T. Carr, T. Martin McGinnity, L. J. McDaid:
VHDL-AMS code gneration from UML structural representations. FDL 2004: 12-25 - Laurent Lemaitre:
Evalution/Testing of Compact Device Model Implementation. 25-30 - Marie-Minerve Louërat, Tuong P. Nguyen, Vincent Bourguet, Laurent de Lamarre, Alain Greiner:
A language to desing generators of analog functions (poster). 30-32
AMS-2: System Level Desing
- Hui Zhang, Alex Doboli:
SystemC Simulation of Continuous-Time $Sigma-Delta$ Analog-Digital Converters in the Presence of Non-linearities. FDL 2004: 32-44 - Rüdiger Schroll, Christoph Grimm, Klaus Waldschmidt:
HEAVEN: A Framework for the Refinement of Heterogeneous Systems. 44-56 - Christoph Grimm, Wilhelm Heupke, Klaus Waldschmidt:
Semi-Symbolic Modeling and Analysis of Noise in Heterogeneous Systems . 56-68
AMS-3: Modeling Techniques
- S. Loued, Ahmed Fakhfakh, Mourad Loulou, Nouri Masmoudi, Yannick Hervé:
High Level Self-adjusted Models and VHDL-AMS; Application for a freguency synthesizer modelling. 68-76 - Peter R. Wilson, Tom J. Kazmierski:
A novel approach to mixed-domain behavioral modeling of ferromagnetic hysteresis in VHDL-AMS. 76-80 - Rachid Guelaz, Djilali Kourtiche, Yannick Hervé, Mustapha Nadi:
Modeling of the ultrasonic nonlinear propagation with VHDL-AMS. 80-91
AMS-4: Languages Issues
- Yannick Hervé, Ahmed Fakhfakh:
Requirements and Verifications through an extension of VHDL-AMS. 91-100 - J. Shields, Ernst Christen:
Mixed Nets, Conversion Models, and VHDL-AMS. 100-112 - E.-P. Wagner, Joachim Haase:
Monte Carlo Simulation Using VHDL-AMS. 112-123
AMS-5: Practical Applications I
- Emmanuel Drouard, Matthieu Briere, Fabien Mieyeville, Ian O'Connor, Xavier Letartre:
Optical Network On-chip Multi-Domain modeling using SystemC. 123-135 - Anne-Marie Trullemans-Anckaert, Richard Perdriau, Mohammed Ramdani, Jean-Luc Levant:
Early Prediction of Conducted-Mode Emission of complex IC's. 135-144 - Foudil Dadouche, Annick Alexandre, Bertrand Granado, Andréa Pinna, Patrick Garda:
A VHDL-AMS Configuration for Active Pixel Sensors. 144-156 - M. Garon, Jean-Francois Diouris, Serge Toutain, Emmanuel Cottais, Yide Wang:
Behavioural modelling of a power amplifier in VHDL-AMS. 156-158
AMS-6: Practical Applications II
- Elena Martín, Laura Barrachina, Carles Ferrer:
Practical Case Example of Inertial MEMS Modeling with VHDL-AMS. 158-168 - Patricia Desgreys, Yannick Hervé, Jean Oudinot, S. Snaidero, Mohamed Karray:
SoC modelling for virtual prototyping with VHDL-AMS. 168-180
UML-1: MDA & Methodology
- Ian Oliver:
Model Based Testing and Refinement in MDA Based Developent. 180-192 - Sari Leppänen, Markku Turunen, Ian Oliver:
Application Driven Methodology for Development of Communicating Systems. 192-204 - Dragos Truscan:
A Model-driven Approach to Configuration of TTA-based Protocol Processing Platforms. 204-216
UML-2: Transformations & Code Generation
- Ian Oliver:
Mapping UML Descriptions to the Raven Input Language. 216-228 - Oana Florescu, Jeroen Voeten, Jinfeng Huang, Henk Corporaal:
Error Estimation in Model-Driven Development for Real-Time Software. 228-240 - Lossan Bonde, Cédric Dumoulin, Jean-Luc Dekeyser:
Metamodels and MDA Transformations for Embedded Systems. 240-252
UML-3: Methods For Real-Time
- Mathieu Maranzana, Jean-Francois Ponsignon, Jean-Louis Sourrouille, F. Bernier:
Timing Performances of Automatically Generated Code Using MDA Approaches. 252-12 - Jinfeng Huang, Jeroen Voeten, Andre Ventevogel:
Predictability in Real-time System Development (1) Semantics Support from Development Languages . 264-278 - Jinfeng Huang, Jeroen Voeten, Piet van der Putten, Andre Ventevogel:
Predictability in Real-time System Development (2) A Case Study . 278-289 - Arnaud Cuccuru, Pierre Boulet, Jean-Luc Dekeyser:
Regular Hardware Architecture Modeling with UML2. 289-301
UML-4: UML Case Studies
- Mauro Prevostini, Giuseppe Piscopo, I. Stefanini:
UML System-Level Analysis and Design of Secure Communication Schemes for Embedded Systems. 301-313 - Mauro Prevostini, M. Lajolo, A. S. Basu:
UML Specifications Towards a Codesign Environment. 313-325 - Paul F. Lister, Vincenzo Trignano, Milke C. Bassett:
UML-Executable Functional Models of electronic systems in the VIPERS Virtual Prototyping Methodology. 325-337
CSD-1: Simulation
- Andrés Takach, Simon Waters, Peter Gutberlet:
Fast Bit-Accurate C++ Datatypes For Functional System Verification and Synthesis. 337-345 - Mario Polaschegg, Christian Steger, Damian Dalton, Abhay Vadher:
A Generic Simulation Framework for Multiprocessor Architectures. 345-355 - Fotios Gioulekas, Michael K. Birbas, Nikos S. Voros, George Kouklaras, Alexios N. Birbas:
A Heterogeneous Co-simulation Environment for Complex Embedded Telecommunication Systems. 355-366 - Rocco Le Moigne, Olivier Pasquier, Jean Paul Calvez:
An Abstract Communication Bus Model for Performance Estimation in SoCs with SystemC (short paper). 366-378 - E. Turbatu, Samy Meftali, Smaïl Niar, Jean-Luc Dekeyser:
An automatic communication synthesis for high level SOC desing using transaction level modelling (poster). 378-380
CSD-2: Embedded Systems Modelling & Design
- P. Hastono, Stephan Klaus, Sorin A. Huss:
Real-Time Operating System Services for Realistic SystemC Simulation Models of Embedded Systems. 380-392 - Joachim K. Anlauf, Philipp A. Hartmann:
On Actors and Objects - OOP in System Level Design. 392-404 - Fernando Herrera, Pablo Sánchez, Eugenio Villar:
Heterogeneous System-Level Specification in SystemC. 404-416
CSD-3: Results From The MEDEA SpeAC Project
- Nico Bannow, Karsten Haug, Wolfgang Rosenstiel:
Performance Analysis and Automated C++ Modularization Using Module-Adapters for SystemC. 416-428
CSD-4: Application Of Languages To Special Architectures
- Kari Tiensyrjä, Miroslav Cupák, Kostas Masselos, Marko Pettissalo:
SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip. 428-440 - Andreas Schallenberg, Frank Oppenheimer, Wolfgang Nebel:
Designing for dynamic partially reconfigurable FPGAs with SystemC and OSSS. 440-452 - M. Samyn, Samy Meftali, Jean-Luc Dekeyser:
MDA Based, SystemC Code Generation, Applied to Intensive Signal Processing Applications. 452-463 - Martti Forsell:
Designing NOCs with a parallel extension of c. 463-475 - Luigi Pomante:
Experimenting Object-Oriented System-Level Design in the ATM domain. 475-484 - Ulrich Neffe, Christian Steger, Reinhold Weiss, Andreas Mühlberger, Edgar Rieger, Klaus Rothbart:
SystemC Based Design Space Exploration for Power Aware Smart Cards. 484-493
CSD-5: Exploration Of New Languages
- Marcos M. A. Sanchez, Fernandez Herrero, Marisa López-Vallejo:
Improving IP core reuse through the application of the meta-language xHDL. 493-505 - Peter Jensen, Wolfgang Ecker, Thomas Kruse, Martin Zambaldi:
SystemVerilog: Interface Based Design. 505-518 - Sherif G. Aly, Ashraf M. Salem:
Transaction Level Modeling in Java. 518-526 - Jean-Pierre David, Etienne Bergeron:
An Intermediate Level HDL for System Level Design. 526-536
LFSV-2: Verification Based Methodologies
- Martin Zambaldi, Wolfgang Ecker:
Extending the RASSP model for Verification. 536-544 - Stefan Förster, André Windisch, Marco Fischer, Dieter Monjau, Wolfram Hardt:
A Methodology for Embedded System Design supporting Layered Platforms. 544-556 - Daniel Karlsson, Petru Eles, Zebo Peng:
A Formal Verification Approach for IP-based Designs. 556-568
LFSV-3: Languages & Their Execution
- Martin Zambaldi, Wolfgang Ecker, Thomas Kruse, Wolfgang Müller:
The Formal Simulation Semantics of SystemVerilog. 568-578 - Mostefa Belarbi, Jean-Philippe Babau, Jean-Jacques Schwarz:
Temporal validation of Real Time multitasking applications based on communicating timed automata. 578-586 - Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla:
A Functional Programming Framework of Heterogeneous Model of Computation for System Design. 586-598
LFSV-4: Advances In B
- Nikos S. Voros, Colin F. Snook, Stefan Hallerstede, Thierry Lecomte:
A hardware/software codesign framework for developing complex embedded systems using formal model refinement. 598-612 - Dominique Cansell, J.-F. Culat, Dominique Méry, Cyril Proch:
Derivation of SystemC code from abstract system models. 612-624 - Stefan Hallerstede, Yann Zimmermann:
Circuit Design by Refinement in EventB1. 624-637 - Dorian Petit, Vincent Poirriez, Georges Mariano:
Reuse of SML module system for the B language. 637-649
LFSV-5: Verification frameworks
- Amjad Gawanmeh, Ali Habibi, Sofiène Tahar:
Enabling SystemC Verification using Abstract State Machines. 649-661 - I-Lun Tseng, Adam Postula:
GBLD: A Formal Model for Layout Description and Generation. 661-672 - Karen Godary-Dejean, Isabelle Augé-Blum, Anne Mignotte:
SDL and Timed Petri Nets versus UPPAAL for the validation of embedded architecture in automotive. 672-684
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-04-19 19:19 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
