8. FDL 2005: Lausanne, Switzerland

Plenary Session 1: European Technology Platforms & Avionics Electronics

• Rainer Zimmermann: ENIAC & ARTEMIS Technology Platforms. 1-2
• Pascal Pampagnin: Trends and Challenges in Avionics Electronics. 3-4

Plenary Session 2: Performance Modelling

• Lothar Thiele: Analitic Performance Analysis of Distributed Embedded Systems. 31-33
• Axel G. Braun, Joachim Gerlach, Wolfgang Rosenstiel, Axel Siebenborn, Oliver Bringmann:
  SystemC-Based Communication and Performance Analysis. 33-48
  

AMS-1: New Languages

• Karsten Einwich:
  Application of SystemC/SystemC-AMS for the Specification of Complex Wired Telecomunication Systems. 49-60
  
• Simone Orcioni, Giorgio Biagetti, Massimo Conti:
  SystemC-WMS: A Wave Mixed Signal Simulator. 61-73
  
• Erik Markert, Göran Herrmann, Dietmar Müller:
  System model of an inertial navigation system using SystemC-AMS. 73-77
  
• Yu Liu, Satoshi Komatsu, Masahiro Fujita:
  AMS Extensions for Timed/Untimed System-Level Design Language. 77-81
  

AMS-2: Keynote & Design and IP

• Ralf Kakerow: Modelling Technologies for Disruptive Communication System Design. 81-89
• Ian O'Connor, Faress Tissafi-Drissi, G. Revy, Frédéric Gaffiot:
  UML/XML based approach to hierarchical AMS Synthesis. 89-101
  
• Ewald Hessel, Klaus Panreck, Joachim Haase, André Schneider, Steffen Scholz:
  Development of VHDL-AMS Libraries for Automative Applications. 101-111
  
• G. Gassara, Ahmed Fakhfakh, M. Abdellaoui, Nouri Masmoudi, Yannick Hervé:
  Top-down hierarchical design flow application. 111-120
  

AMS-3: Tolerances and Uncertainties

• Wilhelm Heupke, Christoph Grimm, Klaus Waldschmidt:
  Semi-Symbollic Simulation of Nonlinear Systems. 121-132
  
• Ernst Christen:
  Tolerance Models in Hardware Description Languages. 133-143
  
• Paul Muller, Yusuf Leblebici:
  Jitter Tolerance Analysis of Clock and Data Recovery Circuits. 143-147
  
• Xianqiang Ren, Tom J. Kazmierski:
  Linearly graded behavioural analogue performance models. 147-153
  

AMS-4: System Verification and Design Flow

• Suad Katjazovic, Christian Steger, Andreas Schuhai, Markus Pistauer:
  Automatic Generation of a Verification Platform. 153-165
  
• Luis Avila, Rolando Dölling, Thomas Ifström, Peter Jores, Wolfgang Rosenstiel:
  Toward seamless top-down of A/MS systems. 165-172
  
• Patrick Birrer, Walter Hartong:
  Incorporating SystemC in Analog/Mixed-Signal Design Flow. 173-178
  
• David Navarro, D. Ramat, Fabien Mieyeville, Ian O'Connor, Frédéric Gaffiot, Laurent Carrel:
  VHDL & VHDL-AMS Modelling and Simulation of a CMOS Imager IP. 179-183
  
• Salima Feki, Ahmed Fakhfakh, Yannick Hervé, Abdelmajid Oualha, Nouri Masmoudi:
  VHDL-AMS virtual prototyping in power electronics. 183-189
  

AMS-5: Modelling

• Corrado Marino, Luca Fanucci, Francesco Iozzi, Massimiliano Forliti, Alessandro Rocchi, A. Giambastiani, Marco De Marinis:
  VHDL-AMS Modelling and System Verification Flow. 189-196
  
• M. Burford, Tom J. Kazmierski:
  A VHDL-AMS based Time-Domain Skin Depth Model. 197-209
  
• Torsten Mähne:
  Creating Virtual Prototypes of Complex Micro-Electro-Mechanical Transducers using Reduced-Order Modelling Methods and VHDL-AMS. 209-223
  

CSD Keynotes:

• A. Clouard: Overcoming issues to reach full adoption and benefit of C/C++based system design methodologies in real System-on-Chip projects. 223-224
• Tim Kogel, Anssi Haverinen: OCP TLM for Architectural Modelling. 225-244

CSD-1: TLM Modelling

• Giovanni B. Vece, Massimo Conti, Simone Orcioni:
  Devices modelling in SystemC based on behaviour separation. 245-257
  
• Robert Pasko, Luc Rynders:
  Building heterogeneous plaftorm simulators in C++. 257-269
  
• Richard Hoffer, Frank Baszynski:
  Implementation of a SystemC based Environment. 269-273
  
• David Antonio-Torres, Paul F. Newbury, Paul F. Lister:
  Executable Specification of Novel Display Controllers. 273-279
  
• Francesco Bruschi, Federico Moro, Donatella Sciuto:
  Mapping Interface Method Calls over OCP Buses. 279-283
  
• Samy Meftali, Anouar Dziri, Luc Charest, Philippe Marquet, J. Deskeyser:
  SOAP Based Distributed Simulation Environment for SoC Design. 283-291
  

CSD-2: Heterogeneous models of computation

• Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch:
  Modelling Environment for Heterogeneous Systems based on MoCs. 291-303
  
• Cristiano C. de Araujo, Edna Barros, Rodolfo Azevedo, Guido Araujo:
  Processor Centric Specification and Modelling of MPSoCs. 303-315
  
• Fernando Herrera, Eugenio Villar:
  Mixing Synchronous Reactive and Untimed Models of Computation. 315-329
  

CSD-3: HW/WF Co-Design and Synthesis

• André C. Nácul, Marcello Lajolo, T. Givarjis:
  Interface-Centric Abstraction Level for Rapid HW/SW Integration. 329-341
  
• L. Kriaa, S. Adriano, Emmanuel Vaumorin, R. Nouacer, F. Blanc, S. Pajaniardja, Philippe Coussy, Eric Martin, Dominique Heller, Farhat Thabet, Anne-Marie Fouilliart:
  SystemCmantic: A high level Modelling and Co-Design Framework. 341-353
  
• Antoni Portero, Lluis Ribas, Jordi Carrabina:
  Hardware Synthesis of Parallel Machines from SystemC. 353-361
  

CSD-4: Multi-Language Design

• Hiren D. Patel, Sandeep K. Shukla:
  Towards Behavioural Hierarchy Extensions for SystemC. 361-373
  
• J. Vennin, S. Penain, Luc Charest, Samy Meftali, Jean-Luc Dekeyser:
  Embed Scripting inside SystemC. 373-385
  
• Roland J. Weiss, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
  Efficient and Customizable Integration of Temporal Properties. 385-397
  
• Giovanni Agosta, Francesco Bruschi, Donatella Sciuto:
  Aspect Orientation in System Level Design. 397-401
  
• Francesco Regazzoni, André C. Nácul, Marcello Lajolo:
  Automatic synthesis of the Hardware/Software Interface. 401-405
  
• David Berner, Jean-Pierre Talpin, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla:
  SystemCXML: An Exstensible SystemC Front end Using XML. 405-409
  

EDA Vendor Track: C-based Design

• Andrés Takach, Bryan Bowyer, Thomas Bollaert:
  C-Based Hardware Design for Wireless Applications . 409-419
  
• Thomas Bollaert: Leveraging the efficiency of C-Based Design with Catapult-C . 419-429

GEN Session: System Model of Control & Computation and Communication

• Roberto Ziller:
  An Application of Generalized Supervisor Synthesis to the Control of a Call Center. 429-431
  
• Ivan Radojevic, Zoran A. Salcic, Partha S. Roop:
  Modelling Heterogeneous Embedded Systems in DFCarts. 441-453
  
• Zhonghai Lu, Ingo Sander, Axel Jantsch:
  Refinement of Perfectly Synchronous Communication Model. 453-465
  

PSL Session:

• D. Borionne, M. Liu, P. Ostier, Laurent Fesquet:
  PSL-based online monitoring of digital systems. 465-479
  
• Mostafa Naderi, Zainalabedin Navabi: Combination of Assertion and HSAT Methods For Automated Test Vectors Generation. 479-485

UML-1: Workflow for Embedded System Design

• Marilia Lima, F. Santos, J. Bione, T. Lins, Edna Barros:
  IpPROCESS: a Development Process for Soft IP-Cord. 487-499
  
• Dieter Monjau, Mathias Sporer:
  Meta Modelling of Embedded Systems using Active Databases. 499-511
  
• Johan Lilius, Dragos Truscan:
  Using feature models to automate model transformations. 511-515
  
• Elvinia Riccobene, Patrizia Scandurra, Alberto Rosti, Sara Bocchio:
  An HW/SW Co-design Environment based on UML and SystemC. 515-519
  

UML-2: Model Driven Engineering

• C. Berhouzoz, Francois Corthay, Thomas Sterren, R. Stainer, M. Reider:
  Compiled and Synthesized UML, a practical Approach for Codesign. 519-531
  
• Oana Florescu, Jeroen Voeten, Henk Corporaal:
  Synthesis for Unified Control- and Data-Oriented Models. 531-543
  
• Lossan Bonde, Pierre Boulet, Jean-Luc Dekeyser:
  Traceability and Interoperability in Models Transformations. 543-555
  

UML-3: Verification and Validation

• L. Negri, A. Chiarini:
  Power Modelling and Simulation Flow for Communication Protocols. 555-567
  
• Peter Green, Kinika Tasie-Amadi:
  Integrating Model-Checking with UML-based SoC Development. 567-579
  
• Hedia B. Ben, F. Jumel, Jean-Philippe Babau:
  Formal Evaluation of Quality of Service for Data Acquisition. 579-589
  

UML-4: Ongoing standardization

• Yves Vanderperren, Wim Dehaene:
  The SysML profile for embedded system modelling. 589-598
  
• David Servat, Frédéric Loiret, Sébastien Gérard, François Terrier:
  Architecture description in related standards. 599-609
  

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