Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDITC 1983: Philadelphia, PA, USA
- Proceedings International Test Conference 1983, Philadelphia, PA, USA, October 1983. IEEE Computer Society 1983
Session 1: Keynote Address and Invited Speakers
- Robert C. Kroeger:
Testability Emphasis in the General Electric A/VLSI Program. ITC 1983: 4 - Robert F. Miller, Kenneth W. Doversberger:
Testing Trends in Automotive Electronics. ITC 1983: 5 - J. A. G. Shearsmith:
The Effect of the Factory of the Future on Society. ITC 1983: 6-11
Session 2: Test Equipment and Methods-I. VLSI Test System Architecture
- Robert Albrow:
Test Pattern Compaction in VLSI Testers. ITC 1983: 12-17 - Steven Ladd:
Implementing a Self-Managed Test Vector Memory with One Million Elements. ITC 1983: 18-20 - Y. Kuramitsu, Y. Gamo:
A Suitable Test System for Gate Array. ITC 1983: 21-24 - David R. Emberson:
A Tightly Coupled Multiprocessor for VLSI Testing. ITC 1983: 25-28 - John R. Schinabeck:
System Architecture for Optimum DC Parameter Measurements. ITC 1983: 29-32 - Arthur L. Downey:
Test Program Optimization Techniques for a High Speed Performance VLSI Tester. ITC 1983: 33-39
Session 3: Board Test
- Peter Hansen:
New Techniques for Manufacturing Test and Diagnosis of LSSD Boards. ITC 1983: 40-45 - John A. Masciola, Gary Roberts:
Testing Microprocessor Boards and Systems: A New Approach. ITC 1983: 46-50 - Brian C. Crosby:
FAST Technology In-Circuit Testing Considerations. ITC 1983: 51-56 - Steven L. Bates:
High-Speed In-Circuit Testing. ITC 1983: 57-63 - Matt Snook, Bob Illick:
A New Hardware Architecture for Digital In-Circuit Testing. ITC 1983: 64-71 - Richard N. Barnes:
Fixturing for Surface-Mounted Devices. ITC 1983: 72-75
Session 4: Self Test Design Techniques and Evaluation
- Edward J. McCluskey, David J. Lu:
Recurrent Test Patterns. ITC 1983: 76-82 - Kewal K. Saluja, Mark G. Karpovsky:
Testing Computer Hardware through Data Compression in Space and Time. ITC 1983: 83-88 - Zeev Barzilai, Barry K. Rosen:
Comparison of AC Self-Testing Procedures. ITC 1983: 89-94 - Jacob Savir, Paul H. Bardell:
On Random Pattern Test Length. ITC 1983: 95-107
Session 5: New Ideas for Test Pattern Generation
- Glenn A. Kramer:
Employing Massive Parallelism in Digital ATPG Algorithms. ITC 1983: 108-114 - John F. McDonald, C. Benmehrez:
Test Set Reduction Using the Subscripted D-Algorithm. ITC 1983: 115-121 - David Florcik, David Low:
Simulation Pattern Capturing System for Design Verification Using a Dynamic High Speed Functional Tester (DHSFT). ITC 1983: 122-128 - Michael G. Lamoureux, Vinod K. Agarwal:
Non-Stuck-At Fault Detection in nMOS Circuits by Region Analysis. ITC 1983: 129-137 - Miron Abramovici, Premachandran R. Menon:
A Practical Approach to Fault Simulation and Test Generation for Bridging Faults. ITC 1983: 138-142 - Alexander Miczo:
The Sequential ATPG: A Theoretical Limit. ITC 1983: 143-149
Panel Session 6: The New Generation VLSI Test Sets- 1983 Update
- W. Boggs:
Integration into the CAD Environment. ITC 1983: 150 - Steve Bisset:
The Develpment of a Tester-Per-Pin VLSI Test System Architecture. ITC 1983: 151-157
Panel Session 7: Test Technologie in the University
- M. Ray Mercer:
Testing Issues at the University of Texas. ITC 1983: 158-159 - Kenneth Rose:
Test Technology in the University. ITC 1983: 160-161 - Jacob A. Abraham:
Incorporating Test Technology into an Undergraduate Curriculum. ITC 1983: 162 - Al A. Tuszynski:
Diversified Testing. ITC 1983: 163-165 - Edward J. McCluskey:
Teaching Testing. ITC 1983: 166-169
Session 8: Test Equipment and Methods- VLSI Test System Accuracy and Calibration
- Mark R. Barber:
Subnanosecond Timing Measurements on MOS Devices Using Modern VLSI Test Systems. ITC 1983: 170-180 - Lisa Deerr:
Automatic Calibration for a VLSI Test System. ITC 1983: 181-187 - Michael Catalano, Richard K. Feldman, Roberto Krutiansky, Richard Swan:
Individual Signal Path Calibration for Maximum Timing Accuracy in a High Pincount VLSI Test System. ITC 1983: 188-192 - Burnell G. West:
Attainable Accuracy of Autocalibrating VLSI Test Systems. ITC 1983: 193-199 - Richard F. Herlein:
Optimizing the Timing Architecture of a Digital LSI Test System. ITC 1983: 200-211
Session 9: Printed Circuit Board Manufacturing Process and Test Data Management
- John C. Howland, Pat T. Harding:
Estimating the Required Size of an Automated Test and Repair System from Subassembly Volume and Failure Information. ITC 1983: 212-219 - R. Wade Williams:
Consideration While Introducing a Test Data Management System to the Factory Floor. ITC 1983: 220-225 - Jack H. Arabian:
User's Requirements for Automated Handling in Computer Manufacturing and Board Test. ITC 1983: 226-237
Session 10: Intergrated Circuit manufacturing Process and Test Data Management
- Robert W. Atherton, David M. Campbell:
Use of In-Fab Parametric Testing for Process Control of Semiconductor Manufacturing. ITC 1983: 238-247 - Donald S. Cleverley:
The Role of Testing in Achieving Zero Defects. ITC 1983: 248-253 - Gerry Schmid:
Software Solutions Enhance ATE Networking Capabilities. ITC 1983: 254-259 - Alan F. Murray, Peter B. Denyer, David S. Renshaw:
Self-Testing in Bit Serial VLSI Parts: High Coverage at Low Cost. ITC 1983: 260-268 - Yacoub M. El-Ziq, Hamid H. Butt:
A Mixed-Mode Built-In Self-Test Technique Using Scan Path and Signature Analysis. ITC 1983: 269-274 - Michael A. Schuette, John Paul Shen:
On-Line Self-Monitoring Using Signatured Instruction Streams. ITC 1983: 275-282 - Franco Motika, John A. Waicukauski, Edward B. Eichelberger, Eric Lindbloom:
An LSSD Pseudo Random Pattern Test System. ITC 1983: 283-288 - William S. Blackley, Mervyn A. Jack, James R. Jordan:
A Digital Polarity Correlator Featuring Built-In Self Test and Self Repair Mechanisms. ITC 1983: 289-294 - John R. Kuban, Bill Bruce:
The MC6804P2 Built-In Self-Test. ITC 1983: 295-301
Session 12: Computer Aided Test- An International View
- David J. Wharton:
The HITEST Test Generation System Overview. ITC 1983: 302-310 - Gordon D. Robinson:
HITEST : Intelligent Test Generation. ITC 1983: 311-323 - Colin M. Maunder:
HITEST Test Generation System Interfaces. ITC 1983: 324-332 - Mats Johansson:
The GENESYS-Algorithm for ATPG without Fault Simulation. ITC 1983: 333-337 - Chantal Robach, Ch. Malecha, Gilles Michel:
Computer Aided Testability Evaluation and Test Generation. ITC 1983: 338-345 - Masato Kawai, Hideo Shibano, Shigehiro Funatsu, Shunichi Kato, T. Kurobe, K. Ookawa, Tohru Sasaki:
A High Level Test Pattern Generation Algorithm. ITC 1983: 346-353
Session 13: "Quo Vadis VLSI Testers or Why Megabucks for Jelly Beans"
- Charles McMinn:
The Impact of a VLSI Test System on the Test Throughput Equation. ITC 1983: 354-361 - Takeshi Shigematsu, Takashi Sakamoto, Yoshio Yamanaka:
A New Approach to DC Parameter Measurement in the Day of VLSI. ITC 1983: 362-365 - R. Y. Li, S. C. Diehl, S. Harrison:
Power Supply Noise Testing of VLSI Chips. ITC 1983: 366-370 - Shigeru Sugamori, Kunio Takeuchi, Hiromi Maruyama, Shinpei Kamata:
High-Fidelity Device Tester Interface. ITC 1983: 371-378 - Phil Brothers:
New Directions for VLSI Test Systems. ITC 1983: 379-381
Session 14: Test Economics
- Mark A. Myers:
An Analysis of the Cost and Quality Impact of LSI/VLSI Technology on PCB Test Strategies. ITC 1983: 382-395 - Robert E. Huston:
An Analysis of ATE Testing Costs. ITC 1983: 396-411 - Paul N. Manikas, Stephen G. Eichenlaub:
Reducing the Cost of Quality through Test Data Management. ITC 1983: 412-417 - Robert W. Atherton, Alfred H. Miller Jr., Judith E. Dayhoff:
Operations Management and Analysis in the Management of Electronic Testing. ITC 1983: 418-427
Session 15: Design for Testing in VLSI
- Andrea S. LaPaugh, Richard J. Lipton:
Total Fault Testing Using the Bipartite Transformation. ITC 1983: 428-434 - Jon G. Kuhl, Sudhakar M. Reddy:
On Testable Design for CMOS Logic Circuits. ITC 1983: 435-445 - Bhargab B. Bhattacharya, Bidyut Gupta:
Syndrome Testable Design of Combinational Networks for Detecting Stuck-At and Bridging Faults. ITC 1983: 446-452 - Teruhiko Yamada:
Syndrome-Testable Design of Programmable Logic Arrays. ITC 1983: 453-459
Session 16: Memory Test: 64K and 256K Production Testing
- Marc R. Faucher:
Pattern Recognition of Bit Fail Maps. ITC 1983: 460-463 - Masaaki Arao, Takao Tadokoro, Hiromi Maruyama, Shinpei Kamata:
Tester Correlation Problem in Memory Testers Used in Production Lines. ITC 1983: 464-470 - Donald M. Stewart:
Production Test and Repair of 256K Dynamic RAMS with Redundancy. ITC 1983: 471-475
Session 17: Test Software
- Robert L. Hickling:
Tester Independent Problem Representation and Tester Dependent Program Generation. ITC 1983: 476-482 - George F. Sprott:
An Adaptable Emulation Support Environment for Microprocessor Systems. ITC 1983: 483-488 - Lubomyr M. Zobniw:
Designing the VLSI Device-to-Board Test Ukraine Translator. ITC 1983: 489-496 - Mark P. Skrzynski, Neal Shea:
An ETHERNET Based Solution to ATE Networking. ITC 1983: 497-507 - Takuji Okamoto, Hiroyuki Shibata, Kozo Kinoshita:
Design of High-Level Test Language for Digital LSI. ITC 1983: 508-513 - David C. Snyder, Elaina S. Stokes, Richard C. Mahoney:
Inside a Modern Test Language Compiler. ITC 1983: 514-527
Session 18: Test Equipment and Methods- PC Board Testing
- Brian J. Sargent:
Implementation of a Memory-Emulation Diagnostic Technique. ITC 1983: 528-531 - Larry C. Sollman:
An Information-Rich ATE Architecture. ITC 1983: 532-537 - Robert S. Broughton:
Structured Logic Analysis for Manufacturing Testing. ITC 1983: 538-545
Session 19: Update on Fault Modeling
- C. Timoc, M. Buehler, T. Griswold, C. Pina, F. Stott, L. Hess:
Logical Models of Physical Failures. ITC 1983: 546-553 - Prithviraj Banerjee, Jacob A. Abraham:
Generating Tests for Physical Failures in MOS Logic Circuits. ITC 1983: 554-559 - Yashwant K. Malaiya, Ramesh Narayanaswamy:
Testing for Timing Faults in Synchronous Sequential Integrated Circuits. ITC 1983: 560-573
Session 20: Analog and Hybrid Test-1
- Max Khazam:
Predicting Test Accuracy for Analog In-Circuit Testing. ITC 1983: 574-577 - Joel Halbert, Mike Koen:
A Waveform Digitizer for Dynamic Testing of High Speed Data Conversion Components. ITC 1983: 578-588 - Matthew V. Mahoney:
New Techniques for High Speed Analog Testing. ITC 1983: 589-597 - E. A. Sloane, P. W. Dodd:
A General Method for Increasing Converter Accuracy and Resolution. ITC 1983: 598-605 - Douglas A. Blakeslee:
Real-Time Automatic Calibration of Analog Test Systems. ITC 1983: 606-609 - Phil Carrier:
A Microprocessor Based Method for Testing Transition Noise in Analog to Digital Converters. ITC 1983: 610-621
Session 21: Systems Test
- Aamer Mahmood, Edward J. McCluskey, David J. Lu:
Concurrent Fault Detection Using a Watchdog Processor and Assertions. ITC 1983: 622-628 - Alexander Kheruze, Ken Caruso:
An Application of Statistical Methods for System Failure Prediction. ITC 1983: 629-634 - Frederick G. Danner:
System Test Visibility Or Why Can't You Test Your Electronics. ITC 1983: 635-639 - F. Scott Davidson:
System Test: Applications of Control Interface Testing. ITC 1983: 640-651 - M. Small, D. Murray:
Bayesian Models of Tests : Some Practical Results. ITC 1983: 652-658 - Pat T. Harding, John C. Howland:
Turning Test Data into Information. ITC 1983: 659-667
Session 22: Test Algorithms on the Wall, Which One is the Best of All?
- Kewal K. Saluja, Li Shen, Stephen Y. H. Su:
A Simplified Algorithm for Testing Microprocessors. ITC 1983: 668-675 - G. F. Meravi, J. J. Bell, Joseph C. Bernier:
Analysis of Gate Array Failures Using Functional ATE. ITC 1983: 676-681 - Tom Middleton:
Functional Test Vector Generation for Digital LSI/VLSI Devices. ITC 1983: 682-691 - Feng-Hsien Warren Shih:
Real-Time Product Characterization by Fault Modeling and Pattern Recognitions. ITC 1983: 692-700 - C. Timoc, F. Stott, K. Wickman, L. Hess:
Adaptive Self-Test for a Microprocessor. ITC 1983: 701-705
Session 23: Design for Testability Tools and Architecture
- Paul W. Horstmann:
Design for Testability Using Logic Programming. ITC 1983: 706-713 - Syed Zahoor Hassan:
Signature Testing of Sequential Machines. ITC 1983: 714-718 - Nick Kanopoulos, G. Thomas Mitchell:
Testing of Bit-Serial Signal Processors. ITC 1983: 719-727
Session 24: Memory Test Using Parallel Techniques
- Marc A. Rich, Daniel E. Gentry:
The Economics of Parallel Testing. ITC 1983: 728-737 - Garry Marks:
Parallel Testing of Non-Volatile Memories. ITC 1983: 738-745
Session 25: Analog and Hybrid Testing- II
- Stephen W. Bryson:
Testing a High Performance Modem Filter. ITC 1983: 746-749 - Juerg Hofer, Bob Sigsby:
Digital Signal Processing Test Techniques for Telecommunications Integrated Circuits. ITC 1983: 750-766 - Mark Landry:
Production Testing of PCM (Digital) Audio Circuits. ITC 1983: 767-770 - Robert Craven, Joseph Schissler, Peter Konde:
Chroma Voltmeter Measurement Techniques for Analog LSI Devices. ITC 1983: 771-783
Session 26: Quality and Reliability
- Roger Dunn:
IC Quality Control by the User. ITC 1983: 784-789 - Sushil K. Malik, Jeffrey E. Gunn, Robert E. Camenga:
Future of Temperature and Humidity Testing: Highly Accelerated Temperature and Humidity Stress Test (HAST). ITC 1983: 790-795 - Kemon P. Taschioglou:
A Convenient Algebra of Quality for Interpreting ATE Test Data. ITC 1983: 796-803 - G. Siva Bushanam, H. Story:
Safe Operating Zones for Digital In-Circuit Testing. ITC 1983: 804
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-04-25 05:27 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
