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ORCIDITC 1985: Philadelphia, PA, USA
- Proceedings International Test Conference 1985, Philadelphia, PA, USA, November 1985. IEEE Computer Society 1985
Invited Speekers
- Edward B. Eichelberger:
Experiences and Expectations in VLSI Testing. ITC 1985: 4 - Paul M. Russo:
The Growth of Application Specific Integrated Circuits: Opportunities and Challenges. ITC 1985: 5 - Thomas M. McWilliams:
Easing the Transition from Design to Test. ITC 1985: 6 - John Manzo:
Complexity, Test, and the Productivity Challenge of the 90s. ITC 1985: 7-9
Session 1: Test Economics
- John Stone, Howard Ignatius, Randall Nuss:
Parallel Programming Significantly Improves Production NVM Wafer Sort. ITC 1985: 10-18 - Peter Nystrom, Steven Cosgrove:
Power Conditioning Provides Documented Productivity Gains in Semiconductor Fabrication and ATE. ITC 1985: 19-22 - Judith E. Dayhoff, Robert W. Atherton:
Financial Implications of a Detailed Analysis of Test Floor Operations. ITC 1985: 23-32 - Ken Lindsay:
Low Cost Test System Speeds Design Verification for Custom VLSI. ITC 1985: 33-39
Session 2: Test Generation System Directions - I
- Matthew Adiletta, Elizabeth M. Cooper, Keith Gutfreund:
Automatic Test Generation for Generic Scan Designs. ITC 1985: 40-44 - Miron Abramovici, James J. Kulikowski, Premachandran R. Menon, David T. Miller:
Test Generation In Lamp2: System Overview. ITC 1985: 45-48 - Miron Abramovici, James J. Kulikowski, Premachandran R. Menon, David T. Miller:
Test Generation In Lamp2: Concepts and Algorithms. ITC 1985: 49-56 - Sivanarayana Mallela, Shianling Wu:
A Sequential Circuit Test Generation System. ITC 1985: 57-61 - Angelo C. Hung, Francis C. Wang:
A Method for Test Generation Directly from Testability Analysis. ITC 1985: 62-78 - Erwin Trischler:
Guided Inconsistent Path Sensitization: Method And Experimental Results. ITC 1985: 79-87
Session 3: Design and Analysis Of Input Stimulus Generation for Built-In-Self Test
- Dilip K. Bhavsar:
"Concatenable Polydividers": Bit-Sliced LFSR Chips for Board Self-Test. ITC 1985: 88-93 - Cary K. Chin, Edward J. McCluskey:
Test Length for Pseudo Random Testing. ITC 1985: 94-99 - Jacob Savir, William H. McAnney, Salvatore R. Vecchio:
Random Pattern Testing for Data-Line Faults in an Embedded Multiport Memory. ITC 1985: 100-105 - Jacob Savir, William H. McAnney, Salvatore R. Vecchio:
Random Pattern Testing for Address-Line Faults in an Embedded Multiport Memory. ITC 1985: 106-114 - John Salick, Bill Underwood, M. Ray Mercer:
Built-In Self Test Input Generator for Programmable Logic Arrays. ITC 1985: 115-125 - Gary L. Craig, Charles R. Kime:
Pseudo-Exhaustive Adjacency Testing: A BIST Approach for Stuck-Open Faults. ITC 1985: 126-139
Session 4: Systems Test
- Sherri Klosterman:
A Computer System Diagnostic Strategy Based on ROM-Resident Diagnostics. ITC 1985: 140-144 - Aamer Mahmood, Edward J. McCluskey, Aydin Ersoz:
Concurrent System-Level Error Detection Using a Watchdog Processor. ITC 1985: 145-152 - David S. Curry:
Semiconductor Test Equipment Viewed as an Auto-Alignment System. ITC 1985: 153-158 - Donald H. Lenhert:
The Uses and Costs of the Addition of Remote Operation Capability to New Products. ITC 1985: 159-168 - David M. Jacobson:
A Fast, Probabilistic Algorithm for Functional Testing of Random Access Memory Systems. ITC 1985: 169-179
Session 5: Test Equipment: Calibration and Timing Accuracy
- William Corley, David S. Curry:
RF Calibration in ATE Systems. ITC 1985: 180-184 - David C. Chu:
Calibration of Systematic Errors in Precision Time-Interval Counters. ITC 1985: 185-190 - Jim Healy, Gary Ure:
A Method of Reducing ATE System Error Components and Guaranteeing Subnanosecond Measurement Accuracies. ITC 1985: 191-202 - Dennis Petrich:
Achieving Accurate Timing Measurements on TTL/CMOS Devices in a Manufacturing/Incoming Inspection Environment. ITC 1985: 203-219 - Garry C. Gillette:
Timing Accuracy Measurement System. ITC 1985: 220-223
Session 6: Test Technologie in the University
- Robert J. Feugate Jr., Steven M. McIntyre:
Training Tomorrow's Test Engineers: Experiences in Teaching an Undergraduate Course in VLSI Testing. ITC 1985: 224-229 - Albert B. Grubbs Jr., Glenn Neland:
Future Trends in Test of Electronic Circuits With Implications tor Entry Level Test Professionals. ITC 1985: 230-234 - Edward J. McCluskey:
Test Teaching. ITC 1985: 235 - Alexander Miczo:
What Do You Say When Writing a Text About Test ? ITC 1985: 236-238 - Kenneth Rose:
Test Technology In a University Setting. ITC 1985: 239-240 - Al A. Tuszynski:
Curriculum for a Rapidly Changing Technology. ITC 1985: 241-243
Session 8: Automatic Test Program Generation Techniques
- James G. Wilber:
Enhancing Device Test Programming Productivity: The CATalyst Automated Test Program Generator. ITC 1985: 252-262 - Keiji Muranaga, Kyoshiro Sakurada, Yukio Oikawa:
Language Independent Test Generation. ITC 1985: 263-270 - Shmuel Shalem:
DIP : A Diagnostics Processor. ITC 1985: 271-278 - Maurizio Contini:
The Autopal Test Process. ITC 1985: 279-285 - Claude J. Pany:
Simplifying Analog Device Test Program Generation. ITC 1985: 286-290 - Tom Middleton:
Recycling Functional Test Vectors: Techniques and Tools for Pattern Conversion. ITC 1985: 291-303
Session 9: Test Generation System Directons - II
- Harry H. Chen, Robert G. Mathews, John A. Newkirk:
An Algorithm to Generate Tests for MOS Circuits at the Switch Level. ITC 1985: 304-312 - R. Chandramouli, Hector R. Sucar:
Defect Analysis and Fault Modeling in MOS Technology. ITC 1985: 313-321 - Mark E. Turner, Duane G. Leet, Ronald J. Prilik, David J. McLean:
Testing CMOS VLSI: Tools, Concepts, and Experimental Results. ITC 1985: 322-328 - T. Shimono, K. Oozeki, M. Takahashi, Masato Kawai, Shigehiro Funatsu:
An AC/DC Test Generation System for Gate Array LSIs. ITC 1985: 329-333 - Kenneth D. Wagner:
The Error Latency of Delay Faults in Combinational and Sequential Circuits. ITC 1985: 334-341 - Gordon L. Smith:
Model for Delay Faults Based upon Paths. ITC 1985: 342-351
Session 10: New Developments in Built-In-Self-Test
- Paul H. Bardell, William H. McAnney:
Self-Test of Random Access Memories. ITC 1985: 352-355 - Robert H. Fujii, Jacob A. Abraham:
Self-Test for Microprocessors. ITC 1985: 356-361 - Andrzej Krasniewski, Alexander Albicki:
Automatic Design of Exhaustively Self-Testing Chips with Bilbo Modules. ITC 1985: 362-371 - Frances D. Koo, Gene W. Lee:
Isolating Failures within VLSI Chips That Incorporate Signature Analysis and Set/Scan Techniques. ITC 1985: 372-379
Session 11: Non - Traditional Board Testing
- Frans P. M. Beenker:
Systematic and Structured Methods for Digital Board Testing. ITC 1985: 380-385 - Stephen F. Filippone:
Automating Test-Bed Fault Detection and Diagnosis. ITC 1985: 386-392 - Jaffery C. Phillips:
A Programmable Bus Emulation Technique for Processor Based and Peripheral Printed Circuit Boards. ITC 1985: 393-398 - Dom Marro:
Automatic Visual Test of Surface Mount Assemblies. ITC 1985: 399-402 - Scott T. Jones:
Flexible Inspection Systems (FIS) for Printed Circuit Board Production: ATE Finds a Quality Partner. ITC 1985: 403-412 - Herb Boulton:
New Concepts of Applying Thermographic Testing to Printed Circuit Boards and Finished Products. ITC 1985: 413-419
Session 12: VLSI Test Systems - Solution to Specific Problems
- Antony K. Stevens:
MHz Frequency Counting with VLSI Testers 420. ITC 1985: 420-427 - D. R. Morris:
Universal Signal Routing Card. ITC 1985: 428-430 - Ryozou Yoshino, Ryuichi Takagi:
Custom VLSI Test System. ITC 1985: 431-437
Session 13: Momory Test - The Changing Scene
- M. Shimizu, N. Okino, J. Nishiura, H. Maruyama:
Memory Embedded VLSI Gate Array Testing. ITC 1985: 438-444 - D. Rodgers, M. Shepherd:
Asynchronous FIFO's Require Special Attention. ITC 1985: 445-450 - Hiroshi Miyamoto, Koichiro Mashiko, Yoshikazu Morooka, Kazutami Arimoto, Michihiro Yamada, T. Nakano:
Test Pattern Considerations for Fault Tolerant High Density DRAM. ITC 1985: 451-455 - T. Fujieda, N. Arai:
Considerations of the Testing of RAMs with Dual Ports. ITC 1985: 456-461 - Thirumalai Sridhar:
A New Parallel Test Approach for Large Memories. ITC 1985: 462-470 - Grady Giles, Craig Hunter:
A Methodology for Testing Content Addressable Memories. ITC 1985: 471-475
Session 14: Test Generation and Design Verification Techniques
- Nagesh Vasanthavada, Peter N. Marinos:
An Operationally Efficient Scheme for Exhaustive Test-Pattern Generation Using Linear Codes. ITC 1985: 476-482 - Magdy S. Abadir, Hassan K. Reghbati:
Functional Test Generation for LSI Circuits Described by Binary Decision Diagrams. ITC 1985: 483-492 - Wu-Tung Cheng, Janak H. Patel:
Multiple-Fault Detection in Iterative Logic Arrays. ITC 1985: 493-499 - Vinod K. Agarwal, Janusz Rajski:
Testing Properties and Applications of Inverter-Free PLA's. ITC 1985: 500-507 - Andrew V. Goldberg, Karl J. Lieberherr:
Efficient Test Generation Algorithms. ITC 1985: 508-517
Session 15: Quality/ Reliability
- Jill M. McPhee:
The Effects of Backdriving Integrated Circuits : An Accurate Electro-Thermal Model. ITC 1985: 518-522 - Frank H. Hielscher, John C. Pagano:
Backdrive Stress-Testing of CMOS Gate Array Circuits. ITC 1985: 523-533 - Josef H. Hendriks:
Overdriving NMOS and CMOS VLSI Circuits. ITC 1985: 534-539 - Howard D. Helms:
Various Architectures of Systems for Measuring Early-Life Failure Rates of Semiconductor Components. ITC 1985: 540-543 - Jerry M. Soden, Charles F. Hawkins:
Electrical Characteristics and Testing Considerations for Gate Oxide Shorts in CMOS ICs. ITC 1985: 544-557
Session 16: Disign for Testability
- Patrick P. Fasang, Michael A. Schuette, John Paul Shen, William A. Gwaltney:
Automated Design for Testability of Semicustom Integrated Circuits. ITC 1985: 558-564 - Robert J. Orsello:
Programmable Logic: Testability by Design. ITC 1985: 565-566 - Dong Sam Ha, Sudhakar M. Reddy:
On the Design of Testable Domino PLAs. ITC 1985: 567-573 - Hideo Fujiwara, Kewal K. Saluja, Kozo Kinoshita:
A Testable Design of Programmable Logic Arrays with Universal Control and Minimal Overhead. ITC 1985: 574-582 - James Jacob, Nripendra N. Biswas:
: A Testable PLA Design with Minimal Hardware and Test Set. ITC 1985: 583-588 - Albert Lam, Savio N. Chau, Huy Luong:
Design of a Class of Self-Exercising Combinational Circuits. ITC 1985: 589-601
Session 17: The Tester Interface: Board Testing and Chip Probing
- Martin I. Eiger, Michele J. Chabot:
Algorithms for High-Performance Fixture Wiring. ITC 1985: 602-609 - H. S. Lahman, C. L. Johnson:
A Computerized Solution to the Fixture-Wiring Problem. ITC 1985: 610-617 - Tim Moore, Stephen Garner:
Auto-Probing on the L200 Functional Tester. ITC 1985: 618-628 - James Congdon:
Driver/Sensor Design for High-Performance ATE. ITC 1985: 629-633 - T. Shiragasawa, M. Sugano, Yoshihisa Mano, M. Noyori:
An On-Lined Laser Probing System for Diagnosing Scaled VLSI. ITC 1985: 634-642 - Norio Kuji, Teruo Tamama:
Automated Fault Diagnostic EB Tester and Its Application to a 40K-Gate VLSI Circuit. ITC 1985: 643-651
Session 18A: Tester Interfaces / Debug Tolls
- S. Daniel Lee, Lisa Deerr Li:
A Comprehensive Approach to Test Program Debugging for High Performance VLSI Test Systems. ITC 1985: 652-665 - Brijendra Sharma, Colin McIntyre, Gerard Labonville, Jose Avila:
Integrated Test Program Development Package. ITC 1985: 666-671 - Arthur E. Downey:
Waveform: A Software Tool for Efficient Test Program Development. ITC 1985: 672-677
Session 18B: Test Software Standards
- Reed I. White:
TRS and DTS : IC Test Result Standards. ITC 1985: 678-684 - L. J. Falkenstrom, David C. Keezer, A. Patterson, Robert M. Rolfe, J. Wolcott:
Tester Independent Support Software System (TISSS). ITC 1985: 685-691
Session 19: Logic Simulation and Simulation Models
- David Giles, Kenneth R. Bowden, Mike Haney, Gregory A. Maston:
Maintaining Simulation Accuracy through Physical Device Models. ITC 1985: 692-695 - Jeremy Richman, Kenneth R. Bowden:
The Modern Fault Dictionary. ITC 1985: 696-702 - Ernst G. Ulrich:
Concurrent Simulation at the Switch, Gate, and Register Levels. ITC 1985: 703-709 - William A. Rogers, Jacob A. Abraham:
CHIEFS : A Concurrent, Hierarchical and Extensible Fault Simulator. ITC 1985: 710-716 - Masahiko Kawamura, Kanji Hirabayashi:
AFS : An Approximate Fault Simulator. ITC 1985: 717-721 - Zeev Barzilai, Vijay S. Iyengar, Barry K. Rosen, Gabriel M. Silberman:
Accurate Fault Modeling and Efficient Simulation of Differential CVS Circuits. ITC 1985: 722-731
Session 20: Microprocessor / VLSI Test I
- Yashwant K. Malaiya:
Faults in Microprogrammed and Hardwired Control. ITC 1985: 732 - Carl Staelin, Alexander Albicki:
Evaluation ot Monitor Complexity for Concurrently Testing Microprogrammed Control Units. ITC 1985: 733-736 - Raoul Velazco, Haissam Ziade, E. Kolokithas:
A Microprocessor Test Approach Allowing Fault Localization. ITC 1985: 737-743 - D. K. Verbeek, William C. Bruce:
Testability Features of the MC68HC11. ITC 1985: 744-751 - Luis A. Basto, John R. Kuban:
Test Features ot the MC68881 Floating-Point Coprocessor. ITC 1985: 752-759
Session 21: Testability Analysis
- Predrag G. Kovijanic, Ramesh G. Kulkarni:
Testability Analysis of Programmable Array Logic. ITC 1985: 760-768 - Balakrishnan Krishnamurthy, Richard Li-Cheng Sheng:
A New Approach to the Use of Testability Analysis in Test Generation. ITC 1985: 769-778 - John A. Waicukauski, Eric Lindbloom, Edward B. Eichelberger, Donato O. Forlenza, Tim McCarthy:
A Statistical Calculation of Fault Detection Probabilities By Fast Fault Simulation. ITC 1985: 779-784 - Franc Brglez:
A Fast Fault Grader: Analysis and Applications. ITC 1985: 785-794 - Miron Abramovici:
Low-Cost Fault Simulation: Why, When and How. ITC 1985: 795 - Vishwani D. Agrawal:
STAFAN Takes a Middle Course. ITC 1985: 796 - Franc Brglez:
Fault Coverage Tools: Case Studies. ITC 1985: 797-800 - Prabhakar Goel, Chi-Lai Huang:
Statistical Fault Sampling and Full Fault Simulation. ITC 1985: 801-802 - Sharad C. Seth:
Predicting Fault Coverage from Probabilistic Testability. ITC 1985: 803-807
Session 22: Advanced Testing Techniques: Analog Devices and Systems
- D. Kazakos:
Statistical Failure Detection Methods for Linear Analog Systems. ITC 1985: 808-812 - Gerard N. Stenbakken, T. Michael Souders:
: Modeling and Test Point Selection for Data Converter Testing. ITC 1985: 813-817 - Clyde Browning:
Testing A/D Converters on Microcomputers. ITC 1985: 818-824 - H. Kitayoshi, S. Sumida, K. Shirakawa, S. Takeshita:
DSP Synthesized Signal Source for Analog Testing Stimulus and New Test Method. ITC 1985: 825-834 - Brent Schusheim:
Employing Multiple Test Techniques for Complex Telecommunications Devices. ITC 1985: 835-841 - F. Matthiesen, Michael J. Ohletz:
Test of Digital Transversal Filters. ITC 1985: 842-847
Session 23: Artificial Intelligence Applications to Test
- Patricia M. Ryan, A. Jesse Wilkinson:
Knowledge Acquisition for ATE Diagnosis. ITC 1985: 848-856 - Oliver Grillmeyer, A. Jesse Wilkinson:
The Design and Construction of a Rule Base and an Inference Engine for Test System Diagnosis. ITC 1985: 857-867 - Larry Apfelbaum:
An Expert System for In-Circuit Fault Diagnosis. ITC 1985: 868-874 - Stephen L. Lusky, Thirumalai Sridhar:
Detectable CMOS Faults in Switch-Level Simulation. ITC 1985: 875-883 - Kyushik Son:
Rule Based Testability Checker and Test Generator. ITC 1985: 884-891
Session 24: Microprocessor / VLSI Test II
- Frank F. Tsui:
The Cost and Speed Barriers in LSI/VLSI Testing : Can They Be Overcome By Testability Design ? ITC 1985: 892-906 - Ali Feizi, Damu Radhakrishnan:
Multiple Output Pass Networks: Design and Testing. ITC 1985: 907-911 - Bell Liu:
The Challenge of Configurable Logic Array Testing. ITC 1985: 912-921 - Tonysheng Lin, Stephen Y. H. Su:
VLSI Functional Test Pattern Generation: A Design and Implementation. ITC 1985: 922-929 - Uming Ko, Dinesh G. Patel, Francois J. Henley:
Contactless VLSI Laser Probing. ITC 1985: 930-937
Session 25A: IC Process and Test Data Management
- Robert W. Atherton, John L. Mudge:
Microprocessor Speed Optimization Using Pattern-Recognition Analysis of Parametric Test Data. ITC 1985: 938-948 - John D. Tobey:
Reducing Test Program Development Time for Memory Devices. ITC 1985: 949-953 - William P. Allaire:
Case Study: ATE Networking Using Peripheral Emulation. ITC 1985: 954-961
Session 25B: Printed Circuit Board Manufacturing Process
- Michael Dapron:
Linking Design Tools to In-Circuit Test Systems. ITC 1985: 962-971 - Peter Hansen:
Converting Device Test Vectors to an In-Circuit Board Test Environment. ITC 1985: 972-979 - Steven R. Nelson:
Distributed Factory Data Management-Breaking the Network Bottleneck. ITC 1985: 980-986
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