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ORCIDITC 1986: Washington, D.C., USA
- Proceedings International Test Conference 1986, Washington, D.C., USA, September 1986. IEEE Computer Society 1986
Keynote Speaker
- John R. Wallace:
Look Who's Refueling the Technology Race. ITC 1986: 3-6
Invited Speakers
- Willem D. Maris:
Testability, the Achilles Heel of Design. ITC 1986: 7 - Richard M. Sedmak:
On the Possible Limits of External Testing. ITC 1986: 8 - Michael J. Roberts:
Challenges in AC Testability : Testing Gigahertz Logic. ITC 1986: 9 - Arthur R. Braun:
Testing in the Data Communications Industries. ITC 1986: 10-11
Session 1: Design Techniques for Built-In-Self Test
- Syed Zahoor Hassan:
An Efficient Self-Test Structure for Sequential Machines. ITC 1986: 12-17 - Wilfried Daehn, Josef Gross:
A Test Generator IC for Testing Large CMOS-RAMs. ITC 1986: 18-24 - Laung-Terng Wang, Edward J. McCluskey:
Circuits for Pseudo-Exhaustive Test Pattern Generation. ITC 1986: 25-37 - Laung-Terng Wang, Edward J. McCluskey:
A Hybrid Design of Maximum-Length Sequence Generators. ITC 1986: 38-47 - Sheldon B. Akers:
A Parity Bit Signature for Exhaustive Testing. ITC 1986: 48-53 - William H. McAnney, Jacob Savir:
Built-In Checking of the Correct Self-Test Signature. ITC 1986: 54-59
Session 2: Using Test Data for Process Improvement
- Dennis Mancl, Mark J. Sullivan:
A Solution to Test Data Acquisition and Management. ITC 1986: 60-64 - William W. Bust, Charles R. Darst, Gregory G. Krysl:
ABNER : A Burn-In Monitor and Error Reporting System for PBX Systems Test. ITC 1986: 65-73 - Mark D. Winkel:
Using a Relational Database to Develop a Statistical Quality Control System for ATE. ITC 1986: 74-79 - Earl Dalton, Walter Ahern, Stephen Denker, Ken Sweitzer, Bill Cooper, Tom Kelly, Stan Smith:
Systematic Yield Improvement in Board Testing Practice. ITC 1986: 80-83 - David P. Cohoon, Jey Sheridan:
Case History of Networking a Wafer-Sort Area. ITC 1986: 84-89
Session 3: Test Generation Approaches and Algorithms
- Ioannis Stamelos, M. Melgara, M. Paolini, S. Morpurgo, C. Segre:
A Multi-Level Test Pattern Generation and Validation Environment. ITC 1986: 90-96 - Hongtao P. Chang, William A. Rogers, Jacob A. Abraham:
Structured Functional Level Test Generation Using Binary Decision Diagrams. ITC 1986: 97-104 - Noriyoshi Itazaki, Kozo Kinoshita:
Test Pattern Generation for Circuits with Three-state Modules by Improved Z-algorithm. ITC 1986: 105-112 - Ki Soo Hwang, M. Ray Mercer:
Informed Test Generation Guidance Using Partially Specified Fanout Constraints. ITC 1986: 113-120 - Ruey-Sing Wei, Alberto L. Sangiovanni-Vincentelli:
New Front-End and Line Justification Algorithm for Automatic Test Generation. ITC 1986: 121-128 - André Ivanov, Vinod K. Agarwal:
Testability Measures : What Do They Do for ATPG ? ITC 1986: 129-139
Session 4: Meeting the Performance and Complexity Challenge of VLSI
- Greg G. Freeman, Dick L. Liu, Bruce A. Wooley, Edward J. McCluskey:
Two CMOS Metastability Sensors. ITC 1986: 140-144 - William C. Bruce, C. C. Hunter, L. A. Basto:
Testing Barrel Shifters in Microprocessors. ITC 1986: 145-153 - E. Kofi Vida-Torku, James A. Monzel, Charles E. Radke:
Performance Assurance of Memories Embedded in VLSI Chips. ITC 1986: 154-160 - Mark R. Barber, Walter I. Satre:
Timing Measurements on CMOS VLSI Devices Designed to Drive TTL Loads. ITC 1986: 161-168 - Jody Van Horn:
Accurate, Cost Effective Performance Screening of VLSI Circuit Designs. ITC 1986: 169-175 - George Chiu, Jean-Mark Halbout:
Requirements and Trends for High Speed Testing. ITC 1986: 176-181
Session 5: Trends and Tradeoffs in Test Economics
- Barry Baril:
ASIC Verification: Second Generation Systems and Solutions. ITC 1986: 182-189 - Al A. Tuszynski:
Memory Chip Test Economics. ITC 1986: 190-194 - Judith E. Dayhoff, Robert W. Atherton:
Financial Impact of Tester Reliability Improvements. ITC 1986: 195-204 - Jerry Perone:
Reducing Test Costs Through Strategic Changes in Maintenance and Service. ITC 1986: 205-212 - Ron Leckie:
A Model for Analyzing Test Capacity, Cost, and Productivity. ITC 1986: 213-219 - Wendell Damm, Pete Janowitz, Michael Hagen, YeeMay Shih, Glenn Widener:
Vernier Method for Calibration ot High-Speed Sampling System. ITC 1986: 220
Session 6: Poster Session
- Joe Kirschling:
Quickly Developing Effective Codec Tests on an In-Circuit Board Test System. ITC 1986: 221-221 - Mark Rich:
A Method of Flexible Catch RAM Display for Memory Testing. ITC 1986: 222 - Kemon P. Taschioglou:
Test to Eliminate Test. ITC 1986: 223 - Ronald J. Short:
The DASS Needs You ! : An Update on the Activities of the DASS. ITC 1986: 224 - Richard Nohelty:
Test System Architecture for Testing Advanced Mixed-Signal Devices. ITC 1986: 225-227
Session 7: Panel Sesion: Advanced Burn-In and Life Test Techniques
- Eugene R. Hnatek:
IC Burn-In : The Changing Scene. ITC 1986: 228-231
Session 9: Analysis Techniques for Built-In-Self-Test
- Mark Paraskeva, Anthony P. Ambler, D. F. Burrows, W. L. Knight, I. D. Dear:
Economically Viable Automatic Insertion of Self-Test Features for Custom VLSI. ITC 1986: 232-243 - Balakrishnan Krishnamurthy, Ioannis G. Tollis:
Improved Techniques for Estimating Signal Probabilities. ITC 1986: 244-251 - Sreejit Chakravarty, Harry B. Hunt III:
On the Computation of Detection Probability for Multiple Faults. ITC 1986: 252-262 - Jacob Savir, William H. McAnney:
Random Pattern Testability of Delay Faults. ITC 1986: 263-273 - A. J. Briers, K. A. E. Totton:
Random Pattern Testability by Fast Fault Simulation. ITC 1986: 274-281 - Tom W. Williams, Wilfried Daehn, Matthias Gruetzner, Corot W. Starke:
Comparison of Aliasing Errors for Primitive and Non-Primitive Polynomials. ITC 1986: 282-289
Session 10: Advances in Board Test Technology
- Joe Kirschling:
Testing GaAs Devices with a Digital In-Circuit Test System. ITC 1986: 290-294 - Richard L. Swent, Michael J. Ward:
Thermal Analysis of Backdriven Output Transistors. ITC 1986: 295-303 - Vin Ratford, Paul Keating:
Integrating Guided Probe and Fault Dictionary: An Enhanced Diagnostic Approach. ITC 1986: 304-311 - Mike Fabish:
A Strategy for Enhancing Fault Coverage on VLSI Circuit Boards Using Performance In-Circuit Test Techniques. ITC 1986: 312-316 - Harry Bleeker, D. van de Lagemaat:
Testing a Board Loaded with Leaded and Surface Mounted Components. ITC 1986: 317-321 - Robert J. Russell:
A Method of Improving In-Circuit Test Effectiveness. ITC 1986: 322-331
Session 11: Modeling, Simulation, and Design Verification
- Gabriel M. Silberman, Ilan Y. Spillinger:
The Difference Fault Model : Using Functional Fault Simulation to Obtain Implementation Fault Coverage. ITC 1986: 332-339 - Chantal Vivier, Georges Fournie:
Automatic Modelling of MOS Transistor Networks for Test Pattern Generation. ITC 1986: 340-349 - Alberto L. Sangiovanni-Vincentelli, Ruey-Sing Wei:
PROTEUS : A Logic Verification System for Combinational Circuits. ITC 1986: 350-359 - David O. Lahti, Grace C. Chen-Ellis:
PROSPECT : A Production System for Partitioning and Evaluating Chip Testability. ITC 1986: 360-367 - Joseph L. A. Hughes, Edward J. McCluskey:
Multiple Stuck-At Fault Coverage of Single Stuck-At Fault Test Sets. ITC 1986: 368-374 - Scott Davidson, James L. Lewandowski:
ESIM/AFS : A Concurrent Architectural Level Fault Simulator. ITC 1986: 375-385
Session 12: Testing the Newest Generation of Microprocessors
- Boyd Henshaw:
An MC68020 Users Test Program. ITC 1986: 386-393 - P. Seetharamaiah, V. R. Murthy:
Tabular Mechanisation for Flexible Testing of Microprocessors. ITC 1986: 394-407 - Grady Giles, Kenneth Scheuer:
Testability Features of the MC68851 PMMU. ITC 1986: 408-411 - F. Warren Shih, Hu H. Chao, Shauchi Ong, Andrew L. Diamond, Jeffrey Yuh-Fong Tang, Cynthia A. Trempel:
Testability Design for Micro/370, a System/370 Single Chip Microprocessor. ITC 1986: 412-418 - Jesse G. Crane:
Testing the Sperry 36/72 Bit CMOS Micromainframe Chip Set. ITC 1986: 419-421
Session 13: Quality and Reliability
- A. Dale Flowers, Kamlesh Mathur, John Isakson:
Statistical Process Control Using the Parametric Tester. ITC 1986: 422-427 - M. Aghazadeh, M. Kirschner:
Transient Thermal Characteristics of VLSI Devices : Evaluation and Application. ITC 1986: 428-434 - Mario Lúcio Côrtes, Edward J. McCluskey:
An Experiment on Intermittent-Failure Mechanisms. ITC 1986: 435-442 - Jerry M. Soden, Charles F. Hawkins:
Reliability and Electrical Properties of Gate Oxide Shorts in CMOS ICs. ITC 1986: 443-451 - Birger Schneider, Gert Jørgensen, Mogens B. Christensen:
The Effects of Backdrive Stressing Fast IC Technologies. ITC 1986: 452-464 - J. Laurent, L. Bergher, Bernard Courtois, Jacques P. Collin:
Towards Automatic Failure Analysis of Complex ICs Through E-Beam Testing. ITC 1986: 465-473
Session 14: Design for Testability-Methods and Measures
- Leendert M. Huisman, Larry Carter, Tom W. Williams:
TRIM : Testability Range by Ignoring the Memory. ITC 1986: 474-479 - Robert H. Fujii, Jacob A. Abraham:
Approaches to Circuit Level Design for Testability. ITC 1986: 480-483 - Rafic Z. Makki, C. Tiansheng:
Designing Testable Control Paths with Multiple and Feedback Scan-Paths. ITC 1986: 484-492 - M. Ray Mercer:
Logic Elements for Universally Testable Circuits. ITC 1986: 493-497 - Rhonda Kay Gaede, M. Ray Mercer, Bill Underwood:
Calculation of Greatest Lower Bounds Obtainable by the Cutting Algorithm. ITC 1986: 498-505 - Jian-Cao Wang, Daozheng Wei:
A New Testability Measure for Digital Circuits. ITC 1986: 506-513
Session 15A: CMOS Modeling, Test Generation, and Fault Simulation
- Niraj K. Jha:
Detecting Multiple Faults in CMOS Circuits. ITC 1986: 514-519 - Zeev Barzilai, J. Lawrence Carter, Vijay S. Iyengar, Indira Nair, Barry K. Rosen, Joe D. Rutledge, Gabriel M. Silberman:
Efficient Fault Simulation of CMOS Circuits with Accurate Models. ITC 1986: 520-529 - S. Koeppe:
Modeling and Simulation of Delay Faults in CMOS Logic Circuits. ITC 1986: 530-537
Session 16A: Inexpensive Testing Techniques
- David M. Wu, Charles E. Radke, J. Paul Roth:
Statistical AC Test Coverage. ITC 1986: 538-541 - John A. Waicukauski, Eric Lindbloom, Vijay S. Iyengar, Barry K. Rosen:
Transition Fault Simulation by Parallel Pattern Single Fault Propagation. ITC 1986: 542-551 - Shmuel Shalem:
Functional Testing of the NS32332 \muProcessor. ITC 1986: 552-560 - Timothy J. Mulrooney:
Inexpensive Microprocessor Testing of Custom Integrated Circuits on Wafers, Packages, and Boards. ITC 1986: 561-567 - James D. Bray:
ATE Test Head Requirements for Low-Cost VLSI Testing. ITC 1986: 568-591
Session 16B: Advanced Test Approaches and Methods
- Ben Wells:
A Prober/Handler Interface for High Pin-Count ASIC Devices. ITC 1986: 592-599 - Hideo Todokoro, Shouzou Yoneda, Sigemitu Seitou, Sigeyuki Hosoki:
Electron Beam Tester with 10 ps Time Resolution. ITC 1986: 600-606 - Francois J. Henley:
Tests of Hermetically Sealed LSI/VLSI Devices by Laser Photoexcitation Logic Analysis. ITC 1986: 607-611
Session 17: CAE and Workstation
- Noah Morgan:
An Automated Menu Screen Generation Software Tool for VLSI ATE Programming and Operation. ITC 1986: 612-620 - Rihard S. Chomiczewski:
VIVED : A Visual Vector Editor. ITC 1986: 621-625 - Jim Teisher:
Improved Workstation/Tester Interface Is the Key to the Quality of Test-Program Generation. ITC 1986: 626-630 - Fred Cox, Lloyd K. Konneker, Douglas Moreland:
Visual Programming for Analog/Hybrid ATE. ITC 1986: 631-636 - Maqsoodul Mannan:
Instability : A CAD Dilemma. ITC 1986: 637-643 - Stefano Concina, Gerald Liu, Len Lattanzi, Semyon Reyfman, Neil Richardson:
Software Integration in a Workstation-Based F-Beam Tester. ITC 1986: 644-651
Session 18: Advanced Testing of Analog-Digital Devices and Systems
- Toshio Tamamura:
Video DAC/ADC Dynamic Testing. ITC 1986: 652-659 - Steven M. McIntyre:
Testing 10-Bit A/D Converter with a Digital VLSI Tester. ITC 1986: 660-664 - David P. Orecchio:
ISDN, Analog or Digital Test ? ITC 1986: 665-672 - Randall Kramer:
ISDN Device Testing Demands a New Level of Performance for Automatic Test Equipment. ITC 1986: 673-682 - T. Noguchi, Atsushi Murakami, Masato Kawai, Y. Hayasaka:
Testing for a Solid-State Color Image Sensor. ITC 1986: 683-687
Session 19A: Design for Testability-PLAs, Scan Paths, and Verification Techniques
- Dong Sam Ha, Sudhakar M. Reddy:
On the Design of Random Pattern Testable PLAs. ITC 1986: 688-695 - Magdy S. Abadir, Melvin A. Breuer:
Scan Path with Look Ahead Shifting (SPLASH). ITC 1986: 696-704 - Dali L. Tao, Carlos R. P. Hartmann, Parag K. Lala:
A Concurrent Testing Strategy for PLAs. ITC 1986: 705-709 - Kohei Fukuoka, Ken Ohga, Atsushi Sugiyama, Satoshi Takemura:
DVTS: Design Verification Techniques for Functional Simulation. ITC 1986: 710-717
Session 19B: Panel Session: Deterministic Versus Random Testing
- Vishwani D. Agrawal, M. Ray Mercer:
Deterministic Versus Random Testing. ITC 1986: 718 - Parag K. Lala:
On Built-In Testing of VLSI Chips. ITC 1986: 719-721
Session 20: Artificial Intelligence Applications to Test-part I
- Chi W. Yau:
Concurrent Test Generation Using AI Techniques. ITC 1986: 722-731 - Nagendra C. E. Srinivas, Anthony S. Wojcik, Ytzhak H. Levendel:
An Artificial Intelligence Based Implementation of the P-Algorithm for Test Generation. ITC 1986: 732-739 - Rik Fischer Smoody:
ARNOLD: Applying an AI Workstation to Production Test Code Generation. ITC 1986: 740-742 - N. A. Jones, Keith Baker:
An Intelligent Knowledge-Based System Tool for High-Level BIST Design. ITC 1986: 743-749 - Steve D. Bedrosian:
The Role of Pattern Recognition in VLSI Testing. ITC 1986: 750-755
Session 21: Accuracy and Performance-They'll Get You Every Time!
- Michael Keating:
Fundamental Limits to Timing Accuracy. ITC 1986: 756-762 - Stephen A. Cohen:
A New Pin Electronics Architecture for High Performance Functional Module Testing. ITC 1986: 763-770 - Daniel R. Simpkins:
Testing FMAX in a Production Environment. ITC 1986: 771-777 - J. Stephen Pabst:
Timing Accuracy and Yield Estimation. ITC 1986: 778-787 - Eric Rosenfeld:
Accuracy and Repeatability with DSP Test Methods. ITC 1986: 788-797
Session 22: Memory Test-From FIFO to Video
- Al Tejeda, George Conner:
Innovative Video RAM Testing. ITC 1986: 798-807 - Al Mostacciuolo:
Transmission Problems Encountered When Testing Memory Devices in Parallel on Memory ATE. ITC 1986: 808-818 - A. Kanadjian, D. Rodgers, M. Shepherd:
FIFO Test Program Development. ITC 1986: 819-825 - Y. Nishimura, Mitsuhiro Hamada, Hideto Hidaka, Hideyuki Ozaki, Kazuyasu Fujishima, Y. Hayasaka:
Redundancy Test for 1 Mbit DRAM Using Multi-Bit-Test Mode. ITC 1986: 826-829 - Kim T. Le, Kewal K. Saluja:
A Novel Approach for Testing Memories Using a Built-In Self Testing Technique. ITC 1986: 830-839 - T. J. Knips, D. J. Malone:
Designing Characterization Tests for Bipolar Array Performance Verification. ITC 1986: 840-847
Session 23: Software Solutions to Testing Challenges
- Masato Kawai, T. Shimono, Shigehiro Funatsu:
Test Data Quality Assurance. ITC 1986: 848-852 - Vladimir Cherkassky, Larry L. Kinney:
A Group Probing Strategy for Testing Large Number of Chips. ITC 1986: 853-856 - Norio Kuji, Teruo Tamama:
An Automated F-Beam Tester with CAD Interface, "Finder": A Powerful Tool for Fault Diagnosis of ASICs. ITC 1986: 857-863 - Endre F. Sarkany, J. Feeney, J. Muhr:
A Functional Test Program Generator. ITC 1986: 864-868 - Takashi Hidai, Toshi Matsumoto, Fumiro Tsuruda:
Test Program Debugging Environment for Linear IC Testers. ITC 1986: 869-874 - Charles D. Havener:
Issues That Arise in Translating VLSI Test Programs Between Testers. ITC 1986: 875-887
Session 24: Systems Test
- Hasan Elhuni, Larry L. Kinney:
Techniques for Testing Hexagonally Connected Systolic Arrays. ITC 1986: 888-894 - Cheng Hsien Tung, John P. Robinson:
On Concurrently Testable Microprogrammed Control Units. ITC 1986: 895-900 - Nagesh Vasanthavada, Peter N. Marinos, Gerald S. Mersten:
Testing of Fault-Tolerant Clock Systems. ITC 1986: 901-907 - P. Veronneau, Pierre N. Robillard:
Proposed Test Method to Prove Software Having a Vector Space Behavior. ITC 1986: 908-912 - Günhan Kildiran, Peter N. Marinos:
Functional Testing of Microprocessor-like Architectures. ITC 1986: 913-920 - Yehuda Baron:
Self Diagnostics on System Level by Design. ITC 1986: 921-929
Session 25: Artificial Intelligence Applications to Test-Part II
- Bruce L. Havlicsek:
A Knowledge Based Diagnostic System for Automatic Test Equipment. ITC 1986: 930-938 - Mary C. Murphy-Hoye:
Artificial Intelligence in Semiconductor Manufacturing for Process Development, Functional Diagnostics, and Yield Crash Prevention. ITC 1986: 939-946 - Larry Apfelbaum:
Improving In-Circuit Diagnosis of Analog Networks with Expert Systems Techniques. ITC 1986: 947-953 - M. Arif Samad, José A. B. Fortes:
Explanation Capabilities in DEFT : A Design-For-Testability Expert System. ITC 1986: 954-963 - A. Jesse Wilkinson:
Benchmarking an Expert System for Electronic Diagnosis. ITC 1986: 964-971 - Oliver Grillmeyer:
Making a Test System Diagnostic Usable. ITC 1986: 972-977
Session 26: search Techniques That You Can Use!
- Yih-Chyun Jenq:
Automated Effective-Bit Characterization of Waveform Digitizers. ITC 1986: 978-980 - Eric Rosenfeld:
DSP Measurement of Frequency. ITC 1986: 981-986 - Michael Keating:
An Improved Search Algorithm. ITC 1986: 987-992 - K. Moriwaki, S. Ishiyama, K. Takizawa, F. Kobayashi, S. Sekine, Y. Hinataze:
A Test System tor High Density and High Speed Digital Board. ITC 1986: 993-996 - J. S. R. Subrahmanyam, Parimal Pal Chaudhuri:
A Divide and Conquer Testing Strategy for Detection of Multiple Faults by SFDTS. ITC 1986: 997-1006
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