Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDSBAC-PAD 2005: Rio de Janeiro, Brazil
- 17th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2005), 24-27 October 2005, Rio de Janeiro, Brazil. IEEE Computer Society 2005, ISBN 0-7695-2446-X
Invited Papers
- Ronald H. Perrott:
e-Science and its application: Life Sciences and Finance. 2-9 - Peter W. Haas, Michael M. Resch:
High Performance Computing in Science and Engineering. 10-18
Parallel and Distributed Algorithm, Routing and Communication
- Aletéia Patrícia Favacho de Araújo
, Sebastián Urrutia:
Towards Grid Implementations of Metaheuristics for Hard Combinatorial Optimization Problems. 19-26 - Vaclav Dvorak:
Scheduling Collective Communications on Wormhole Fat Cubes. 27-34 - Rafael Dueire Lins:
A New Multi-Processor Architecture for Parallel Lazy Cyclic Reference Counting. 35-43
Application-Specific Architectures and Reconfigurable Systems
- Sacki Agelis, Magnus Jonsson:
Reconfigurable Optical Interconnection System Supporting Concurrent Application-Specific Parallel Computing. 44-51 - Ling Zhuo, Viktor K. Prasanna:
High-Performance and Area-Efficient Reduction Circuits on FPGAs. 52-59 - Alexandro Baldassin, Paulo Centoducatte, Sandro Rigo:
Extending the ArchC Language for Automatic Generation of Assemblers. 60-68
Grid, Cluster, Pervasive, and Heterogeneous Computing I
- Aline de Paula Nascimento, Alexandre da Costa Sena, Jacques Alves da Silva, Daniela Q. C. Vianna, Cristina Boeres, Vinod E. F. Rebello:
Managing the Execution of Large Scale MPI Applications on Computational Grids. 69-76 - Mauricio Moraes, Luciano Cavalheiro da Silva, Alberto E. Schaeffer Filho, Cláudio Fernando Resin Geyer, Adenauer C. Yamin, Iara Augustin:
A Scalable Dissemination Service for the ISAM Architecture. 77-84 - Eduardo Blanco, Yudith Cardinale, Carlos Figueira, Emilio Hernández, Robinson Rivas, Marta Rukoz:
Remote Data Service Installation on a Grid-enabled Java Platform. 85-92
Languages, Compilers, and Tools
- Rafael Ennes Silva, Guilherme P. Pezzi, Nicolas Maillard, Tiarajú Asmuz Diverio:
Automatic Data-Flow Graph Generation of MPI Programs. 93-100 - Peng Zhao, José Nelson Amaral:
Function Outlining and Partial Inlining. 101-108 - Cristina Enomoto, Marco Aurélio Amaral Henriques:
A Flexible Specification Model based on XML for Parallel Applications. 109-117
Processor Microarchitectures
- Guilherme Dal Pizzol, Philippe Olivier Alexandre Navaux:
Branch Prediction Topologies for SMT Architectures. 118-125 - Tatiana Gadelha Serra dos Santos, Sergio Bampi, Philippe Olivier Alexandre Navaux:
Reusing Traces in a Dynamic Conditional Execution Architecture. 126-133 - Yukinori Sato, Ken-ichi Suzuki, Tadao Nakamura:
Cooperation of Neighboring PEs in Clustered Architectures. 134-142
Grid, Cluster, Pervasive, and Heterogeneous Computing II
- Camille Furtado, Alexandre A. B. Lima, Esther Pacitti, Patrick Valduriez, Marta Mattoso:
Physical and Virtual Partitioning in OLAP Database Clusters. 143-150 - Eduardo Rocha Rodrigues, Airam Jonatas Preto, Stephan Stephany:
A new parallel environment for interactive simulations implementing safe multithreading with MPI. 151-158 - Renato Ferreira, Wagner Meira Jr., Dorgival Olavo Guedes Neto, Lúcia M. A. Drummond, Bruno Coutinho, George Teodoro, Tulio Tavares, Renata Braga Araújo, Guilherme T. Ferreira:
Anthill: A Scalable Run-Time Environment for Data Mining Applications. 159-167
Operating Systems
- Shlomit S. Pinter, Steven S. Shultz, Yariv Aridor, Sergey Guenender:
Improving Machine Virtualization with 'Hotplug Memory'. 168-175 - Rodrigo da Rosa Righi, Philippe Olivier Alexandre Navaux, Márcia C. Cera, Marcelo Pasin:
Asynchronous Communication in Java over Infiniband and DECK. 176-183 - Raimundo S. Barreto, Eduardo Tavares, Paulo Romero Martins Maciel, Meuse N. Oliveira Jr., Leonardo Amorim, Ricardo Massa Ferreira Lima, Cesar Carvalho, Carlos A. B. Mello:
A Time Petri Net-Based Approach for Software Synthesis Considering Overheads. 184-192
Processor and Cache Memory Architectures, Benchmarking, and Performance Analysis
- Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy Kurian John, Joydeep Ghosh:
Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation. 193-200 - José R. Brunheroto, Valentina Salapura, Fernando F. Redígolo, Dirk Hoenicke, Alan Gara:
Data cache prefetching design space exploration for BlueGene/L supercomputer. 201-208 - Miquel Pericàs, Adrián Cristal, Rubén González, Daniel A. Jiménez:
Chained In-Order/Out-of-Order DoubleCore Architecture. 209-217
Fault Tolerant Systems
- Lars-Olof Burchard, César A. F. De Rose, Hans-Ulrich Heiss, Barry Linnert, Jörg Schneider:
VRM: A Failure-Aware Grid Resource Management System. 218-227 - Raphael Y. de Camargo, Fabio Kon, Alfredo Goldman:
Portable checkpointing and communication for BSP applications on dynamic heterogeneous Grid environments. 226-234
Load Balancing
- Anthony Sulistio, Rajkumar Buyya:
A Time Optimization Algorithm for Scheduling Bag-of-Task Applications in Auction-based Proportional Share Systems. 235-242 - Lauro Costa, Walfredo Cirne, Daniel Fireman:
Converting Space Shared Resources into Intermittent Resources for use in Bag-of-Tasks Grids. 243-250 - Tianchi Ma, Rajkumar Buyya:
Critical-Path and Priority based Algorithms for Scheduling Workflows with Parameter Sweep Tasks on Global Grids. 251-258
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-04-25 20:49 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
