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ORCIDSBAC-PAD 2014: Paris, France
- 26th IEEE International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2014, Paris, France, October 22-24, 2014. IEEE Computer Society 2014, ISBN 978-1-4799-6904-3
Shared-Memory and Multi-core Systems
- Vladimir Gajinov, Igor Eric, Sasa Stojanovic, Veljko Milutinovic, Osman S. Unsal
, Eduard Ayguadé, Adrián Cristal:
A Case Study of Hybrid Dataflow and Shared-Memory Programming Models: Dependency-Based Parallel Game Engine. 1-8 - Alessandro Pellegrini, Francesco Quaglia:
Wait-Free Global Virtual Time Computation in Shared Memory TimeWarp Systems. 9-16 - Yun Rock Qu, Viktor K. Prasanna:
Compact Hash Tables for High-Performance Traffic Classification on Multi-core Processors. 17-24
Performance Optimization
- Dimitris Deyannis, Lazaros Koromilas, Giorgos Vasiliadis, Elias Athanasopoulos, Sotiris Ioannidis:
Flying Memcache: Lessons Learned from Different Acceleration Strategies. 25-32 - Monica Rodriguez, Iván Cores, Patricia González, María J. Martín:
Improving an MPI Application-Level Migration Approach through Checkpoint File Splitting. 33-40 - Cheng Chen, Yunfei Du, Hao Jiang, Ke Zuo, Canqun Yang:
HPCG: Preliminary Evaluation and Optimization on Tianhe-2 CPU-only Nodes. 41-48 - João Moreira, Lucas Teixeira, Edson Borin, Sandro Rigo:
Leveraging Optimization Methods for Dynamically Assisted Control-Flow Integrity Mechanisms. 49-56
Energy Aware Computing
- Márcio Castro, Fabrice Dupros, Emilio Francesquini, Jean-François Méhaut, Philippe Olivier Alexandre Navaux:
Energy Efficient Seismic Wave Propagation Simulation on a Low-Power Manycore Processor. 57-64 - Francisco Gaspar, Aleksandar Ilic, Pedro Tomás, Leonel Sousa:
Performance-Aware Task Management and Frequency Scaling in Embedded Systems. 65-72 - Branimir Dickov, Miquel Pericàs, Paul M. Carpenter, Nacho Navarro, Eduard Ayguadé:
Analyzing Performance Improvements and Energy Savings in Infiniband Architecture using Network Compression. 73-80
Hardware Accelerators I
- Tuan Tu Tran, Simon Schindel, Yongchao Liu, Bertil Schmidt:
Bit-Parallel Approximate Pattern Matching on the Xeon Phi Coprocessor. 81-88 - Guilherme Andrade, Renato Ferreira, George Teodoro, Leonardo Rocha, Joel H. Saltz, Tahsin M. Kurç:
Efficient Execution of Microscopy Image Analysis on CPU, GPU, and MIC Equipped Cluster Systems. 89-96 - Shijie Zhou, Prashant Rao Nittoor, Viktor K. Prasanna:
High-Performance Traffic Classification on GPU. 97-104 - Leonardo de Oliveira Martins, Marco Aurelio Goncalves da Silva, Marcelo Arruda, Joner Duarte, Pedro Mario Silva, Roberto Beauclair Seixas, Marcelo Gattass:
Accelerating Curvature Estimate in 3D Seismic Data Using GPGPU. 105-111 - Florentino Sainz, Sergi Mateo, Vicenç Beltran, José Luis Bosque, Xavier Martorell, Eduard Ayguadé:
Leveraging OmpSs to Exploit Hardware Accelerators. 112-119
Transactional Memory
- Ricardo Quislant, Eladio Gutiérrez, Emilio L. Zapata, Oscar G. Plata:
Improving Signature Behavior by Irrevocability in Transactional Memory Systems. 120-127 - Ricardo Quislant, Eladio Gutiérrez, Oscar G. Plata:
Scalability Analysis of Signatures in Transactional Memory Systems. 128-135 - Felipe L. Teixeira, Maurício L. Pilla, André Rauber Du Bois, Daniel Mossé:
Profiling Patterns of Bit Flipping for Software Transactional Memories. 136-143 - Márcio Machado Pereira, Matthew Gaudet, José Nelson Amaral, Guido Araujo:
Multi-dimensional Evaluation of Haswell's Transactional Memory Performance. 144-151 - Vesna Smiljkovic, Srdan Stipic, Christof Fetzer, Osman S. Unsal, Adrián Cristal, Mateo Valero:
DeTrans: Deterministic and Parallel execution of Transactions. 152-159
Hardware Accelerators II
- Jieun Lim, Hyesoon Kim:
Design Space Exploration of Memory Model for Heterogeneous Computing. 160-167 - Yash Ukidave, Charu Kalra, David R. Kaeli, Perhaad Mistry, Dana Schaa:
Runtime Support for Adaptive Spatial Partitioning and Inter-Kernel Communication on GPUs. 168-175 - Emerson Carlos Pedrino, Marcio Merino Fernandes:
Automatic Generation of Custom Parallel Processors for Morphological Image Processing. 176-181 - Spiridon F. Beldianu, Sotirios G. Ziavras:
ASIC Design of Shared Vector Accelerators for Multicore Processors. 182-189 - Adrián Pérez Diéguez, Margarita Amor, Ramon Doallo:
Efficient Scan Operator Methods on a GPU. 190-197
Memory Hierarchy
- Eduardo Henrique Molina da Cruz, Matthias Diener, Marco A. Z. Alves, Laércio Lima Pilla, Philippe Olivier Alexandre Navaux:
Optimizing Memory Locality Using a Locality-Aware Page Table. 198-205 - Mansour Shafaei, Yunsi Fei:
HiTS: A High Throughput Memory Scheduling Scheme to Mitigate Denial-of-Service Attacks in Multi-core Systems. 206-213 - Bharath Narasimha Swamy, Alain Ketterlin, André Seznec:
Hardware/Software Helper Thread Prefetching on Heterogeneous Many Cores. 214-221
Chip-Level Optimizations
- Francis B. Moreira, Marco A. Z. Alves, Israel Koren:
Profiling and Reducing Micro-Architecture Bottlenecks at the Hardware Level. 222-229 - Rachata Ausavarungnirun, Chris Fallin, Xiangyao Yu, Kevin Kai-Wei Chang, Greg Nazario, Reetuparna Das, Gabriel H. Loh, Onur Mutlu:
Design and Evaluation of Hierarchical Rings with Deflection Routing. 230-237 - Alexandra Ferrerón-Labari, Darío Suárez Gracia, Jesús Alastruey-Benedé, Teresa Monreal Arnal, Víctor Viñals:
Block Disabling Characterization and Improvements in CMPs Operating at Ultra-low Voltages. 238-245
Fine-Grained Parallelism
- Ruben Gran, August Shi, Ehsan Totoni, María Jesús Garzarán:
Evaluation of a Feature Tracking Vision Application on a Heterogeneous Chip. 246-253 - Ioana Baldini, Stephen J. Fink, Erik R. Altman:
Predicting GPU Performance from CPU Runs Using Machine Learning. 254-261 - José Ignacio Aliaga, Rosa M. Badia, Maria Barreda, Matthias Bollhöfer, Enrique S. Quintana-Ortí:
Leveraging Task-Parallelism with OmpSs in ILUPACK's Preconditioned CG Method. 262-269 - Michail Alvanos, José Nelson Amaral, Ettore Tiotto, Montse Farreras, Xavier Martorell:
Reducing Compiler-Inserted Instrumentation in Unified-Parallel-C Code Generation. 270-277 - Artur Mariano, Shahar Timnat, Christian H. Bischof:
Lock-Free GaussSieve for Linear Speedups in Parallel High Performance SVP Calculation. 278-285
Grid and Cloud Computing
- Walid Saad, Leila Abidi, Heithem Abbes, Christophe Cérin, Mohamed Jemni:
Wide Area BonjourGrid as a Data Desktop Grid: Modeling and Implementation on Top of Redis. 286-293 - Guthemberg Silvestre, Carla Sauvanaud, Mohamed Kaâniche, Karama Kanoun:
An Anomaly Detection Approach for Scale-Out Storage Systems. 294-301 - Olivier Beaumont, Lionel Eyraud-Dubois, Juan Ángel Lorenzo del Castillo:
Analyzing Real Cluster Data for Formulating Allocation Algorithms in Cloud Platforms. 302-309 - Anshul Gandhi, Parijat Dube, Alexei A. Karve, Andrzej Kochut, Li Zhang:
Modeling the Impact of Workload on Cloud Resource Scaling. 310-317
Parallel and Distributed Systems
- Sergio Iserte, Adrián Castelló, Rafael Mayo, Enrique S. Quintana-Ortí, Federico Silla, José Duato, Carlos Reaño, Javier Prades:
SLURM Support for Remote GPU Virtualization: Implementation and Performance Study. 318-325 - Roberto Gioiosa, Gokcen Kestor, Darren J. Kerbyson, Adolfy Hoisie:
Cross-Layer Self-Adaptive/Self-Aware System Software for Exascale Systems. 326-333 - Rodolfo Wottrich, Rodolfo Azevedo, Guido Araujo:
Cloud-based OpenMP Parallelization Using a MapReduce Runtime. 334-341
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