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ORCID11th SLIP 2009: San Francisco, CA, USA
- Chung-Kuan Cheng, Sherief Reda:
The 11th International Workshop on System-Level Interconnect Prediction (SLIP 2009), San Francisco, CA, USA, July 26-27, 2009, Proceedings. ACM 2009, ISBN 978-1-60558-576-5 - Bill R. Bottoms:
Interconnect solutions for TeraScale computing. 1-2
New frontiers for interconnect prediction techniques
- Kwangok Jeong, Andrew B. Kahng, Rasit Onur Topaloglu
:
Is overlay error more important than interconnect variations in double patterning? 3-10 - Duo Ding, David Z. Pan:
OIL: a nano-photonics optical interconnect library for a new photonic networks-on-chip architecture. 11-18 - Peng Sun, Rong Luo:
Closed-form solution for timing analysis of process variations on SWCNT interconnect. 19-26 - Joseph B. Cessna, Thomas R. Bewley:
Honeycomb-structured computational interconnects and their scalable extension to spherical domains. 27-36 - Sherief Reda:
Using circuit structural analysis techniques for networks in systems biology. 37-44
New advances in classical interconnect prediction techniques
- Bahareh Fathi, Laleh Behjat, Logan M. Rakai:
A pre-placement net length estimation technique for mixed-size circuits. 45-52 - Ruzica Jevtic, Carlos Carreras, Vukasin Pejovic:
Floorplan-based FPGA interconnect power estimation in DSP circuits. 53-60 - Yulei Zhang, Xiang Hu, Alina Deutsch, A. Ege Engin, James F. Buckwalter, Chung-Kuan Cheng:
Prediction of high-performance on-chip global interconnection. 61-68 - Xiang Hu, Wenbo Zhao, Peng Du, Yulei Zhang, Amirali Shayan Arani, Christopher Pan, A. Ege Engin, Chung-Kuan Cheng:
On the bound of time-domain power supply noise based on frequency-domain target impedance. 69-76
Interconnect prediction for 3D ICs
- Robert Fischbach, Jens Lienig, Tilo Meister:
From 3D circuit technologies and data structures to interconnect prediction. 77-84 - Dae Hyun Kim, Saibal Mukhopadhyay, Sung Kyu Lim:
Through-silicon-via aware interconnect prediction and optimization for 3D stacked ICs. 85-92 - Wanping Zhang, Wenjian Yu, Xiang Hu, Amirali Shayan Arani, A. Ege Engin, Chung-Kuan Cheng:
Predicting the worst-case voltage violation in a 3D power network. 93-98 - Xu He, Sheqin Dong, Xianlong Hong, Satoshi Goto:
Integrated interlayer via planning and pin assignment for 3D ICs. 99-104
Impact of emerging interconnect technologies on SLIP research directions
- Kaustav Banerjee:
Graphene based nanomaterials for VLSI interconnect and energy-storage applications. 105-106 - Jason Cong, Mau-Chung Frank Chang, Glenn Reinman, Sai-Wang Tam:
Multiband RF-interconnect for reconfigurable network-on-chip communications. 107-108 - Saroj K. Nayak:
Carbon nanotube, graphene and atomic wires as next generation interconnects: current status and future promise. 109-110 - Krishna Saraswat:
Performance comparison of cu/low-k, carbon nanotube, and optics for on-chip and off-chip interconnects. 111-112
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