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ORCIDIntegration, Volume 6
Volume 6, Number 1, May 1988
- Lambert Spaanenburg:
Editorial. 1 - Peter Widmayer, Lin S. Woo, C. K. Wong:
Maximizing pin alignment in semi-custom chip circuit layout. 3-33 - James P. Cohoon, Dana S. Richards:
Optimal two-terminal α-β wire routing. 35-57 - Marius V. A. Hâncu, Kenneth C. Smith:
Implementing probabilistic algorithms on VLSI architectures. 59-82 - P. Chuavalee, Laxmi N. Bhuyan:
VLSI layout of binary tree structures. 83-99 - Toufic Ezzedine, Veronique Tempier, Georges Sagnes:
A 16-bit specialized processor design. 101-110
Volume 6, Number 2, July 1988
- Y. C. Hsu, William J. Kubitz:
ALSO: A system for chip floorplan design. 127-146 - Francky Catthoor, Hugo De Man, Joos Vandewalle:
SAMURAI: A general and efficient simulated-annealing schedule with fully adaptive annealing parameters. 147-178 - Wentai Liu, Ralph K. Cavin III:
Rasterization theory, architectures, and implementations for a class of two-dimensional problems. 179-199 - Selim G. Akl, Henk Meijer:
On the bit complexity of parallel computations. 201-212 - Satnam Singh Dlay:
A practical IC design system for VLSI technology. 213-227
Volume 6, Number 3, September 1988
- Nils Hedenstierna, Kjell O. Jeppson:
A corner-based hierarchical circuit extractor. 243-261 - Fabrizio Lombardi:
Reconfiguration of hexagonal arrays by diagonal deletion. 263-290 - Asim J. Al-Khalili, Dhamin Al-Khalili, K. Ammar:
An algorithm for polygon conversion to boxes for VLSI layouts. 291-308 - C.-L. Tse, Witold Kinsner:
A graph-based heuristic channel router. 309-328 - Kil Su Eo, Chong-Min Kyung:
A hardware accelerator for two-dimensional image analysis. 329-344 - Lars Kühnel, Hartmut Schmeck
:
A closer look at VLSI multiplication. 345-359
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