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ORCIDSIGARCH Computer Architecture News, Volume 27
Volume 27, Number 1, March 1999
- C. K. Yuen:
Stack and RISC. 3-9 - Sandra Johnson Baylor:
Unified scalable shared memory architectures. 10-21 - Anthony DeWitt, Thomas R. Gross:
The potential of thread-level speculation based on value profiling. 22 - John Kalamatianos, David R. Kaeli:
Improving the accuracy of indirect branch prediction via branch classification. 23-26 - Roy Dz-Ching Ju, Jean-Francois Collard, Karim Oukbir:
Probabilistic memory disambiguation and its application to data speculation. 27-30 - Matthew A. Postiff, David A. Greene, Gary S. Tyson, Trevor N. Mudge:
The limits of instruction level parallelism in SPEC95 applications. 31-34 - Byung-Sun Yang, Junpyo Lee, Jinpyo Park, Soo-Mook Moon, Kemal Ebcioglu, Erik R. Altman:
Lightweight monitor for Java VM. 35-38 - Amit Rao, Santosh Pande
:
Storage assignment using expression tree transformations to generate compact and efficient DSP code. 39-42 - Krisztián Flautner, Gary S. Tyson, Trevor N. Mudge:
A high level simulator integrated with the Mirv compiler. 43-46 - Hugues Cassé, Louis Féraud, Christine Rochange, Pascal Sainrat:
Using the abstract interpretation technique for static pointer analysis. 47-50 - R. Iris Bahar, Brad Calder, Dirk Grunwald:
A comparison of software code reordering and victim buffers. 51-54 - Steve Carr, Philip H. Sweany:
Improving software pipelining with hardware support for self-spatial loads. 55-58
Volume 27, Number 2, May 1999
- Allan Gottlieb, William J. Dally:
Proceedings of the 26th Annual International Symposium on Computer Architecture, ISCA 1999, Atlanta, Georgia, USA, May 2-4, 1999. IEEE Computer Society 1999, ISBN 0-7695-0170-2 [contents]
Volume 27, Number 3, June 1999
- In memoriam - SIGARCH founder: Caxton C. Foster. 1-3
- Seung H. Hwang, Gwan S. Choi:
Selective-set-invalidation (SSI) for soft-error-resilient cache architecture. 4-9 - Peng Cheng, Hai Jin, Jiangling Zhang:
Design of high performance RAID in real-time system. 10-17 - C. K. Yuen:
Architectural support for the cache based vector computation. 18-23 - Benjamin Driker:
Disbursed control computer architecture. 24-31 - Humayun Khalid:
Performance evaluation of multimedia systems with MPEG-2 bitstreams. 32-37 - Humayun Khalid:
A methodology for performance evaluation of systems with large emulation code. 38-42 - Humayun Khalid:
Tracing multimedia benchmarks with five degrees of validation. 43-48 - Humayun Khalid:
Performance evaluation of two operating systems. 49-52 - Mark Thorson:
Internet Nuggets. 53-60
Volume 27, Number 4, September 1999
- Philip Machanick:
Correction to RAMpage ASPOLOS paper. 2-5 - Hadi Shahriar Shahhoseini, Madjid Naderi, S. Nemati:
Achieving the best performance on superscalar processors. 6-11 - Mark Thorson:
Internet Nuggets. 12-14
Volume 27, Number 5, December 1999
- Marc Torrant, Muhammad Shaaban, Roy Czernikowski, Kenneth W. Hsu:
A simultaneous multithreading simulator. 1-5 - Mark Thorson:
Internet Nuggets. 6-10
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