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ORCIDIEEE Transactions on Computers, Volume 40
Volume 40, Number 1, January 1991
- Daniel H. Linder, James C. Harden:
An Adaptive and Fault Tolerant Wormhole Routing Strategy for k-Ary n-Cubes. 2-12 - Xiaobo Hu
, Ronald G. Harber, Steven C. Bass:
Expanding the Range of Convergence of the CORDIC Algorithm. 13-21 - Spencer W. Ng:
Improving Disk Performance Via Latency Reduction. 22-30 - Branislava Perunicic, Salim Lakhani, Veljko M. Milutinovic:
Stochastic Modeling and Analysis of Propagation Delays in GaAs Adders. 31-45 - John A. Ellis:
Embedding Rectangular Grids into Square Grids. 46-52 - Sung Je Hong, Saburo Muroga:
Absolute Minimization of Completely Specified Switching Functions. 53-65 - Gabriel M. Silberman, Ilan Y. Spillinger:
Functional Fault Simulation as a Guide for Biased-Random Test Pattern Generation. 66-79 - Gabriel M. Silberman, Ilan Y. Spillinger:
RIDDLE: A Foundation for Test Generation on a High-Level Design Description. 80-87
- Abdol-Hossein Esfahanian, Lionel M. Ni, Bruce E. Sagan:
The Twisted N-Cube with Application to Multiprocessing. 88-93 - Abhijit Sengupta, P. D. Joshi, Subir Bandyopadhyay:
A Synthesis Approach to Design Optimally Fault Tolerant Network Architecture. 94-100 - Paul S. Lewis, Sun-Yuan Kung:
An Optimal Systolic Array for the Algebraic Path Problem. 100-105 - Hussein M. Alnuweiri, Viktor K. Prasanna:
Optimal VLSI Sorting with Reduced Number of Processors. 105-110 - David J. Haglin, Shankar M. Venkatesan:
Approximation and Intractability Results for the Maximum Cut Problem and its Variants. 110-113 - Jyh-Jong Fu, Richard C. T. Lee:
Minimum Spanning Trees of Moving Points in the Plane. 113-118 - Bruno Codenotti, Roberto Tamassia:
A Network Flow Approach to the Reconfiguration of VLSI Arrays. 118-121
Volume 40, Number 2, February 1991
- Bella Bose:
On Unordered Codes. 125-131 - Dimitris Nikolos:
Theory and Design of t-Error Correcting/d-Error Detecting (d>t) and All Unidirectional Error Detecting Codes. 132-142 - Vijay Raghavan, Anand R. Tripathi:
Improved Diagnosability Algorithms. 143-153 - Ramsey W. Haddad, Anton T. Dahbura, Anup B. Sharma:
Increased Thoughput for the Testing and Repair of RAM's with Redundancy. 154-166 - Parthasarathy P. Tirumalai, Jon T. Butler:
Minimization Algorithms for Multiple-Valued Programmable Logic Arrays. 167-177 - Keshab K. Parhi, David G. Messerschmitt:
Static Rate-Optimal Scheduling of Iterative Data-Flow Programs via Optimum Unfolding. 178-195 - Amotz Bar-Noy, David Peleg:
Square Meshes are not always Optimal. 196-204 - Randal E. Bryant:
On the Complexity of VLSI Implementations and Graph Representations of Boolean Functions with Application to Integer Multiplication. 205-213
- Henk J. Sips, Hai-Xiang Lin:
An Improved Vector-Reduction Method. 214-217 - A. Yavuz Oruç, Millind Mittal:
Setup Algorithms for Cube-Connected Parallel Computers Using Recursive Karnaugh Maps. 217-221 - Afonso Ferreira:
A Parallel Time/Hardware Tradeoff T . H = O(2^{n/2}) for the Knapsack Problem. 221-225 - Arif Ghafoor, Theodore R. Bashkow:
A Study of Odd Graphs as Fault-Tolerant Interconnection Networks. 225-232 - Alireza Kavianpour, K. H. Kim:
Diagnosabilities of Hypercubes Under the Pessimistic One-Step Diagnosis Strategy. 132-237 - E. Pearse O'Grady, Beak-Kyu Young:
A Hardware-Oriented Algorithm for Floating-Point Function Generation. 237-241
Volume 40, Number 3, March 1991
- Dug-Kyoo Choi, B. G. Kim:
The Expected (Not Worst-Case) Throughput of the Ethernet Protocol. 245-252 - Bernd Werner Meister:
A Performance Study of the ISO Transport Protocol. 253-262 - Herman Lam, Chiang Lee, Stanley Y. W. Su:
A Special Function Unit for Database Operations (SFU-DB): Design and Performance Evaluation. 263-275 - David T. Harper III, Darel A. Linebarger:
Conflict-Free Vector Access Using a Dynamic Storage Scheme. 276-283 - Nian-Feng Tzeng, Sizheng Wei:
Enhanced Hypercubes. 284-294 - David M. Nicol, David R. O'Hallaron:
Improved Algorithms for Mapping Pipelined and Parallel Computations. 295-306 - Gopalakrishnan Vijayan:
Generalization of Min-Cut Partitioning to Tree Structures and Its Applications. 307-314
- O. J. Murphy, R. L. McCraw:
Designing Storage Efficient Decision Trees. 315-320 - Klaus D. Heidtmann:
Arithmetic Spectrum Applied to Fault Detection for Combinational Networks. 320-324 - S. Wayne Bollinger, Scott F. Midkiff:
Heuristic Technique for Processor and Link Assignment in Multicomputers. 325-333 - Richard P. Brent, Bing Bing Zhou:
A Stabilized Parallel Algorithm for Direct-Form Recursive Filters. 333-336 - Yann-Hang Lee, C. Mani Krishna:
Optimal Scheduling of Signature Analysis for VLSI Testing. 336-341 - Shantanu Dutt, John P. Hayes:
Subcube Allocation in Hypercube Computers. 341-352 - Qing Yang, Laxmi N. Bhuyan:
Analysis of Packet-Switched Multiple-Bus Multiprocessor Systems. 352-356 - J. Richard Burke, Chienhua Chen, Tsung-Ying Lee, Dharma P. Agrawal:
Performance Analysis of Single Stage Interconnection Networks. 357-365 - Y. C. Liu, Harry G. Perros:
A Decomposition Procedure for the Analysis of a Closed Fork/Join Queueing System. 365-370
Volume 40, Number 4, April 1991
- Huai-An Lin:
Constructing Protocols with Alternative Functions. 376-386 - Paul W. King:
Formalization of Protocol Engineering Concepts. 387-403 - Pradeep Jain, Simon S. Lam:
Specification of Real-Time Broadcast Networks. 404-422 - Samuel C. Chamberlain, Paul D. Amer:
Broadcast Channels in Estelle. 423-436 - Riccardo Sisto, Luigi Ciminiera, Adriano Valenzano:
A Protocol for Multirendezvous of LOTOS Processes. 437-447 - Mohamed G. Gouda, Nicholas J. Multari:
Stabilizing Communication Protocols. 448-458 - Yoshiaki Kakuda, Hironori Saito:
An Integrated Approach to Design of Protocol Specifications Using Protocol Validation and Synthesis. 459-467 - Robert L. Probert, Kassem Saleh:
Synthesis of Communication Protocols: Survey and Assessment. 468-476 - Norio Shiratori, Yaoxue Zhang, Kaoru Takahashi, Shoichi Noguchi:
A User Friendly Software Environment for Protocol Synthesis. 477-486 - Murali Rajagopal, Raymond E. Miller:
Synthesizing a Protocol Converter from Executable Protocol Traces. 487-499 - Elke Heck, Dieter Hogrefe, Bruno Müller-Clostermann:
Hierarchical Performance Evaluation Based on Formally Specified Communication Protocols. 500-513 - Kotaro Katsuyama, Fumiaki Sato, Tetsuo Nakakawaji, Tadanori Mizuno:
Strategic Testing Environment with Formal Description Techniques. 514-525 - Do Y. Lee, Jai-Yong Lee:
A Well-Defined Estelle Specification for the Automatic Test Generation. 526-542 - Piyu Tripathy, Behçet Sarikaya:
Test Generation from LOTOS Specifications. 543-552 - Haruhisa Ichikawa, Masaki Itoh, June Kato, Akira Takura, Masashi Shibasaki:
SDE: Incremental Specification and Development of Communications Software. 553-561 - E. Jane Cameron, David M. Cohen, Timothy M. Guinther, William M. Keese II, Linda A. Ness, Cynthia Norman, Hassan N. Srinidhi:
The L.0 Language and Environment for Protocol Simulation and Prototyping. 562-571
Volume 40, Number 5, May 1991
- Susan B. Davidson, Insup Lee, Victor Fay Wolfe:
Timed Atomic Commitment. 573-583 - Vijay Raghavan, Anand R. Tripathi:
Sequential Diagnosability is Co-NP Complete. 584-595 - Xiaojun Guan, Michael A. Langston:
Time-Space Optimal Parallel Merging and Sorting. 596-602 - Joel H. Saltz, Ravi Mirchandaney, Kay Crowley:
Run-Time Parallelization and Scheduling of Loops. 603-612 - Bin Qin, Howard A. Sholl, Reda A. Ammar:
Micro Time Cost Analysis of Parallel Computations. 613-628 - David R. Smith, Jing C. Lin:
The Tree-Match Chip. 629-639
- Michel Dubois, Jin-Chin Wang:
Shared Block Contention in a Cache Coherence Protocol. 640-644 - Tsutomu Sasao:
Bounds on the Average Number of Products in the Minimum Sum-of-Products Expressions for Multiple-Valued Input Two-Valued Output Functions. 645-651 - John J. Metzner:
Efficient Replicated Remote File Comparison. 651-660 - Dali L. Tao, Carlos R. P. Hartmann, Parag K. Lala:
A Note on t-EC/d-UED Codes. 660-663 - Zhijun Tong, Richard Y. Kain:
Vote Assignments in Weighted Voting Mechanisms. 664-667 - Guan-Ing Chen, Ten-Hwang Lai, Yao-Nan Lien:
A Note on "Generalized Hypercube and Hyperbus Structures for a Computer Network". 667-668
Volume 40, Number 6, June 1991
- James W. Dolter, Parameswaran Ramanathan, Kang G. Shin:
Performance Analysis of Virtual Cut-Through Switching in HARTS: A Hexagonal Mesh Multicomputer. 669-680 - Augustus K. Uht:
A Theory of Reduced and Minimal Procedural Dependencies. 681-692 - Bernard L. Menezes, Roy M. Jenevein:
The KYKLOS Multicomputer Network: Interconnection Strategies, Properties, and Applications. 692-705 - Yu-Chin Hsu, Youn-Long Lin, Hang-Ching Hsieh, Ting-Hai Chao:
Combining Logic Minimization and Folding for PLA's. 706-713 - Ten-Hwang Lai, Alan P. Sprague:
Placement of the Processors of a Hypercube. 714-722 - Weijia Shang, José A. B. Fortes:
Time Optimal Linear Schedules for Algorithms with Uniform Dependencies. 723-742 - Dhiraj K. Pradhan, Sandeep K. Gupta:
A New Framework for Designing and Analyzing BIST Techniques and Zero Aliasing Compression. 743-763
- Oscar H. Ibarra, Ting-Chuen Pong, Stephen M. Sohn:
Parallel Regognition and Parsing on the Hypercube. 764-770 - Viktor K. Prasanna, Yu-Chen Tsai:
On Synthesizing Optimal Family of Linear Systolic Arrays for Matrix Multiplication. 770-774 - Chung-Kuan Cheng, So-Zen Yao, T. C. Hu:
The Orientation of Modules Based on Graph Decomposition. 774-780 - T. C. Choinski, T. T. Tylaska:
Generation of Digit Reversed Address Sequences for Fast Fourier Transforms. 780-784 - Rafic Z. Makki, Silvio Bou-Ghazale, Chen Tianshang:
Automatic Test Pattern Generation with Branch Testing. 785-791
Volume 40, Number 7, July 1991
- Lui Sha, Ragunathan Rajkumar, Sang Hyuk Son, Chun-Hyon Chang:
A Real-Time Locking Protocol. 793-800 - Michelle Y. Kim, Asser N. Tantawi:
Asynchronous Disk Interleaving: Approximating Access Delays. 801-810 - George J. Milne:
The Formal Description and Verification of Hardware Timing. 811-826 - Mary Mehrnoosh Eshaghian:
Parallel Algorithms for Image Processing on OMC. 827-833 - Wen-Tsuen Chen, Jang-Ping Sheu:
Performance Analysis of Multiple Bus Interconnection Networks with Hierarchical Requesting Model. 834-842 - Mark H. Nodine, Daniel P. Lopresti, Jeffrey Scott Vitter:
I/O Overhead and Parallel VLSI Architectures for Lattice Computations. 843-852 - Ajay K. Gupta, Susanne E. Hambrusch:
Embedding Complete Binary Trees into Butterfly Networks. 853-863
- Pramode Ranjan Bhattacharjee, Sanjoy Kumar Basu, Jogesh Chandra Paul:
Translation of the Problem of Complete Test Set Generation to Pseudo-Boolean Programming. 864-867 - John P. Robinson:
Aliasing Probabilities for Feedback Signature Compression of Test Data. 867-873 - Giuseppe Alia, Enrico Martinelli:
A VLSI Modulo m Multiplier. 873-878 - Wilfried Daehn:
Load Balancing in a Hybrid ATPG Environment. 878-882 - Adit D. Singh, Hee Yong Youn:
A Modular Fault-Tolerant Binary Tree Architecture with Short Links. 882-890
Volume 40, Number 8, August 1991
- Susan J. Eggers:
Simplicity Versus Accuracy in a Model of Cache Coherency Overhead. 893-906 - Christos Faloutsos, Dimitris N. Metaxas:
Disk Allocation Methods Using Error Correcting Codes. 907-914 - Lingtao Wang, Chuan-lin Wu:
Distributed Instruction Set Computer Architecture. 915-934 - Antoine N. Mourad, Banu Özden, Miroslaw Malek:
Comprehensive Testing of Multistage Interconnection Networks. 935-951 - Fang-shi Lai, Ching-Farn Eric Wu:
A Hybrid Number System Processor with Geometric and Complex Arithmetic Capabilities. 952-962 - Albert G. Greenberg, Paul E. Wright:
Design and Analysis of Master/Slave Multiprocessors. 963-976 - Mostafa I. H. Abd-El-Barr, Zvonko G. Vranesic, Safwat G. Zaky:
Algorithmic Synthesis of MVL Functions for CCD Implementation. 977-986
- Kohichi Sakaniwa, Tae Nam Ahn, T. R. N. Rao:
A Note on t-Unidirectional Error Correcting and d(d>=t)-Unidirectional Error Detecting (t-UEC and d-UED) Codes. 987-988
Volume 40, Number 9, September 1991
- Naofumi Takagi, Tohru Asada, Shuzo Yajima:
Redundant CORDIC Methods with a Constant Scale Factor for Sine and Cosine Computation. 989-995 - Akhil Kumar:
Hierarchical Quorum Consensus: A New Algorithm for Managing Replicated Data. 996-1004 - Yuanyuan Yang, Gerald M. Masson:
Nonblocking Broadcast Switching Networks. 1005-1015 - William J. Dally:
Express Cubes: Improving the Performance of k-Ary n-Cube Interconnection Networks. 1016-1023 - Israel Koren, Zahava Koren:
Discrete and Continuous Models for the Performance of Reconfigurable Multistage Systems. 1024-1033 - Maurizio Damiani, Piero Olivo, Bruno Riccò:
Analysis and Design of Linear Finite State Machines for Signature Analysis Testing. 1034-1045
- Jie-Yong Juang, Benjamin W. Wah:
A Contention-Based Bus-Control Scheme for Multiprocessor Systems. 1046-1053 - Chaitali Chakrabarti, Joseph F. JáJá:
VLSI Architectures for Multidimensional Transforms. 1053-1057 - Cauligi S. Raghavendra, Rajendra V. Boppana:
On Self-Routing in Benes and Shuffle-Exchange Networks. 1057-1064 - Nobuaki Yoshida, Eiichi Goto, Shuichi Ichikawa:
Pseudorandom Rounding for Truncated Multipliers. 1065-1067 - P. Caspi, J. Piotrowski, Raoul Velazco:
An A Priori Approach to the Evaluation of Signature Analysis Efficiency. 1068-1071 - Kar-Lik Wong, Wan-Chi Siu:
Data Routing Networks for Systolic/Pipeline Realization of Prime Factor Mapping. 1072-1074 - Yinghua Min, Yashwant K. Malaiya, Boping Jin:
Analysis of Detection Capability of Parallel Signature Analyzers. 1075-1081 - K. B. Lakshmanan, Bala Ravikumar, K. Ganesan:
Coping with Erroneous Information while Sorting. 1081-1084
Volume 40, Number 10, October 1991
- Sam M. Kim, Robert McNaughton, Robert McCloskey:
A Polynomial Time Algorithm for the Local Testability Problem of Deterministic Finite Automata. 1087-1093 - Mary Jane Irwin, Robert Michael Owens:
A Two-Dimensional, Distributed Logic Architecture. 1094-1101 - Charles U. Martel, W. Melody Moh:
Optimal Prioritized Conflict Resolution on a Multiple Access Channel. 1102-1108 - Ramón Beivide, Enrique Herrada, José L. Balcázar, Agustin Arruabarrena:
Optimal Distance Networks of Low Degree for Parallel Computers. 1109-1124 - Daniel C. McCrackin:
Eliminating Interlocks in Deeply Pipelined Processors by Delay Enforced Multistreaming. 1125-1132 - Abhijit Chatterjee, Jacob A. Abraham:
Test Generation for Iterative Logic Arrays Based on an N-Cube of Cell States Model. 1133-1148
- Yijie Han:
An Optimal Linked List Prefix Algorithm on a Local Memory Computer. 1149-1153 - Jyh-Charn Liu, Kang G. Shin:
A RAM Architecture for Concurrent Access and On-Chip Testing. 1153-1159 - Pradeep K. Dubey, Michael J. Flynn:
Branch Strategies: Modeling and Optimization. 1159-1167 - M. A. Sridhar, Cauligi S. Raghavendra:
Fault-Tolerant Networks Based on the de Bruijn Graph. 1167-1174 - Jae-Moon Koh, Dong-wan Tcha:
Information Dissemination in Trees with Nonuniform Edge Transmission Times. 1174-1177 - Jacob Savir, William H. McAnney, Salvatore R. Vecchio:
Testing for Coupled Cells in Random-Access Memories. 1177-1180
Volume 40, Number 11, November 1991
- Stamatis Vassiliadis, Eric M. Schwarz, Baik Moon Sung:
Hard-Wired Multipliers with Encoded Partial Products. 1181-1197 - Irith Pomeranz, Zvi Kohavi:
Polynomial Complexity Algorithms for Increasing the Testability of Digital Circuits by Testing Module Insertion. 1198-1214 - Veljko M. Milutinovic, David A. Fura, Walter A. Helbig:
Pipeline Design Tradeoffs in a 32-bit Gallium Arsenide Microprocessor. 1214-1224 - Soonhoi Ha, Edward A. Lee:
Compile-Time Scheduling and Assignment of Data-Flow Program Graphs with Data-Dependent Iteration. 1225-1238 - S. M. Rezaul Islam, Hany H. Ammar:
Performability Analysis of Distributed Real-Time Systems. 1239-1251
- Stephen Y. H. Su, Michal Cutler, Mingshien Wang:
Self-Diagnosis of Faelures in VLSI Tree Array Processors. 1252-1257 - Bruce L. Montgomery:
Efficient Unidirectional Error Codes for Block Memories. 1257-1259 - Michel Dubois, Faye A. Briggs:
The Run-Time Efficiency of Parallel Asynchronous Algorithms. 1260-1266 - Demetrios K. Kostopoulos:
An Algorithm for the Computation of Binary Logarithms. 1267-1270 - Andrzej Pelc:
Undirected Graph Models for System-Level Fault Diagnosis. 1271-1276 - Kyungsook Y. Lee, Hyunsoo Yoon:
Indirect Star-Type Networks for Large Multiprocessor Systems. 1277-1282 - Wojciech E. Kozlowski, Henryk Krawczyk:
A Comparison-Based Approach to Multicomputer System Diagnosis in Hybrid Fault Situations. 1283-1287 - Daniel C. McCrackin, Barna Szabados:
Using Horizontal Prefetching to Circumvent the Jump Problem. 1287-1291 - Shing-Tsaan Huang, Satish K. Tripathi, Nian-Shing Chen, Yu-Chee Tseng:
An Efficient Routing Algorithm for Realizing Linear Permutations on p^t-Shuffle-Exchange Networks. 1292-1298 - Suman Purwar:
An Efficient Method of Computing Generalized Reed-Muller Expansions from Binary Decision Diagram. 1298-1301 - Lorenzo Donatiello, Vincenzo Grassi:
On Evaluating the Cumulative Performance Distribution of Fault-Tolerant Computer Systems. 1301-1307 - Majid Sarrafzadeh, D. T. Lee:
Topological Via Minimization Revisited. 1307-1312 - Kemal Efe:
A Variation on the Hypercube with Lower Diameter. 1312-1316
Volume 40, Number 12, December 1991
- Chin-Teng Lin, C. S. George Lee:
Neural-Network-Based Fuzzy Logic Control and Decision System. 1320-1336 - Li-Xin Wang, Jerry M. Mendel:
Three-Dimensional Structured Networks for Matrix Equation Solving. 1337-1346 - Gene A. Tagliarini, J. Fury Christ, Edward W. Page:
Optimization Using Neural Networks. 1347-1358 - David Suter:
Constraint Networks in Vision. 1359-1367 - Scott T. Toborg, Kai Hwang:
Cooperative Vision Integration Through Data-Parallel Neural Computations. 1368-1379 - Leonardo Maria Reyneri, Enrica Filippi:
An Analysis on the Performance of Silicon Implementations of Backpropagation Algorithms for Artificial Neural Networks. 1380-1389 - Wei-Ming Lin, Viktor K. Prasanna, K. Wojtek Przytula:
Algorithmic Mapping of Neural Network Models onto Parallel SIMD Machines. 1390-1401 - Kai-Yeung Siu, Vwani P. Roychowdhury, Thomas Kailath:
Depth-Size Tradeoffs for Neural Computation. 1402-1412
- Vassilis Zissimopoulos, Vangelis Th. Paschos, Ferhan Pekergin:
On the Approximation of NP-Complete Problems by Using the Boltzmann Machine Method: The Cases of Some Covering and Packing Problems. 1413-1418 - Gaby J. Salem, Tzay Y. Young:
A Neural Network Approach to the Labeling of Line Drawings. 1419-1424 - Lee A. Belfore II, Barry W. Johnson:
The Analysis of the Faulty Behavior of Synchronous Neural Networks. 1424-1429 - Vladimir Cherkassky, Karen Fassett, Nikolaos Vassilas:
Linear Algebra Approach to Neural Associative Memories and Noise Performance of Neural Classifiers. 1429-1435
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