Volume 9, Number 1, February 2001
Volume 9, Number 2, April 2001
: Reconfigurable parallel inner product processor architectures.
, Rolf Ernst
: An approach to automated hardware/software partitioning using a flexible granularity that is driven by high-level estimation techniques.
: Architecture and design of NX-2700: a programmable single-chip HDTV all-format-decode-and-display processor.
: Design of synchronous and asynchronous variable-latency pipelined multipliers.
Volume 9, Number 3, June 2001
Volume 9, Number 4, August 2001
: Correction to "design of synchronous and asynchronous variable-latency pipelined multipliers".
Volume 9, Number 5, October 2001
, John P. Knight
: Multiclock selection and synthesis for CDFGs using optimal clock sets and genetic algorithms.
, Kwyro Lee
: Highly parallel and energy-efficient exhaustive minimum distance search engine using hybrid digital/analog circuit techniques.
Volume 9, Number 6, December 2001
: A differential equation for placement analysis.
: Bus guardians: an effective solution for online detection and correction of faults affecting system-on-chip buses.