Stop the war!
Остановите войну!
for scientists:
default search action
BibTeX records: Enric Gibert
@article{DBLP:journals/jcisd/VazquezDHGHL20, author = {Javier V{\'{a}}zquez and Alessandro Deplano and Albert Herrero and Enric Gibert and Enric Herrero and F. Javier Luque}, title = {Assessing the Performance of Mixed Strategies To Combine Lipophilic Molecular Similarity and Docking in Virtual Screening}, journal = {J. Chem. Inf. Model.}, volume = {60}, number = {9}, pages = {4231--4245}, year = {2020}, url = {https://doi.org/10.1021/acs.jcim.9b01191}, doi = {10.1021/ACS.JCIM.9B01191}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jcisd/VazquezDHGHL20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jcisd/VazquezDHGGROHL18, author = {Javier V{\'{a}}zquez and Alessandro Deplano and Albert Herrero and Tiziana Ginex and Enric Gibert and Obdulia Rabal and Julen Oyarzabal and Enric Herrero and F. Javier Luque}, title = {Development and Validation of Molecular Overlays Derived from Three-Dimensional Hydrophobic Similarity with PharmScreen}, journal = {J. Chem. Inf. Model.}, volume = {58}, number = {8}, pages = {1596--1609}, year = {2018}, url = {https://doi.org/10.1021/acs.jcim.8b00216}, doi = {10.1021/ACS.JCIM.8B00216}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jcisd/VazquezDHGGROHL18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ispass/KumarCBPSGMG17, author = {Rakesh Kumar and Jos{\'{e}} Cano and Aleksandar Brankovic and Demos Pavlou and Kyriakos Stavrou and Enric Gibert and Alejandro Mart{\'{\i}}nez and Antonio Gonzalez}, title = {{HW/SW} co-designed processors: Challenges, design choices and a simulation infrastructure for evaluation}, booktitle = {2017 {IEEE} International Symposium on Performance Analysis of Systems and Software, {ISPASS} 2017, Santa Rosa, CA, USA, April 24-25, 2017}, pages = {185--194}, publisher = {{IEEE} Computer Society}, year = {2017}, url = {https://doi.org/10.1109/ISPASS.2017.7975290}, doi = {10.1109/ISPASS.2017.7975290}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ispass/KumarCBPSGMG17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jcc/GinexMHGCL16, author = {Tiziana Ginex and Jordi Mu{\~{n}}oz{-}Muriedas and Enric Herrero and Enric Gibert and Pietro Cozzini and F. Javier Luque}, title = {Development and validation of hydrophobic molecular fields derived from the quantum mechanical {IEF/PCM-MST} solvation models in 3D-QSAR}, journal = {J. Comput. Chem.}, volume = {37}, number = {13}, pages = {1147--1162}, year = {2016}, url = {https://doi.org/10.1002/jcc.24305}, doi = {10.1002/JCC.24305}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jcc/GinexMHGCL16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iiswc/Cano0BPSGM016, author = {Jos{\'{e}} Cano and Rakesh Kumar and Aleksandar Brankovic and Demos Pavlou and Kyriakos Stavrou and Enric Gibert and Alejandro Mart{\'{\i}}nez and Antonio Gonz{\'{a}}lez}, title = {Quantitative characterization of the software layer of a {HW/SW} co-designed processor}, booktitle = {2016 {IEEE} International Symposium on Workload Characterization, {IISWC} 2016, Providence, RI, USA, September 25-27, 2016}, pages = {138--147}, publisher = {{IEEE} Computer Society}, year = {2016}, url = {https://doi.org/10.1109/IISWC.2016.7581274}, doi = {10.1109/IISWC.2016.7581274}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iiswc/Cano0BPSGM016.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/cal/GibertMMC15, author = {Enric Gibert and Ra{\'{u}}l Mart{\'{\i}}nez and Carlos Madriles and Josep M. Codina}, title = {Profiling Support for Runtime Managed Code: Next Generation Performance Monitoring Units}, journal = {{IEEE} Comput. Archit. Lett.}, volume = {14}, number = {1}, pages = {62--65}, year = {2015}, url = {https://doi.org/10.1109/LCA.2014.2321398}, doi = {10.1109/LCA.2014.2321398}, timestamp = {Sun, 15 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/cal/GibertMMC15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/asplos/LuponGMSMSD14, author = {Marc Lupon and Enric Gibert and Grigorios Magklis and Sridhar Samudrala and Ra{\'{u}}l Mart{\'{\i}}nez and Kyriakos Stavrou and David R. Ditzel}, editor = {Rajeev Balasubramonian and Al Davis and Sarita V. Adve}, title = {Speculative hardware/software co-designed floating-point multiply-add fusion}, booktitle = {Architectural Support for Programming Languages and Operating Systems, {ASPLOS} 2014, Salt Lake City, UT, USA, March 1-5, 2014}, pages = {623--638}, publisher = {{ACM}}, year = {2014}, url = {https://doi.org/10.1145/2541940.2541978}, doi = {10.1145/2541940.2541978}, timestamp = {Wed, 07 Jul 2021 13:23:08 +0200}, biburl = {https://dblp.org/rec/conf/asplos/LuponGMSMSD14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cf/BrankovicSGG14, author = {Aleksandar Brankovic and Kyriakos Stavrou and Enric Gibert and Antonio Gonz{\'{a}}lez}, editor = {Pedro Trancoso and Diana Franklin and Sally A. McKee}, title = {Accurate off-line phase classification for {HW/SW} co-designed processors}, booktitle = {Computing Frontiers Conference, CF'14, Cagliari, Italy - May 20 - 22, 2014}, pages = {5:1--5:10}, publisher = {{ACM}}, year = {2014}, url = {https://doi.org/10.1145/2597917.2597937}, doi = {10.1145/2597917.2597937}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cf/BrankovicSGG14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cgo/BrankovicSGG14, author = {Aleksandar Brankovic and Kyriakos Stavrou and Enric Gibert and Antonio Gonz{\'{a}}lez}, editor = {David R. Kaeli and Tipp Moseley}, title = {Warm-Up Simulation Methodology for {HW/SW} Co-Designed Processors}, booktitle = {12th Annual {IEEE/ACM} International Symposium on Code Generation and Optimization, {CGO} 2014, Orlando, FL, USA, February 15-19, 2014}, pages = {284}, publisher = {{ACM}}, year = {2014}, url = {https://dl.acm.org/citation.cfm?id=2544142}, timestamp = {Fri, 30 Nov 2018 12:48:46 +0100}, biburl = {https://dblp.org/rec/conf/cgo/BrankovicSGG14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cf/BrankovicSGG13, author = {Aleksandar Brankovic and Kyriakos Stavrou and Enric Gibert and Antonio Gonz{\'{a}}lez}, editor = {Hubertus Franke and Alexander Heinecke and Krishna V. Palem and Eli Upfal}, title = {Performance analysis and predictability of the software layer in dynamic binary translators/optimizers}, booktitle = {Computing Frontiers Conference, CF'13, Ischia, Italy, May 14 - 16, 2013}, pages = {15:1--15:10}, publisher = {{ACM}}, year = {2013}, url = {https://doi.org/10.1145/2482767.2482786}, doi = {10.1145/2482767.2482786}, timestamp = {Tue, 06 Nov 2018 11:07:32 +0100}, biburl = {https://dblp.org/rec/conf/cf/BrankovicSGG13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vee/PavlouGLG12, author = {Demos Pavlou and Enric Gibert and Fernando Latorre and Antonio Gonz{\'{a}}lez}, editor = {Steven Hand and Dilma Da Silva}, title = {DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support}, booktitle = {Proceedings of the 8th International Conference on Virtual Execution Environments, {VEE} 2012, London, UK, March 3-4, 2012 (co-located with {ASPLOS} 2012)}, pages = {159--168}, publisher = {{ACM}}, year = {2012}, url = {https://doi.org/10.1145/2151024.2151046}, doi = {10.1145/2151024.2151046}, timestamp = {Tue, 20 Dec 2022 17:33:09 +0100}, biburl = {https://dblp.org/rec/conf/vee/PavlouGLG12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/lctrts/BhagatGSG11, author = {Indu Bhagat and Enric Gibert and F. Jes{\'{u}}s S{\'{a}}nchez and Antonio Gonz{\'{a}}lez}, editor = {Jan Vitek and Bjorn De Sutter}, title = {Global productiveness propagation: a code optimization technique to speculatively prune useless narrow computations}, booktitle = {Proceedings of the {ACM} {SIGPLAN/SIGBED} 2011 conference on Languages, compilers, and tools for embedded systems, {LCTES} 2011, Chicago, IL, USA, April 11-14, 2011}, pages = {161--170}, publisher = {{ACM}}, year = {2011}, url = {https://doi.org/10.1145/1967677.1967700}, doi = {10.1145/1967677.1967700}, timestamp = {Thu, 24 Jun 2021 16:19:30 +0200}, biburl = {https://dblp.org/rec/conf/lctrts/BhagatGSG11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/IEEEpact/MadrilesLCGLMMG09, author = {Carlos Madriles and Pedro L{\'{o}}pez and Josep M. Codina and Enric Gibert and Fernando Latorre and Alejandro Mart{\'{\i}}nez and Ra{\'{u}}l Mart{\'{\i}}nez and Antonio Gonz{\'{a}}lez}, title = {Anaphase: {A} Fine-Grain Thread Decomposition Scheme for Speculative Multithreading}, booktitle = {{PACT} 2009, Proceedings of the 18th International Conference on Parallel Architectures and Compilation Techniques, 12-16 September 2009, Raleigh, North Carolina, {USA}}, pages = {15--25}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/PACT.2009.27}, doi = {10.1109/PACT.2009.27}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/IEEEpact/MadrilesLCGLMMG09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/MadrilesLCGLMMG09, author = {Carlos Madriles and Pedro L{\'{o}}pez and Josep M. Codina and Enric Gibert and Fernando Latorre and Alejandro Mart{\'{\i}}nez and Ra{\'{u}}l Mart{\'{\i}}nez and Antonio Gonz{\'{a}}lez}, editor = {Stephen W. Keckler and Luiz Andr{\'{e}} Barroso}, title = {Boosting single-thread performance in multi-core systems through fine-grain multi-threading}, booktitle = {36th International Symposium on Computer Architecture {(ISCA} 2009), June 20-24, 2009, Austin, TX, {USA}}, pages = {474--483}, publisher = {{ACM}}, year = {2009}, url = {https://doi.org/10.1145/1555754.1555813}, doi = {10.1145/1555754.1555813}, timestamp = {Fri, 09 Jul 2021 15:51:20 +0200}, biburl = {https://dblp.org/rec/conf/isca/MadrilesLCGLMMG09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/concurrency/GibertSG06, author = {Enric Gibert and F. Jes{\'{u}}s S{\'{a}}nchez and Antonio Gonz{\'{a}}lez}, title = {Instruction scheduling for a clustered {VLIW} processor with a word-interleaved cache}, journal = {Concurr. Comput. Pract. Exp.}, volume = {18}, number = {11}, pages = {1391--1411}, year = {2006}, url = {https://doi.org/10.1002/cpe.1013}, doi = {10.1002/CPE.1013}, timestamp = {Mon, 02 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/concurrency/GibertSG06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jec/SettleCGG06, author = {Alex Settle and Dan Connors and Enric Gibert and Antonio Gonz{\'{a}}lez}, title = {A dynamically reconfigurable cache for multithreaded processors}, journal = {J. Embed. Comput.}, volume = {2}, number = {2}, pages = {221--233}, year = {2006}, url = {http://content.iospress.com/articles/journal-of-embedded-computing/jec00027}, timestamp = {Fri, 07 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jec/SettleCGG06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tc/GibertSG05, author = {Enric Gibert and F. Jes{\'{u}}s S{\'{a}}nchez and Antonio Gonz{\'{a}}lez}, title = {Distributed Data Cache Designs for Clustered {VLIW} Processors}, journal = {{IEEE} Trans. Computers}, volume = {54}, number = {10}, pages = {1227--1241}, year = {2005}, url = {https://doi.org/10.1109/TC.2005.163}, doi = {10.1109/TC.2005.163}, timestamp = {Wed, 14 Jun 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tc/GibertSG05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/IEEEpact/GibertASVG05, author = {Enric Gibert and Jaume Abella and F. Jes{\'{u}}s S{\'{a}}nchez and Xavier Vera and Antonio Gonz{\'{a}}lez}, title = {Variable-Based Multi-module Data Caches for Clustered {VLIW} Processors}, booktitle = {14th International Conference on Parallel Architectures and Compilation Techniques {(PACT} 2005), 17-21 September 2005, St. Louis, MO, {USA}}, pages = {207--217}, publisher = {{IEEE} Computer Society}, year = {2005}, url = {https://doi.org/10.1109/PACT.2005.40}, doi = {10.1109/PACT.2005.40}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/IEEEpact/GibertASVG05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cgo/GibertSG03, author = {Enric Gibert and F. Jes{\'{u}}s S{\'{a}}nchez and Antonio Gonz{\'{a}}lez}, editor = {Richard Johnson and Tom Conte and Wen{-}mei W. Hwu}, title = {Local Scheduling Techniques for Memory Coherence in a Clustered {VLIW} Processor with a Distributed Data Cache}, booktitle = {1st {IEEE} / {ACM} International Symposium on Code Generation and Optimization {(CGO} 2003), 23-26 March 2003, San Francisco, CA, {USA}}, pages = {193--203}, publisher = {{IEEE} Computer Society}, year = {2003}, url = {https://doi.org/10.1109/CGO.2003.1191545}, doi = {10.1109/CGO.2003.1191545}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cgo/GibertSG03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/micro/GibertSG03, author = {Enric Gibert and F. Jes{\'{u}}s S{\'{a}}nchez and Antonio Gonz{\'{a}}lez}, title = {Flexible Compiler-Managed {L0} Buffers for Clustered {VLIW} Processors}, booktitle = {Proceedings of the 36th Annual International Symposium on Microarchitecture, San Diego, CA, USA, December 3-5, 2003}, pages = {315--325}, publisher = {{IEEE} Computer Society}, year = {2003}, url = {https://doi.org/10.1109/MICRO.2003.1253205}, doi = {10.1109/MICRO.2003.1253205}, timestamp = {Tue, 31 May 2022 14:39:58 +0200}, biburl = {https://dblp.org/rec/conf/micro/GibertSG03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ics/GibertSG02, author = {Enric Gibert and F. Jes{\'{u}}s S{\'{a}}nchez and Antonio Gonz{\'{a}}lez}, editor = {Kemal Ebcioglu and Keshav Pingali and Alex Nicolau}, title = {An interleaved cache clustered {VLIW} processor}, booktitle = {Proceedings of the 16th international conference on Supercomputing, {ICS} 2002, New York City, NY, USA, June 22-26, 2002}, pages = {210--219}, publisher = {{ACM}}, year = {2002}, url = {https://doi.org/10.1145/514191.514222}, doi = {10.1145/514191.514222}, timestamp = {Tue, 06 Nov 2018 11:07:02 +0100}, biburl = {https://dblp.org/rec/conf/ics/GibertSG02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/micro/GibertSG02, author = {Enric Gibert and F. Jes{\'{u}}s S{\'{a}}nchez and Antonio Gonz{\'{a}}lez}, editor = {Erik R. Altman and Kemal Ebcioglu and Scott A. Mahlke and B. Ramakrishna Rau and Sanjay J. Patel}, title = {Effective instruction scheduling techniques for an interleaved cache clustered {VLIW} processor}, booktitle = {Proceedings of the 35th Annual International Symposium on Microarchitecture, Istanbul, Turkey, November 18-22, 2002}, pages = {123--133}, publisher = {{ACM/IEEE} Computer Society}, year = {2002}, url = {https://doi.org/10.1109/MICRO.2002.1176244}, doi = {10.1109/MICRO.2002.1176244}, timestamp = {Tue, 31 May 2022 14:39:58 +0200}, biburl = {https://dblp.org/rec/conf/micro/GibertSG02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.