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BibTeX records: Abhijit Jas
@article{DBLP:journals/et/RossiOGMJG13, author = {Daniele Rossi and Martin Oma{\~{n}}a and G. Garrammone and Cecilia Metra and Abhijit Jas and Rajesh Galivanche}, title = {Low Cost Concurrent Error Detection Strategy for the Control Logic of High Performance Microprocessors and Its Application to the Instruction Decoder}, journal = {J. Electron. Test.}, volume = {29}, number = {3}, pages = {401--413}, year = {2013}, url = {https://doi.org/10.1007/s10836-013-5355-2}, doi = {10.1007/S10836-013-5355-2}, timestamp = {Sun, 20 Nov 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/et/RossiOGMJG13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/FangCJPT12, author = {Hongxia Fang and Krishnendu Chakrabarty and Abhijit Jas and Srinivas Patil and Chandra Tirumurti}, title = {Functional Test-Sequence Grading at Register-Transfer Level}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {20}, number = {10}, pages = {1890--1894}, year = {2012}, url = {https://doi.org/10.1109/TVLSI.2011.2163651}, doi = {10.1109/TVLSI.2011.2163651}, timestamp = {Mon, 03 Jan 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/FangCJPT12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tc/ManiatakosKTJM11, author = {Michail Maniatakos and Naghmeh Karimi and Chandra Tirumurti and Abhijit Jas and Yiorgos Makris}, title = {Instruction-Level Impact Analysis of Low-Level Faults in a Modern Microprocessor Controller}, journal = {{IEEE} Trans. Computers}, volume = {60}, number = {9}, pages = {1260--1273}, year = {2011}, url = {https://doi.org/10.1109/TC.2010.60}, doi = {10.1109/TC.2010.60}, timestamp = {Fri, 09 Apr 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tc/ManiatakosKTJM11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tc/KarimiMJTM11, author = {Naghmeh Karimi and Michail Maniatakos and Abhijit Jas and Chandra Tirumurti and Yiorgos Makris}, title = {Workload-Cognizant Concurrent Error Detection in the Scheduler of a Modern Microprocessor}, journal = {{IEEE} Trans. Computers}, volume = {60}, number = {9}, pages = {1274--1287}, year = {2011}, url = {https://doi.org/10.1109/TC.2010.265}, doi = {10.1109/TC.2010.265}, timestamp = {Fri, 09 Apr 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tc/KarimiMJTM11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ets/ManiatakosTJM11, author = {Michail Maniatakos and Chandra Tirumurti and Abhijit Jas and Yiorgos Makris}, title = {{AVF} Analysis Acceleration via Hierarchical Fault Pruning}, booktitle = {16th European Test Symposium, {ETS} 2011, Trondheim, Norway, May 23-27, 2011}, pages = {87--92}, publisher = {{IEEE} Computer Society}, year = {2011}, url = {https://doi.org/10.1109/ETS.2011.42}, doi = {10.1109/ETS.2011.42}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ets/ManiatakosTJM11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/DasKKJZ10, author = {Debasish Das and Kip Killpack and Chandramouli V. Kashyap and Abhijit Jas and Hai Zhou}, title = {Pessimism Reduction in Coupling-Aware Static Timing Analysis Using Timing and Logic Filtering}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {29}, number = {3}, pages = {466--478}, year = {2010}, url = {https://doi.org/10.1109/TCAD.2009.2035532}, doi = {10.1109/TCAD.2009.2035532}, timestamp = {Wed, 16 Aug 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/DasKKJZ10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cf/RossiOBMJTG10, author = {Daniele Rossi and Martin Oma{\~{n}}a and Gianluca Berghella and Cecilia Metra and Abhijit Jas and Chandra Tirumurti and Rajesh Galivanche}, editor = {Nancy M. Amato and Hubertus Franke and Paul H. J. Kelly}, title = {Low cost and low intrusive approach to test on-line the scheduler of high performance microprocessors}, booktitle = {Proceedings of the 7th Conference on Computing Frontiers, 2010, Bertinoro, Italy, May 17-19, 2010}, pages = {113--114}, publisher = {{ACM}}, year = {2010}, url = {https://doi.org/10.1145/1787275.1787309}, doi = {10.1145/1787275.1787309}, timestamp = {Sun, 20 Nov 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cf/RossiOBMJTG10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/todaes/GulatiPKPJ09, author = {Kanupriya Gulati and Suganth Paul and Sunil P. Khatri and Srinivas Patil and Abhijit Jas}, title = {FPGA-based hardware acceleration for Boolean satisfiability}, journal = {{ACM} Trans. Design Autom. Electr. Syst.}, volume = {14}, number = {2}, pages = {33:1--33:11}, year = {2009}, url = {https://doi.org/10.1145/1497561.1497576}, doi = {10.1145/1497561.1497576}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/todaes/GulatiPKPJ09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccd/KarimiMTJM09, author = {Naghmeh Karimi and Michail Maniatakos and Chandra Tirumurti and Abhijit Jas and Yiorgos Makris}, title = {Impact analysis of performance faults in modern microprocessors}, booktitle = {27th International Conference on Computer Design, {ICCD} 2009, Lake Tahoe, CA, USA, October 4-7, 2009}, pages = {91--96}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/ICCD.2009.5413171}, doi = {10.1109/ICCD.2009.5413171}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccd/KarimiMTJM09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vts/ManiatakosKTJM09, author = {Michail Maniatakos and Naghmeh Karimi and Chandra Tirumurti and Abhijit Jas and Yiorgos Makris}, title = {Instruction-Level Impact Comparison of {RT-} vs. Gate-Level Faults in a Modern Microprocessor Controller}, booktitle = {27th {IEEE} {VLSI} Test Symposium, {VTS} 2009, May 3-7, 2009, Santa Cruz, California, {USA}}, pages = {9--14}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/VTS.2009.32}, doi = {10.1109/VTS.2009.32}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vts/ManiatakosKTJM09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vts/FangCJPT09, author = {Hongxia Fang and Krishnendu Chakrabarty and Abhijit Jas and Srinivas Patil and Chandra Tirumurti}, title = {RT-Level Deviation-Based Grading of Functional Test Sequences}, booktitle = {27th {IEEE} {VLSI} Test Symposium, {VTS} 2009, May 3-7, 2009, Santa Cruz, California, {USA}}, pages = {264--269}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/VTS.2009.12}, doi = {10.1109/VTS.2009.12}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vts/FangCJPT09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/et/JasCC08, author = {Abhijit Jas and Yi{-}Shing Chang and Sreejit Chakravarty}, title = {A Methodology for Handling Complex Functional Constraints for Large Industrial Designs}, journal = {J. Electron. Test.}, volume = {24}, number = {1-3}, pages = {259--269}, year = {2008}, url = {https://doi.org/10.1007/s10836-007-5024-4}, doi = {10.1007/S10836-007-5024-4}, timestamp = {Fri, 11 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/et/JasCC08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aspdac/DasKKJZ08, author = {Debasish Das and Kip Killpack and Chandramouli V. Kashyap and Abhijit Jas and Hai Zhou}, editor = {Chong{-}Min Kyung and Kiyoung Choi and Soonhoi Ha}, title = {Pessimism reduction in coupling-aware static timing analysis using timing and logic filtering}, booktitle = {Proceedings of the 13th Asia South Pacific Design Automation Conference, {ASP-DAC} 2008, Seoul, Korea, January 21-24, 2008}, pages = {486--491}, publisher = {{IEEE}}, year = {2008}, url = {https://doi.org/10.1109/ASPDAC.2008.4483999}, doi = {10.1109/ASPDAC.2008.4483999}, timestamp = {Wed, 16 Aug 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/aspdac/DasKKJZ08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/VemuJAPG08, author = {Ramtilak Vemu and Abhijit Jas and Jacob A. Abraham and Srinivas Patil and Rajesh Galivanche}, editor = {Donatella Sciuto}, title = {A low-cost concurrent error detection technique for processor control logic}, booktitle = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany, March 10-14, 2008}, pages = {897--902}, publisher = {{ACM}}, year = {2008}, url = {https://doi.org/10.1109/DATE.2008.4484788}, doi = {10.1109/DATE.2008.4484788}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/VemuJAPG08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dft/ManiatakosKMJT08, author = {Michail Maniatakos and Naghmeh Karimi and Yiorgos Makris and Abhijit Jas and Chandra Tirumurti}, editor = {Cristiana Bolchini and Yong{-}Bin Kim and Dimitris Gizopoulos and Mohammad Tehranipoor}, title = {Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method {(CED)} in a Modern Microprocessor Controller}, booktitle = {23rd {IEEE} International Symposium on Defect and Fault-Tolerance in {VLSI} Systems {(DFT} 2008), 1-3 October 2008, Boston, MA, {USA}}, pages = {454--462}, publisher = {{IEEE} Computer Society}, year = {2008}, url = {https://doi.org/10.1109/DFT.2008.59}, doi = {10.1109/DFT.2008.59}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dft/ManiatakosKMJT08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ets/MetraROJG08, author = {Cecilia Metra and Daniele Rossi and Martin Oma{\~{n}}a and Abhijit Jas and Rajesh Galivanche}, title = {Function-Inherent Code Checking: {A} New Low Cost On-Line Testing Approach for High Performance Microprocessor Control Logic}, booktitle = {13th European Test Symposium, {ETS} 2008, Verbania, Italy, May 25-29, 2008}, pages = {171--176}, publisher = {{IEEE} Computer Society}, year = {2008}, url = {https://doi.org/10.1109/ETS.2008.24}, doi = {10.1109/ETS.2008.24}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ets/MetraROJG08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/DuttaJ08, author = {Avijit Dutta and Abhijit Jas}, title = {Combinational Logic Circuit Protection Using Customized Error Detecting and Correcting Codes}, booktitle = {9th International Symposium on Quality of Electronic Design {(ISQED} 2008), 17-19 March 2008, San Jose, CA, {USA}}, pages = {68--73}, publisher = {{IEEE} Computer Society}, year = {2008}, url = {https://doi.org/10.1109/ISQED.2008.4479700}, doi = {10.1109/ISQED.2008.4479700}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/DuttaJ08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/KarimiMJM08, author = {Naghmeh Karimi and Michail Maniatakos and Abhijit Jas and Yiorgos Makris}, editor = {Douglas Young and Nur A. Touba}, title = {On the Correlation between Controller Faults and Instruction-Level Errors in Modern Microprocessors}, booktitle = {2008 {IEEE} International Test Conference, {ITC} 2008, Santa Clara, California, USA, October 26-31, 2008}, pages = {1--10}, publisher = {{IEEE} Computer Society}, year = {2008}, url = {https://doi.org/10.1109/TEST.2008.4700613}, doi = {10.1109/TEST.2008.4700613}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/KarimiMJM08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/JasNP07, author = {Abhijit Jas and Suriyaprakash Natarajan and Srinivas Patil}, title = {The Region-Exhaustive Fault Model}, booktitle = {16th Asian Test Symposium, {ATS} 2007, Beijing, China, October 8-11, 2007}, pages = {13--18}, publisher = {{IEEE}}, year = {2007}, url = {https://doi.org/10.1109/ATS.2007.78}, doi = {10.1109/ATS.2007.78}, timestamp = {Wed, 09 Nov 2022 21:30:34 +0100}, biburl = {https://dblp.org/rec/conf/ats/JasNP07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dft/JasP07, author = {Abhijit Jas and Srinivas Patil}, editor = {Cristiana Bolchini and Yong{-}Bin Kim and Adelio Salsano and Nur A. Touba}, title = {Analysis of Specified Bit Handling Capability of Combinational Expander Networks}, booktitle = {22nd {IEEE} International Symposium on Defect and Fault-Tolerance in {VLSI} Systems {(DFT} 2007), 26-28 September 2007, Rome, Italy}, pages = {252--260}, publisher = {{IEEE} Computer Society}, year = {2007}, url = {https://doi.org/10.1109/DFT.2007.52}, doi = {10.1109/DFT.2007.52}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dft/JasP07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dft/JasCC06, author = {Abhijit Jas and Yi{-}Shing Chang and Sreejit Chakravarty}, title = {An Approach to Minimizing Functional Constraints}, booktitle = {21th {IEEE} International Symposium on Defect and Fault-Tolerance in {VLSI} Systems {(DFT} 2006), 4-6 October 2006, Arlington, Virginia, {USA}}, pages = {215--226}, publisher = {{IEEE} Computer Society}, year = {2006}, url = {https://doi.org/10.1109/DFT.2006.13}, doi = {10.1109/DFT.2006.13}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dft/JasCC06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/todaes/KrishnaJT04, author = {C. V. Krishna and Abhijit Jas and Nur A. Touba}, title = {Achieving high encoding efficiency with partial dynamic {LFSR} reseeding}, journal = {{ACM} Trans. Design Autom. Electr. Syst.}, volume = {9}, number = {4}, pages = {500--516}, year = {2004}, url = {https://doi.org/10.1145/1027084.1027089}, doi = {10.1145/1027084.1027089}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/todaes/KrishnaJT04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/JasPT04, author = {Abhijit Jas and Bahram Pouya and Nur A. Touba}, title = {Test data compression technique for embedded cores using virtual scan chains}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {12}, number = {7}, pages = {775--781}, year = {2004}, url = {https://doi.org/10.1109/TVLSI.2004.830911}, doi = {10.1109/TVLSI.2004.830911}, timestamp = {Wed, 11 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/JasPT04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/JasKT04, author = {Abhijit Jas and C. V. Krishna and Nur A. Touba}, title = {Weighted pseudorandom hybrid {BIST}}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {12}, number = {12}, pages = {1277--1283}, year = {2004}, url = {https://doi.org/10.1109/TVLSI.2004.837985}, doi = {10.1109/TVLSI.2004.837985}, timestamp = {Wed, 11 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/JasKT04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/JasGNT03, author = {Abhijit Jas and Jayabrata Ghosh{-}Dastidar and Mom{-}Eng Ng and Nur A. Touba}, title = {An efficient test vector compression scheme using selective Huffman coding}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {22}, number = {6}, pages = {797--806}, year = {2003}, url = {https://doi.org/10.1109/TCAD.2003.811452}, doi = {10.1109/TCAD.2003.811452}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/JasGNT03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/et/JasT02, author = {Abhijit Jas and Nur A. Touba}, title = {Deterministic Test Vector Compression/Decompression for Systems-on-a-Chip Using an Embedded Processor}, journal = {J. Electron. Test.}, volume = {18}, number = {4-5}, pages = {503--514}, year = {2002}, url = {https://doi.org/10.1023/A:1016505926570}, doi = {10.1023/A:1016505926570}, timestamp = {Fri, 11 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/et/JasT02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/KrishnaJT01, author = {C. V. Krishna and Abhijit Jas and Nur A. Touba}, title = {Test vector encoding using partial {LFSR} reseeding}, booktitle = {Proceedings {IEEE} International Test Conference 2001, Baltimore, MD, USA, 30 October - 1 November 2001}, pages = {885--893}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/TEST.2001.966711}, doi = {10.1109/TEST.2001.966711}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/KrishnaJT01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vts/JasKT01, author = {Abhijit Jas and C. V. Krishna and Nur A. Touba}, title = {Hybrid {BIST} Based on Weighted Pseudo-Random Testing: {A} New Test Resource Partitioning Scheme}, booktitle = {19th {IEEE} {VLSI} Test Symposium {(VTS} 2001), Test and Diagnosis in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA, {USA}}, pages = {2--8}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/VTS.2001.923409}, doi = {10.1109/VTS.2001.923409}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vts/JasKT01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vts/JasPT00, author = {Abhijit Jas and Bahram Pouya and Nur A. Touba}, title = {Virtual Scan Chains: {A} Means for Reducing Scan Length in Cores}, booktitle = {18th {IEEE} {VLSI} Test Symposium {(VTS} 2000), 30 April - 4 May 2000, Montreal, Canada}, pages = {73--78}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/VTEST.2000.843829}, doi = {10.1109/VTEST.2000.843829}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vts/JasPT00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/JasMT99, author = {Abhijit Jas and Kartik Mohanram and Nur A. Touba}, title = {An Embedded Core {DFT} Scheme to Obtain Highly Compressed Test Sets}, booktitle = {8th Asian Test Symposium {(ATS} '99), 16-18 November 1999, Shanghai, China}, pages = {275}, publisher = {{IEEE} Computer Society}, year = {1999}, url = {https://doi.org/10.1109/ATS.1999.810763}, doi = {10.1109/ATS.1999.810763}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/JasMT99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccd/JasT99, author = {Abhijit Jas and Nur A. Touba}, title = {Using an Embedded Processor for Efficient Deterministic Testing of Systems-on-a-Chip}, booktitle = {Proceedings of the {IEEE} International Conference On Computer Design, {VLSI} in Computers and Processors, {ICCD} '99, Austin, Texas, USA, October 10-13, 1999}, pages = {418}, publisher = {{IEEE} Computer Society}, year = {1999}, url = {https://doi.org/10.1109/ICCD.1999.808576}, doi = {10.1109/ICCD.1999.808576}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccd/JasT99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/QuddusJT99, author = {W. Quddus and Abhijit Jas and Nur A. Touba}, title = {Configuration self-test in FPGA-based reconfigurable systems}, booktitle = {Proceedings of the 1999 International Symposium on Circuits and Systems, {ISCAS} 1999, Orlando, Florida, USA, May 30 - June 2, 1999}, pages = {97--100}, publisher = {{IEEE}}, year = {1999}, url = {https://doi.org/10.1109/ISCAS.1999.777814}, doi = {10.1109/ISCAS.1999.777814}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/QuddusJT99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vts/JasGT99, author = {Abhijit Jas and Jayabrata Ghosh{-}Dastidar and Nur A. Touba}, title = {Scan Vector Compression/Decompression Using Statistical Coding}, booktitle = {17th {IEEE} {VLSI} Test Symposium {(VTS} '99), 25-30 April 1999, San Diego, CA, {USA}}, pages = {114--120}, publisher = {{IEEE} Computer Society}, year = {1999}, url = {https://doi.org/10.1109/VTEST.1999.766654}, doi = {10.1109/VTEST.1999.766654}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vts/JasGT99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/JasT98, author = {Abhijit Jas and Nur A. Touba}, title = {Test vector decompression via cyclical scan chains and its application to testing core-based designs}, booktitle = {Proceedings {IEEE} International Test Conference 1998, Washington, DC, USA, October 18-22, 1998}, pages = {458--464}, publisher = {{IEEE} Computer Society}, year = {1998}, url = {https://doi.org/10.1109/TEST.1998.743186}, doi = {10.1109/TEST.1998.743186}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/JasT98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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