BibTeX records: Norito Kato

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@inproceedings{DBLP:conf/pdpta/OgasawaraKYSSUNN05,
  author       = {Yoshiyasu Ogasawara and
                  Norito Kato and
                  Masanori Yamato and
                  Mikiko Sato and
                  Koichi Sasada and
                  Kaname Uchikura and
                  Mitaro Namiki and
                  Hironori Nakajo},
  editor       = {Hamid R. Arabnia},
  title        = {A New Model of Reconfigurable Cache for an {SMT} Processor and its
                  {FPGA} Implementation},
  booktitle    = {Proceedings of the International Conference on Parallel and Distributed
                  Processing Techniques and Applications, {PDPTA} 2005, Las Vegas, Nevada,
                  USA, June 27-30, 2005, Volume 2},
  pages        = {447--453},
  publisher    = {{CSREA} Press},
  year         = {2005},
  timestamp    = {Wed, 25 Jan 2006 09:50:17 +0100},
  biburl       = {https://dblp.org/rec/conf/pdpta/OgasawaraKYSSUNN05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdpta/UchikuraSSYKNN05,
  author       = {Kaname Uchikura and
                  Koichi Sasada and
                  Mikiko Sato and
                  Masanori Yamato and
                  Norito Kato and
                  Hironori Nakajo and
                  Mitaro Namiki},
  editor       = {Hamid R. Arabnia},
  title        = {Development of a Thread Scheduler for {SMT} Processor Architecture},
  booktitle    = {Proceedings of the International Conference on Parallel and Distributed
                  Processing Techniques and Applications, {PDPTA} 2005, Las Vegas, Nevada,
                  USA, June 27-30, 2005, Volume 2},
  pages        = {454--460},
  publisher    = {{CSREA} Press},
  year         = {2005},
  timestamp    = {Wed, 25 Jan 2006 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/pdpta/UchikuraSSYKNN05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdpta/KatoYTSSUNN04,
  author       = {Norito Kato and
                  Masanori Yamato and
                  Osamu Tujimoto and
                  Mikiko Sato and
                  Koichi Sasada and
                  Kaname Uchikura and
                  Mitaro Namiki and
                  Hironori Nakajo},
  editor       = {Hamid R. Arabnia},
  title        = {Dynamic Allocation of Physical Register Banks for an {SMT} Processor},
  booktitle    = {Proceedings of the International Conference on Parallel and Distributed
                  Processing Techniques and Applications, {PDPTA} '04, June 21-24, 2004,
                  Las Vegas, Nevada, USA, Volume 1},
  pages        = {317--323},
  publisher    = {{CSREA} Press},
  year         = {2004},
  timestamp    = {Fri, 19 Nov 2004 14:10:11 +0100},
  biburl       = {https://dblp.org/rec/conf/pdpta/KatoYTSSUNN04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdpta/SasadaSKKYNN03,
  author       = {Koichi Sasada and
                  Mikiko Sato and
                  Shoji Kawahara and
                  Norito Kato and
                  Masanori Yamato and
                  Hironori Nakajo and
                  Mitaro Namiki},
  editor       = {Hamid R. Arabnia and
                  Youngsong Mun},
  title        = {Implementation and Evaluation of a Thread Library for Multithreaded
                  Architecture},
  booktitle    = {Proceedings of the International Conference on Parallel and Distributed
                  Processing Techniques and Applications, {PDPTA} '03, June 23 - 26,
                  2003, Las Vegas, Nevada, USA, Volume 2},
  pages        = {609--615},
  publisher    = {{CSREA} Press},
  year         = {2003},
  timestamp    = {Fri, 05 Dec 2003 09:24:14 +0100},
  biburl       = {https://dblp.org/rec/conf/pdpta/SasadaSKKYNN03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdpta/SatoSKKYNN03,
  author       = {Mikiko Sato and
                  Koichi Sasada and
                  Shoji Kawahara and
                  Norito Kato and
                  Masanori Yamato and
                  Hironori Nakajo and
                  Mitaro Namiki},
  editor       = {Hamid R. Arabnia and
                  Youngsong Mun},
  title        = {A Process and Thread Management of the Operating System "Future"
                  for On Chip Multithreaded Architecture},
  booktitle    = {Proceedings of the International Conference on Parallel and Distributed
                  Processing Techniques and Applications, {PDPTA} '03, June 23 - 26,
                  2003, Las Vegas, Nevada, USA, Volume 4},
  pages        = {1669--1675},
  publisher    = {{CSREA} Press},
  year         = {2003},
  timestamp    = {Fri, 05 Dec 2003 09:24:20 +0100},
  biburl       = {https://dblp.org/rec/conf/pdpta/SatoSKKYNN03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdpta/NakajoYKKSSN03,
  author       = {Hironori Nakajo and
                  Masanori Yamato and
                  Shoji Kawahara and
                  Norito Kato and
                  Koichi Sasada and
                  Mikiko Sato and
                  Mitaro Namiki},
  editor       = {Hamid R. Arabnia and
                  Youngsong Mun},
  title        = {Performance Evaluation of an On-Chip Multi-Threaded Processor with
                  Cache Memory Managed by Logical Thread Number},
  booktitle    = {Proceedings of the International Conference on Parallel and Distributed
                  Processing Techniques and Applications, {PDPTA} '03, June 23 - 26,
                  2003, Las Vegas, Nevada, USA, Volume 4},
  pages        = {1775--1781},
  publisher    = {{CSREA} Press},
  year         = {2003},
  timestamp    = {Wed, 08 Oct 2003 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/pdpta/NakajoYKKSSN03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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