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ORCIDBibTeX records: Andrew A. Kennings
@article{DBLP:journals/tcad/TabriziDRBKB20,
author = {Aysa Fakheri Tabrizi and
Nima Karimpour Darav and
Logan Rakai and
Ismail Bustany and
Andrew A. Kennings and
Laleh Behjat},
title = {Eh?Predictor: {A} Deep Learning Framework to Identify Detailed Routing
Short Violations From a Placed Netlist},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1177--1190},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2917130},
doi = {10.1109/TCAD.2019.2917130},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TabriziDRBKB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DaravKVK19,
author = {Nima Karimpour Darav and
Andrew A. Kennings and
Kristofer Vorwerk and
Arun Kundu},
editor = {Kia Bazargan and
Stephen Neuendorffer},
title = {Multi-Commodity Flow-Based Spreading in a Commercial Analytic Placer},
booktitle = {Proceedings of the 2019 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2019, Seaside, CA, USA, February 24-26, 2019},
pages = {122--131},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3289602.3293896},
doi = {10.1145/3289602.3293896},
timestamp = {Tue, 05 Mar 2019 07:04:43 +0100},
biburl = {https://dblp.org/rec/conf/fpga/DaravKVK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/DaravBKWB18,
author = {Nima Karimpour Darav and
Ismail S. Bustany and
Andrew A. Kennings and
David T. Westwick and
Laleh Behjat},
title = {Eh?Legalizer: {A} High Performance Standard-Cell Legalizer Observing
Technology Constraints},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {23},
number = {4},
pages = {43:1--43:25},
year = {2018},
url = {https://doi.org/10.1145/3158215},
doi = {10.1145/3158215},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/DaravBKWB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/TabriziDXRBKB18,
author = {Aysa Fakheri Tabrizi and
Nima Karimpour Darav and
Shuchang Xu and
Logan Rakai and
Ismail Bustany and
Andrew A. Kennings and
Laleh Behjat},
title = {A machine learning framework to identify detailed routing short violations
from a placed netlist},
booktitle = {Proceedings of the 55th Annual Design Automation Conference, {DAC}
2018, San Francisco, CA, USA, June 24-29, 2018},
pages = {48:1--48:6},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3195970.3195975},
doi = {10.1145/3195970.3195975},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/TabriziDXRBKB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1811-04749,
author = {Andrew A. Kennings},
title = {Simple {FPGA} routing graph compression},
journal = {CoRR},
volume = {abs/1811.04749},
year = {2018},
url = {http://arxiv.org/abs/1811.04749},
eprinttype = {arXiv},
eprint = {1811.04749},
timestamp = {Fri, 23 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1811-04749.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/DaravBKM17,
author = {Nima Karimpour Darav and
Ismail S. Bustany and
Andrew A. Kennings and
Ravi Mamidi},
editor = {Sri Parameswaran},
title = {{ICCAD-2017} {CAD} contest in multi-deck standard cell legalization
and benchmarks},
booktitle = {2017 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 2017, Irvine, CA, USA, November 13-16, 2017},
pages = {867--871},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ICCAD.2017.8203870},
doi = {10.1109/ICCAD.2017.8203870},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iccad/DaravBKM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/DaravBKB17,
author = {Nima Karimpour Darav and
Ismail S. Bustany and
Andrew A. Kennings and
Laleh Behjat},
editor = {Mustafa Ozdal and
Chris Chu},
title = {A Fast, Robust Network Flow-based Standard-Cell Legalization Method
for Minimizing Maximum Movement},
booktitle = {Proceedings of the 2017 {ACM} on International Symposium on Physical
Design, {ISDP} 2017, Portland, OR, USA, March 19-22, 2017},
pages = {141--148},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3036669.3036680},
doi = {10.1145/3036669.3036680},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ispd/DaravBKB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/TabriziDRKB17,
author = {Aysa Fakheri Tabrizi and
Nima Karimpour Darav and
Logan Rakai and
Andrew A. Kennings and
Laleh Behjat},
title = {Detailed routing violation prediction during placement using machine
learning},
booktitle = {2017 International Symposium on {VLSI} Design, Automation and Test,
{VLSI-DAT} 2017, Hsinchu, Taiwan, April 24-27, 2017},
pages = {1--4},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/VLSI-DAT.2017.7939657},
doi = {10.1109/VLSI-DAT.2017.7939657},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi-dat/TabriziDRKB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/DaravKTWB16,
author = {Nima Karimpour Darav and
Andrew A. Kennings and
Aysa Fakheri Tabrizi and
David T. Westwick and
Laleh Behjat},
title = {Eh?Placer: {A} High-Performance Modern Technology-Driven Placer},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {21},
number = {3},
pages = {37:1--37:27},
year = {2016},
url = {https://doi.org/10.1145/2899381},
doi = {10.1145/2899381},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/DaravKTWB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/MonteiroDFFRKJB16,
author = {Jucemar Monteiro and
Nima Karimpour Darav and
Guilherme Flach and
Mateus Foga{\c{c}}a and
Ricardo Augusto da Luz Reis and
Andrew A. Kennings and
Marcelo O. Johann and
Laleh Behjat},
title = {Routing-Aware Incremental Timing-Driven Placement},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2016, Pittsburgh,
PA, USA, July 11-13, 2016},
pages = {290--295},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ISVLSI.2016.23},
doi = {10.1109/ISVLSI.2016.23},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isvlsi/MonteiroDFFRKJB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:reference/algo/KenningsM16,
author = {Andrew A. Kennings and
Igor L. Markov},
title = {Circuit Placement},
booktitle = {Encyclopedia of Algorithms},
pages = {301--306},
year = {2016},
url = {https://doi.org/10.1007/978-1-4939-2864-4\_69},
doi = {10.1007/978-1-4939-2864-4\_69},
timestamp = {Wed, 12 Jul 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/reference/algo/KenningsM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LiCKS15,
author = {Yaoqiang Li and
Pierce I{-}Jen Chuang and
Andrew A. Kennings and
Manoj Sachdev},
editor = {George A. Constantinides and
Deming Chen},
title = {An {FPGA} Implementation of a Timing-Error Tolerant Discrete Cosine
Transform (Abstract Only)},
booktitle = {Proceedings of the 2015 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, Monterey, CA, USA, February 22-24, 2015},
pages = {266},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2684746.2689113},
doi = {10.1145/2684746.2689113},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LiCKS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiCKS15,
author = {Yaoqiang Li and
Pierce I{-}Jen Chuang and
Andrew A. Kennings and
Manoj Sachdev},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Voltage-Boosted Synchronizers},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {307--312},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742075},
doi = {10.1145/2742060.2742075},
timestamp = {Tue, 23 Jul 2019 15:03:09 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiCKS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/DaravKWB15,
author = {Nima Karimpour Darav and
Andrew A. Kennings and
David T. Westwick and
Laleh Behjat},
editor = {Diana Marculescu and
Frank Liu},
title = {High Performance Global Placement and Legalization Accounting for
Fence Regions},
booktitle = {Proceedings of the {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 2015, Austin, TX, USA, November 2-6, 2015},
pages = {514--519},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ICCAD.2015.7372613},
doi = {10.1109/ICCAD.2015.7372613},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/DaravKWB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/TabriziDRKSB15,
author = {Aysa Fakheri Tabrizi and
Nima Karimpour Darav and
Logan M. Rakai and
Andrew A. Kennings and
William Swartz and
Laleh Behjat},
title = {A Detailed Routing-Aware Detailed Placement Technique},
booktitle = {2015 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2015,
Montpellier, France, July 8-10, 2015},
pages = {38--43},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVLSI.2015.108},
doi = {10.1109/ISVLSI.2015.108},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isvlsi/TabriziDRKSB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mse/DaravFTMKKBB15,
author = {Nima Karimpour Darav and
Amin Farshidi and
Aysa Fakheri Tabrizi and
Emily Marasco and
Amir Karbalaei and
Andrew A. Kennings and
Ismail S. Bustany and
Laleh Behjat},
title = {The impact of industry-organized contests on {EDA} education},
booktitle = {2015 {IEEE} International Conference on Microelectronics Systems Education,
{MSE} 2015, Pittsburgh, PA, USA, May 20-21, 2015},
pages = {21--24},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/MSE.2015.7160008},
doi = {10.1109/MSE.2015.7160008},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mse/DaravFTMKKBB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/LiCKS15,
author = {Yaoqiang Li and
Pierce I{-}Jen Chuang and
Andrew A. Kennings and
Manoj Sachdev},
title = {Runtime slack-deficit detection for a low-voltage {DCT} circuit},
booktitle = {{IEEE} 58th International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2015, Fort Collins, CO, USA, August 2-5, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/MWSCAS.2015.7282186},
doi = {10.1109/MWSCAS.2015.7282186},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/LiCKS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/KenningsDB14,
author = {Andrew A. Kennings and
Nima Karimpour Darav and
Laleh Behjat},
editor = {Lorena Garcia},
title = {Detailed placement accounting for technology constraints},
booktitle = {22nd International Conference on Very Large Scale Integration, VLSI-SoC,
Playa del Carmen, Mexico, October 6-8, 2014},
pages = {1--6},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/VLSI-SoC.2014.7004188},
doi = {10.1109/VLSI-SOC.2014.7004188},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/KenningsDB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RavishankarAK12,
author = {Chirag Ravishankar and
Jason Helge Anderson and
Andrew A. Kennings},
title = {{FPGA} Power Reduction by Guarded Evaluation Considering Logic Architecture},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {31},
number = {9},
pages = {1305--1318},
year = {2012},
url = {https://doi.org/10.1109/TCAD.2012.2192478},
doi = {10.1109/TCAD.2012.2192478},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RavishankarAK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/AnanthanarayananRGK12,
author = {Sundaram Ananthanarayanan and
Chirag Ravishankar and
Siddharth Garg and
Andrew A. Kennings},
editor = {Katherine Compton and
Brad L. Hutchings},
title = {EmPower: {FPGA} based emulation of dynamic power management algorithms
for multi-core systems on chip (abstract only)},
booktitle = {Proceedings of the {ACM/SIGDA} 20th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2012, Monterey, California, USA,
February 22-24, 2012},
pages = {266},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2145694.2145744},
doi = {10.1145/2145694.2145744},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/AnanthanarayananRGK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RavishankarAGK12,
author = {Chirag Ravishankar and
Sundaram Ananthanarayanan and
Siddharth Garg and
Andrew A. Kennings},
editor = {Dirk Koch and
Satnam Singh and
Jim T{\o}rresen},
title = {EmPower: {FPGA} based rapid prototyping of dynamic power management
algorithms for multi-processor systems on chip},
booktitle = {22nd International Conference on Field Programmable Logic and Applications
(FPL), Oslo, Norway, August 29-31, 2012},
pages = {41--48},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/FPL.2012.6339239},
doi = {10.1109/FPL.2012.6339239},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/RavishankarAGK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/RavishankarAGK12,
author = {Chirag Ravishankar and
Sundaram Ananthanarayanan and
Siddharth Garg and
Andrew A. Kennings},
editor = {Keith A. Bowman and
Kamesh V. Gadepally and
Pallab Chatterjee and
Mark M. Budnik and
Lalitha Immaneni},
title = {Analysis and evaluation of greedy thread swapping based dynamic power
management for MPSoC platforms},
booktitle = {Thirteenth International Symposium on Quality Electronic Design, {ISQED}
2012, Santa Clara, CA, USA, March 19-21, 2012},
pages = {617--624},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISQED.2012.6187557},
doi = {10.1109/ISQED.2012.6187557},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/RavishankarAGK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/RavishankarKA12,
author = {Chirag Ravishankar and
Andrew A. Kennings and
Jason Helge Anderson},
editor = {Srinivas Katkoori and
Matthew R. Guthaus and
Ayse K. Coskun and
Andreas Burg and
Ricardo Reis},
title = {{FPGA} power reduction by guarded evaluation considering physical
information},
booktitle = {20th {IEEE/IFIP} International Conference on {VLSI} and System-on-Chip,
VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012},
pages = {271--274},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/VLSI-SoC.2012.6379044},
doi = {10.1109/VLSI-SOC.2012.6379044},
timestamp = {Tue, 06 Sep 2022 16:02:54 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/RavishankarKA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/KenningsVKPF11,
author = {Andrew A. Kennings and
Kristofer Vorwerk and
Arun Kundu and
Val Pevzner and
Andy Fox},
title = {{FPGA} technology mapping with encoded libraries and staged priority
cuts},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {4},
number = {4},
pages = {35:1--35:17},
year = {2011},
url = {https://doi.org/10.1145/2068716.2068721},
doi = {10.1145/2068716.2068721},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/KenningsVKPF11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ccece/KenningsR11,
author = {Andrew A. Kennings and
Chirag Ravishankar},
title = {Parallel {FPGA} technology mapping using multi-core architectures},
booktitle = {Proceedings of the 24th Canadian Conference on Electrical and Computer
Engineering, {CCECE} 2011, Niagara Falls, Ontario, Canada, 8-11 May,
2011},
pages = {274--279},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/CCECE.2011.6030453},
doi = {10.1109/CCECE.2011.6030453},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/ccece/KenningsR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/VorwerkKPKRDH10,
author = {Kristofer Vorwerk and
Andrew A. Kennings and
Val Pevzner and
Arun Kundu and
Madhu Raman and
Julien Dunoyer and
Yaun{-}shung Hsu},
title = {Power minimisation during field programmable gate array placement},
journal = {{IET} Comput. Digit. Tech.},
volume = {4},
number = {3},
pages = {170--183},
year = {2010},
url = {https://doi.org/10.1049/iet-cdt.2009.0008},
doi = {10.1049/IET-CDT.2009.0008},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/VorwerkKPKRDH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KenningsMVPK10,
author = {Andrew A. Kennings and
Alan Mishchenko and
Kristofer Vorwerk and
Val Pevzner and
Arun Kundu},
title = {Efficient {FPGA} Resynthesis Using Precomputed {LUT} Structures},
booktitle = {International Conference on Field Programmable Logic and Applications,
{FPL} 2010, August 31 2010 - September 2, 2010, Milano, Italy},
pages = {532--537},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/FPL.2010.105},
doi = {10.1109/FPL.2010.105},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/KenningsMVPK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VorwerkKG09,
author = {Kristofer Vorwerk and
Andrew A. Kennings and
Jonathan W. Greene},
title = {Improving Simulated Annealing-Based {FPGA} Placement With Directed
Moves},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {28},
number = {2},
pages = {179--192},
year = {2009},
url = {https://doi.org/10.1109/TCAD.2008.2009167},
doi = {10.1109/TCAD.2008.2009167},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/VorwerkKG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KenningsVKPF09,
author = {Andrew A. Kennings and
Kristofer Vorwerk and
Arun Kundu and
Val Pevzner and
Andy Fox},
editor = {Paul Chow and
Peter Y. K. Cheung},
title = {{FPGA} technology mapping with encoded libraries andstaged priority
cuts},
booktitle = {Proceedings of the {ACM/SIGDA} 17th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2009, Monterey, California, USA,
February 22-24, 2009},
pages = {143--150},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1508128.1508151},
doi = {10.1145/1508128.1508151},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KenningsVKPF09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/PevznerKF09,
author = {Val Pevzner and
Andrew A. Kennings and
Andy Fox},
editor = {Gi{-}Joon Nam and
Prashant Saxena},
title = {Physical optimization for FPGAs using post-placement topology rewriting},
booktitle = {Proceedings of the 2009 International Symposium on Physical Design,
{ISPD} 2009, San Diego, California, USA, March 29 - April 1, 2009},
pages = {91--98},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1514932.1514955},
doi = {10.1145/1514932.1514955},
timestamp = {Tue, 06 Nov 2018 11:07:47 +0100},
biburl = {https://dblp.org/rec/conf/ispd/PevznerKF09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/VorwerkRDHKK08,
author = {Kristofer Vorwerk and
Madhu Raman and
Julien Dunoyer and
Yaun{-}Chung Hsu and
Arun Kundu and
Andrew A. Kennings},
title = {A technique for minimizing power during {FPGA} placement},
booktitle = {{FPL} 2008, International Conference on Field Programmable Logic and
Applications, Heidelberg, Germany, 8-10 September 2008},
pages = {233--238},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPL.2008.4629937},
doi = {10.1109/FPL.2008.4629937},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/VorwerkRDHKK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/slip/2008,
editor = {Ion I. Mandoiu and
Andrew A. Kennings},
title = {The Tenth International Workshop on System-Level Interconnect Prediction
{(SLIP} 2008), Newcastle, UK, April 5-8, 2008, Proceedings},
publisher = {{ACM}},
year = {2008},
isbn = {978-1-59593-918-0},
timestamp = {Tue, 08 Apr 2008 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/slip/2008.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:reference/algo/KenningsM08,
author = {Andrew A. Kennings and
Igor L. Markov},
editor = {Ming{-}Yang Kao},
title = {Circuit Placement},
booktitle = {Encyclopedia of Algorithms - 2008 Edition},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-0-387-30162-4\_69},
doi = {10.1007/978-0-387-30162-4\_69},
timestamp = {Thu, 27 Jun 2019 16:25:31 +0200},
biburl = {https://dblp.org/rec/reference/algo/KenningsM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:reference/crc/KenningsV08,
author = {Andrew A. Kennings and
Kristofer Vorwerk},
editor = {Charles J. Alpert and
Dinesh P. Mehta and
Sachin S. Sapatnekar},
title = {Force-Directed and Other Continuous Placement Methods},
booktitle = {Handbook of Algorithms for Physical Design Automation},
publisher = {Auerbach Publications},
year = {2008},
url = {https://doi.org/10.1201/9781420013481.ch18},
doi = {10.1201/9781420013481.CH18},
timestamp = {Mon, 26 Oct 2020 09:04:39 +0100},
biburl = {https://dblp.org/rec/reference/crc/KenningsV08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiBK07,
author = {Jianhua Li and
Laleh Behjat and
Andrew A. Kennings},
title = {Net Cluster: {A} Net-Reduction-Based Clustering Preprocessing Algorithm
for Partitioning and Placement},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {26},
number = {4},
pages = {669--679},
year = {2007},
url = {https://doi.org/10.1109/TCAD.2007.892339},
doi = {10.1109/TCAD.2007.892339},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiBK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChenVK07,
author = {Doris T. Chen and
Kristofer Vorwerk and
Andrew A. Kennings},
editor = {Koen Bertels and
Walid A. Najjar and
Arjan J. van Genderen and
Stamatis Vassiliadis},
title = {Improving Timing-Driven {FPGA} Packing With Physical Information},
booktitle = {{FPL} 2007, International Conference on Field Programmable Logic and
Applications, Amsterdam, The Netherlands, 27-29 August 2007},
pages = {117--123},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/FPL.2007.4380635},
doi = {10.1109/FPL.2007.4380635},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ChenVK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/VorwerkKGC07,
author = {Kristofer Vorwerk and
Andrew A. Kennings and
Jonathan W. Greene and
Doris T. Chen},
editor = {Koen Bertels and
Walid A. Najjar and
Arjan J. van Genderen and
Stamatis Vassiliadis},
title = {Improving Annealing Via Directed Moves},
booktitle = {{FPL} 2007, International Conference on Field Programmable Logic and
Applications, Amsterdam, The Netherlands, 27-29 August 2007},
pages = {363--370},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/FPL.2007.4380673},
doi = {10.1109/FPL.2007.4380673},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/VorwerkKGC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fplay/WongK07,
author = {Alexander Wong and
Andrew A. Kennings},
editor = {Bill Kapralos and
Michael Katchabaw and
Jay Rajnovich},
title = {Adaptive multiple texture approach to texture packing for 3D video
games},
booktitle = {Proceedings of the 2007 conference on Future Play, Toronto, ON, Canada,
November 15 - 17, 2007},
pages = {189--196},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1328202.1328236},
doi = {10.1145/1328202.1328236},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fplay/WongK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/VorwerkKCB07,
author = {Kristofer Vorwerk and
Andrew A. Kennings and
Doris T. Chen and
Laleh Behjat},
editor = {Hai Zhou and
Enrico Macii and
Zhiyuan Yan and
Yehia Massoud},
title = {Floorplan repair using dynamic whitespace management},
booktitle = {Proceedings of the 17th {ACM} Great Lakes Symposium on {VLSI} 2007,
Stresa, Lago Maggiore, Italy, March 11-13, 2007},
pages = {552--557},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1228784.1228915},
doi = {10.1145/1228784.1228915},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/VorwerkKCB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/slip/2007,
editor = {Andrew A. Kennings and
Ion I. Mandoiu},
title = {The Ninth International Workshop on System-Level Interconnect Prediction
{(SLIP} 2007), Austin, Texas, USA, March 17-18, 2007, Proceedings},
publisher = {{ACM}},
year = {2007},
isbn = {978-1-59593-622-6},
timestamp = {Mon, 27 Aug 2007 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/slip/2007.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KenningsV06,
author = {Andrew A. Kennings and
Kristofer Vorwerk},
title = {Force-Directed Methods for Generic Placement},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {25},
number = {10},
pages = {2076--2087},
year = {2006},
url = {https://doi.org/10.1109/TCAD.2005.862748},
doi = {10.1109/TCAD.2005.862748},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KenningsV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/disopt/AnjosKV05,
author = {Miguel F. Anjos and
Andrew A. Kennings and
Anthony Vannelli},
title = {A semidefinite optimization approach for the single-row layout problem
with unequal dimensions},
journal = {Discret. Optim.},
volume = {2},
number = {2},
pages = {113--122},
year = {2005},
url = {https://doi.org/10.1016/j.disopt.2005.03.001},
doi = {10.1016/J.DISOPT.2005.03.001},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/disopt/AnjosKV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HungBK05,
author = {Austin Hung and
William D. Bishop and
Andrew A. Kennings},
title = {Symmetric Multiprocessing on Programmable Chips Made Easy},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {240--245},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.286},
doi = {10.1109/DATE.2005.286},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/HungBK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/VorwerkK05,
author = {Kristofer Vorwerk and
Andrew A. Kennings},
title = {An Improved Multi-Level Framework for Force-Directed Placement},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {902--907},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.59},
doi = {10.1109/DATE.2005.59},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/VorwerkK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/VorwerkK05,
author = {Kristofer Vorwerk and
Andrew A. Kennings},
title = {Mixed-size placement via line search},
booktitle = {2005 International Conference on Computer-Aided Design, {ICCAD} 2005,
San Jose, CA, USA, November 6-10, 2005},
pages = {899--904},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ICCAD.2005.1560189},
doi = {10.1109/ICCAD.2005.1560189},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/VorwerkK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/HungSAKC04,
author = {William N. N. Hung and
Xiaoyu Song and
El Mostapha Aboulhamid and
Andrew A. Kennings and
Alan J. Coppola},
title = {Segmented channel routability via satisfiability},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {9},
number = {4},
pages = {517--528},
year = {2004},
url = {https://doi.org/10.1145/1027084.1027090},
doi = {10.1145/1027084.1027090},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/HungSAKC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ersa/HungBK04,
author = {Austin Hung and
William D. Bishop and
Andrew A. Kennings},
editor = {Toomas P. Plaks},
title = {Enabling Cache Coherency for N-Way {SMP} Systems on Programmable Chips},
booktitle = {Proceedings of the International Conference on Engineering of Reconfigurable
Systems and Algorithms, ERSA'04, June 21-24, 2004, Las Vegas, Nevada,
{USA}},
pages = {312},
publisher = {{CSREA} Press},
year = {2004},
timestamp = {Thu, 09 Jun 2005 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ersa/HungBK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/VorwerkKV04,
author = {Kristofer Vorwerk and
Andrew A. Kennings and
Anthony Vannelli},
title = {Engineering details of a stable force-directed placer},
booktitle = {2004 International Conference on Computer-Aided Design, {ICCAD} 2004,
San Jose, CA, USA, November 7-11, 2004},
pages = {573--580},
publisher = {{IEEE} Computer Society / {ACM}},
year = {2004},
url = {https://doi.org/10.1109/ICCAD.2004.1382642},
doi = {10.1109/ICCAD.2004.1382642},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/VorwerkKV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/SongHMCKC03,
author = {Xiaoyu Song and
William N. N. Hung and
Alan Mishchenko and
Malgorzata Chrzanowska{-}Jeske and
Andrew A. Kennings and
Alan J. Coppola},
title = {Board-level multiterminal net assignment for the partial cross-bar
architecture},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {11},
number = {3},
pages = {511--514},
year = {2003},
url = {https://doi.org/10.1109/TVLSI.2003.812322},
doi = {10.1109/TVLSI.2003.812322},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/SongHMCKC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SongHMCCK02,
author = {Xiaoyu Song and
William N. N. Hung and
Alan Mishchenko and
Malgorzata Chrzanowska{-}Jeske and
Alan J. Coppola and
Andrew A. Kennings},
editor = {Kanad Ghose and
Patrick H. Madden and
Vivek De and
Peter M. Kogge},
title = {Board-level multiterminal net assignment},
booktitle = {Proceedings of the 12th {ACM} Great Lakes Symposium on {VLSI} 2002,
New York, NY, USA, April 18-19, 2002},
pages = {130--135},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/505306.505335},
doi = {10.1145/505306.505335},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SongHMCCK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HungSCK02,
author = {William N. N. Hung and
Xiaoyu Song and
Alan J. Coppola and
Andrew A. Kennings},
title = {On segmented channel routability},
booktitle = {Proceedings of the 2002 International Symposium on Circuits and Systems,
{ISCAS} 2002, Scottsdale, Arizona, USA, May 26-29, 2002},
pages = {169--172},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/ISCAS.2002.1009804},
doi = {10.1109/ISCAS.2002.1009804},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HungSCK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KenningsM00,
author = {Andrew A. Kennings and
Igor L. Markov},
title = {Analytical minimization of half-perimeter wirelength},
booktitle = {Proceedings of {ASP-DAC} 2000, Asia and South Pacific Design Automation
Conference 2000, Yokohama, Japan},
pages = {179--184},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/368434.368600},
doi = {10.1145/368434.368600},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/KenningsM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BaldickKKM99,
author = {Ross Baldick and
Andrew B. Kahng and
Andrew A. Kennings and
Igor L. Markov},
title = {Function Smoothing with Applications to {VLSI} Layout},
booktitle = {Proceedings of the 1999 Conference on Asia South Pacific Design Automation,
Wanchai, Hong Kong, China, January 18-21, 1999},
pages = {225},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ASPDAC.1999.760001},
doi = {10.1109/ASPDAC.1999.760001},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/BaldickKKM99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/CaldwellKKM99,
author = {Andrew E. Caldwell and
Andrew B. Kahng and
Andrew A. Kennings and
Igor L. Markov},
editor = {Mary Jane Irwin},
title = {Hypergraph Partitioning for {VLSI} {CAD:} Methodology for Heuristic
Development, Experimentation and Reporting},
booktitle = {Proceedings of the 36th Conference on Design Automation, New Orleans,
LA, USA, June 21-25, 1999},
pages = {349--354},
publisher = {{ACM} Press},
year = {1999},
url = {https://doi.org/10.1145/309847.309955},
doi = {10.1145/309847.309955},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/CaldwellKKM99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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