Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDBibTeX records: Erik Jan Marinissen
@article{DBLP:journals/dt/Gao0BCSMHGM24,
author = {Zhan Gao and
Min{-}Chun Hu and
Rogier Baert and
Bilal Chehab and
Joe Swenton and
Santosh Malagi and
Jos Huisken and
Kees Goossens and
Erik Jan Marinissen},
title = {Cell-Aware Test on Various Circuits in an Advanced 3-nm Technology},
journal = {{IEEE} Des. Test},
volume = {41},
number = {2},
pages = {56--64},
year = {2024},
url = {https://doi.org/10.1109/MDAT.2023.3294872},
doi = {10.1109/MDAT.2023.3294872},
timestamp = {Sat, 16 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/Gao0BCSMHGM24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/ChuangLCBWGM23,
author = {Po{-}Yao Chuang and
Francesco Lorenzelli and
Sreejit Chakravarty and
Slimane Boutobza and
Cheng{-}Wen Wu and
Georges G. E. Gielen and
Erik Jan Marinissen},
title = {Effective and Efficient Test and Diagnosis Pattern Generation for
Many Inter-Die Interconnects in Chiplet-Based Packages},
booktitle = {{IEEE} International 3D Systems Integration Conference, 3DIC 2023,
Cork, Ireland, May 10-12, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/3DIC57175.2023.10154900},
doi = {10.1109/3DIC57175.2023.10154900},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/3dic/ChuangLCBWGM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/AouichiYFRKMCTH23,
author = {Ahmed Aouichi and
Sicong Yuan and
Moritz Fieback and
Siddharth Rao and
Woojin Kim and
Erik Jan Marinissen and
Sebastien Couet and
Mottaqiallah Taouil and
Said Hamdioui},
title = {Device Aware Diagnosis for Unique Defects in STT-MRAMs},
booktitle = {32nd {IEEE} Asian Test Symposium, {ATS} 2023, Beijing, China, October
14-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ATS59501.2023.10317952},
doi = {10.1109/ATS59501.2023.10317952},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/AouichiYFRKMCTH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/YuanTFXMKRCH23,
author = {Sicong Yuan and
Mottaqiallah Taouil and
Moritz Fieback and
Hanzhi Xun and
Erik Jan Marinissen and
Gouri Sankar Kar and
Sidharth Rao and
Sebastien Couet and
Said Hamdioui},
title = {Device-Aware Test for Back-Hopping Defects in STT-MRAMs},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2023, Antwerp, Belgium, April 17-19, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.23919/DATE56975.2023.10137071},
doi = {10.23919/DATE56975.2023.10137071},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/YuanTFXMKRCH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/LorenzelliEGGKLSWGMG23,
author = {Francesco Lorenzelli and
Asser Elsayed and
Clement Godfrin and
Alexander Grill and
Stefan Kubicek and
Ruoyu Li and
Michele Stucchi and
Danny Wan and
Kristiaan De Greve and
Erik Jan Marinissen and
Georges G. E. Gielen},
title = {Study of Transistor Metrics for Room-Temperature Screening of Single
Electron Transistors for Silicon Spin Qubit Applications},
booktitle = {{IEEE} European Test Symposium, {ETS} 2023, Venezia, Italy, May 22-26,
2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ETS56758.2023.10173954},
doi = {10.1109/ETS56758.2023.10173954},
timestamp = {Fri, 14 Jul 2023 22:01:39 +0200},
biburl = {https://dblp.org/rec/conf/ets/LorenzelliEGGKLSWGMG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/LorenzelliEGGKL23,
author = {Francesco Lorenzelli and
Asser Elsayed and
Clement Godfrin and
Alexander Grill and
Stefan Kubicek and
Ruoyu Li and
Michele Stucchi and
Danny Wan and
Kristiaan De Greve and
Erik Jan Marinissen and
Georges G. E. Gielen},
title = {Wafer-Scale Electrical Characterization of Silicon Quantum Dots from
Room to Low Temperatures},
booktitle = {{IEEE} International Test Conference, {ITC} 2023, Anaheim, CA, USA,
October 7-15, 2023},
pages = {151--158},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ITC51656.2023.00031},
doi = {10.1109/ITC51656.2023.00031},
timestamp = {Tue, 09 Jan 2024 17:03:11 +0100},
biburl = {https://dblp.org/rec/conf/itc/LorenzelliEGGKL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/YuanZFXMKRCTH23,
author = {Sicong Yuan and
Z. Zhang and
Moritz Fieback and
Hanzhi Xun and
Erik Jan Marinissen and
Gouri Sankar Kar and
Sidharth Rao and
Sebastien Couet and
M. Taouil and
Said Hamdioui},
title = {Magnetic Coupling Based Test Development for Contact and Interconnect
Defects in STT-MRAMs},
booktitle = {{IEEE} International Test Conference, {ITC} 2023, Anaheim, CA, USA,
October 7-15, 2023},
pages = {236--245},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ITC51656.2023.00040},
doi = {10.1109/ITC51656.2023.00040},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/YuanZFXMKRCTH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc-asia/ChuangLM23,
author = {Po{-}Yao Chuang and
Francesco Lorenzelli and
Erik Jan Marinissen},
title = {Generating Test Patterns for Chiplet Interconnects: Achieving Optimal
Effectiveness and Efficiency},
booktitle = {{IEEE} International Test Conference in Asia, ITC-Asia 2023, Matsue,
Japan, September 12-14, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ITC-Asia58802.2023.10301169},
doi = {10.1109/ITC-ASIA58802.2023.10301169},
timestamp = {Wed, 15 Nov 2023 09:43:46 +0100},
biburl = {https://dblp.org/rec/conf/itc-asia/ChuangLM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc-asia/Marinissen23,
author = {Erik Jan Marinissen},
title = {Moore Meets Murphy : Invited Talk 1},
booktitle = {{IEEE} International Test Conference in Asia, ITC-Asia 2023, Matsue,
Japan, September 12-14, 2023},
pages = {1},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ITC-Asia58802.2023.10301183},
doi = {10.1109/ITC-ASIA58802.2023.10301183},
timestamp = {Wed, 15 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc-asia/Marinissen23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChuangLCWGM23,
author = {Po{-}Yao Chuang and
Francesco Lorenzelli and
Sreejit Chakravarty and
Cheng{-}Wen Wu and
Georges G. E. Gielen and
Erik Jan Marinissen},
title = {Effective and Efficient Testing of Large Numbers of Inter-Die Interconnects
in Chiplet-Based Multi-Die Packages},
booktitle = {41st {IEEE} {VLSI} Test Symposium, {VTS} 2023, San Diego, CA, USA,
April 24-26, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/VTS56346.2023.10140006},
doi = {10.1109/VTS56346.2023.10140006},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChuangLCWGM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/VinnakotaDBMC23,
author = {Bapi Vinnakota and
Jaber Derakhshandeh and
Eric Beyne and
Erik Jan Marinissen and
Sreejit Chakravarty},
title = {{IP} Session on Chiplet: Design, Assembly, and Test},
booktitle = {41st {IEEE} {VLSI} Test Symposium, {VTS} 2023, San Diego, CA, USA,
April 24-26, 2023},
pages = {1},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/VTS56346.2023.10140103},
doi = {10.1109/VTS56346.2023.10140103},
timestamp = {Fri, 09 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/VinnakotaDBMC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/CronJM22,
author = {Adam Cron and
Hailong Jiao and
Erik Jan Marinissen},
title = {Guest Editors' Introduction: Special Issue on Design and Test of Multidie
Packages},
journal = {{IEEE} Des. Test},
volume = {39},
number = {5},
pages = {5--6},
year = {2022},
url = {https://doi.org/10.1109/MDAT.2022.3192358},
doi = {10.1109/MDAT.2022.3192358},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/CronJM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/MontaKFMHNM22,
author = {Kazuki Monta and
Leonidas Katselas and
Ferenc Fodor and
Takuji Miki and
Alkis A. Hatzopoulos and
Makoto Nagata and
Erik Jan Marinissen},
title = {Testing Embedded Toggle Generation Through On-Chip IR-Drop Measurements},
journal = {{IEEE} Des. Test},
volume = {39},
number = {5},
pages = {79--87},
year = {2022},
url = {https://doi.org/10.1109/MDAT.2022.3178050},
doi = {10.1109/MDAT.2022.3178050},
timestamp = {Thu, 22 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/MontaKFMHNM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/WuRTMKH22,
author = {Lizhou Wu and
Siddharth Rao and
Mottaqiallah Taouil and
Erik Jan Marinissen and
Gouri Sankar Kar and
Said Hamdioui},
title = {Characterization, Modeling, and Test of Intermediate State Defects
in STT-MRAMs},
journal = {{IEEE} Trans. Computers},
volume = {71},
number = {9},
pages = {2219--2233},
year = {2022},
url = {https://doi.org/10.1109/TC.2021.3125228},
doi = {10.1109/TC.2021.3125228},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/WuRTMKH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuRTMKH22,
author = {Lizhou Wu and
Siddharth Rao and
Mottaqiallah Taouil and
Erik Jan Marinissen and
Gouri Sankar Kar and
Said Hamdioui},
title = {{MFA-MTJ} Model: Magnetic-Field-Aware Compact Model of pMTJ for Robust
{STT-MRAM} Design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {41},
number = {11},
pages = {4991--5004},
year = {2022},
url = {https://doi.org/10.1109/TCAD.2021.3140157},
doi = {10.1109/TCAD.2021.3140157},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WuRTMKH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasII/CaoJM22,
author = {Xugang Cao and
Hailong Jiao and
Erik Jan Marinissen},
title = {A Bypassable Scan Flip-Flop for Low Power Testing With Data Retention
Capability},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {69},
number = {2},
pages = {554--558},
year = {2022},
url = {https://doi.org/10.1109/TCSII.2021.3096885},
doi = {10.1109/TCSII.2021.3096885},
timestamp = {Tue, 08 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasII/CaoJM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/CronMM21,
author = {Adam Cron and
Erik Jan Marinissen},
title = {{IEEE} Standard 1838 Is on the Move},
journal = {Computer},
volume = {54},
number = {11},
pages = {88--94},
year = {2021},
url = {https://doi.org/10.1109/MC.2021.3106415},
doi = {10.1109/MC.2021.3106415},
timestamp = {Wed, 23 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/computer/CronMM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/JianFWM21,
author = {Yu{-}Rong Jian and
Ferenc Fodor and
Cheng{-}Wen Wu and
Erik Jan Marinissen},
title = {Automated Probe-Mark Analysis for Advanced Probe Technology Characterization},
journal = {{IEEE} Des. Test},
volume = {38},
number = {5},
pages = {82--89},
year = {2021},
url = {https://doi.org/10.1109/MDAT.2020.3034043},
doi = {10.1109/MDAT.2020.3034043},
timestamp = {Tue, 05 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/JianFWM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/GaoHMSHGM21,
author = {Zhan Gao and
Min{-}Chun Hu and
Santosh Malagi and
Joe Swenton and
Jos Huisken and
Kees Goossens and
Erik Jan Marinissen},
title = {Reducing Library Characterization Time for Cell-aware Test while Maintaining
Test Quality},
journal = {J. Electron. Test.},
volume = {37},
number = {2},
pages = {161--189},
year = {2021},
url = {https://doi.org/10.1007/s10836-021-05943-3},
doi = {10.1007/S10836-021-05943-3},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/GaoHMSHGM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tetc/WuRTMFMKH21,
author = {Lizhou Wu and
Siddharth Rao and
Mottaqiallah Taouil and
Guilherme Cardoso Medeiros and
Moritz Fieback and
Erik Jan Marinissen and
Gouri Sankar Kar and
Said Hamdioui},
title = {Defect and Fault Modeling Framework for {STT-MRAM} Testing},
journal = {{IEEE} Trans. Emerg. Top. Comput.},
volume = {9},
number = {2},
pages = {707--723},
year = {2021},
url = {https://doi.org/10.1109/TETC.2019.2960375},
doi = {10.1109/TETC.2019.2960375},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tetc/WuRTMFMKH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WuRTMKH21,
author = {Lizhou Wu and
Siddharth Rao and
Mottaqiallah Taouil and
Erik Jan Marinissen and
Gouri Sankar Kar and
Said Hamdioui},
title = {Characterization and Fault Modeling of Intermediate State Defects
in {STT-MRAM}},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2021, Grenoble, France, February 1-5, 2021},
pages = {1717--1722},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.23919/DATE51398.2021.9473999},
doi = {10.23919/DATE51398.2021.9473999},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/WuRTMKH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/LorenzelliGSMM21,
author = {Francesco Lorenzelli and
Zhan Gao and
Joe Swenton and
Santosh Malagi and
Erik Jan Marinissen},
title = {Speeding up Cell-Aware Library Characterization by Preceding Simulation
with Structural Analysis},
booktitle = {26th {IEEE} European Test Symposium, {ETS} 2021, Bruges, Belgium,
May 24-28, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ETS50041.2021.9465469},
doi = {10.1109/ETS50041.2021.9465469},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/LorenzelliGSMM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/MontaKFHNM21,
author = {Kazuki Monta and
Leonidas Katselas and
Ferenc Fodor and
Alkis A. Hatzopoulos and
Makoto Nagata and
Erik Jan Marinissen},
title = {Testing Embedded Toggle Pattern Generation Through On-Chip {IR} Drop
Monitoring},
booktitle = {26th {IEEE} European Test Symposium, {ETS} 2021, Bruges, Belgium,
May 24-28, 2021},
pages = {1--4},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ETS50041.2021.9465391},
doi = {10.1109/ETS50041.2021.9465391},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/MontaKFHNM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/WuRTMKH21,
author = {Lizhou Wu and
Siddharth Rao and
Mottaqiallah Taouil and
Erik Jan Marinissen and
Gouri Sankar Kar and
Said Hamdioui},
title = {Testing {STT-MRAM:} Manufacturing Defects, Fault Models, and Test
Solutions},
booktitle = {{IEEE} International Test Conference, {ITC} 2021, Anaheim, CA, USA,
October 10-15, 2021},
pages = {143--152},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ITC50571.2021.00022},
doi = {10.1109/ITC50571.2021.00022},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/WuRTMKH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WuRTMKH20,
author = {Lizhou Wu and
Siddharth Rao and
Mottaqiallah Taouil and
Erik Jan Marinissen and
Gouri Sankar Kar and
Said Hamdioui},
title = {Impact of Magnetic Coupling and Density on {STT-MRAM} Performance},
booktitle = {2020 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020},
pages = {1211--1216},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.23919/DATE48585.2020.9116444},
doi = {10.23919/DATE48585.2020.9116444},
timestamp = {Thu, 25 Jun 2020 12:55:44 +0200},
biburl = {https://dblp.org/rec/conf/date/WuRTMKH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/HuGMSHGWM20,
author = {Min{-}Chun Hu and
Zhan Gao and
Santosh Malagi and
Joe Swenton and
Jos Huisken and
Kees Goossens and
Cheng{-}Wen Wu and
Erik Jan Marinissen},
title = {Tightening the Mesh Size of the Cell-Aware {ATPG} Net for Catching
All Detectable Weakest Faults},
booktitle = {{IEEE} European Test Symposium, {ETS} 2020, Tallinn, Estonia, May
25-29, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ETS48528.2020.9131567},
doi = {10.1109/ETS48528.2020.9131567},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/HuGMSHGWM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/StucchiFM20,
author = {Michele Stucchi and
Ferenc Fodor and
Erik Jan Marinissen},
title = {Accurate Measurements of Small Resistances in Vertical Interconnects
with Small Aspect Ratios},
booktitle = {{IEEE} European Test Symposium, {ETS} 2020, Tallinn, Estonia, May
25-29, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ETS48528.2020.9131579},
doi = {10.1109/ETS48528.2020.9131579},
timestamp = {Wed, 15 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/StucchiFM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/WuRTMKH20,
author = {Lizhou Wu and
Siddharth Rao and
Mottaqiallah Taouil and
Erik Jan Marinissen and
Gouri Sankar Kar and
Said Hamdioui},
title = {Characterization, Modeling and Test of Synthetic Anti-Ferromagnet
Flip Defect in STT-MRAMs},
booktitle = {{IEEE} International Test Conference, {ITC} 2020, Washington, DC,
USA, November 1-6, 2020},
pages = {1--10},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ITC44778.2020.9325258},
doi = {10.1109/ITC44778.2020.9325258},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/WuRTMKH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2001-05463,
author = {Lizhou Wu and
Mottaqiallah Taouil and
Siddharth Rao and
Erik Jan Marinissen and
Said Hamdioui},
title = {Survey on {STT-MRAM} Testing: Failure Mechanisms, Fault Models, and
Tests},
journal = {CoRR},
volume = {abs/2001.05463},
year = {2020},
url = {https://arxiv.org/abs/2001.05463},
eprinttype = {arXiv},
eprint = {2001.05463},
timestamp = {Fri, 17 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2001-05463.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2011-11349,
author = {Lizhou Wu and
Siddharth Rao and
Mottaqiallah Taouil and
Erik Jan Marinissen and
Gouri Sankar Kar and
Said Hamdioui},
title = {Impact of Magnetic Coupling and Density on {STT-MRAM} Performance},
journal = {CoRR},
volume = {abs/2011.11349},
year = {2020},
url = {https://arxiv.org/abs/2011.11349},
eprinttype = {arXiv},
eprint = {2011.11349},
timestamp = {Thu, 26 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2011-11349.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/VelenisVKDBCSRH19,
author = {Dimitrios Velenis and
Joeri De Vos and
Soon{-}Wook Kim and
Jaber Derakhshandeh and
Pieter Bex and
Giovanni Capuz and
Samuel Suhard and
Kenneth June Rebibis and
Stefaan Van Huylenbroeck and
Erik Jan Marinissen and
Alain Phommahaxay and
Andy Miller and
Gerald Beyer and
Geert Van der Plas and
Eric Beyne},
title = {Process Complexity and Cost Considerations of Multi-Layer Die Stacks},
booktitle = {2019 International 3D Systems Integration Conference (3DIC), Sendai,
Japan, October 8-10, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/3DIC48104.2019.9058876},
doi = {10.1109/3DIC48104.2019.9058876},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/3dic/VelenisVKDBCSRH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/WuRMTMYCHK19,
author = {Lizhou Wu and
Siddharth Rao and
Guilherme Cardoso Medeiros and
Mottaqiallah Taouil and
Erik Jan Marinissen and
Farrukh Yasin and
Sebastien Couet and
Said Hamdioui and
Gouri Sankar Kar},
title = {Pinhole Defect Characterization and Fault Modeling for {STT-MRAM}
Testing},
booktitle = {24th {IEEE} European Test Symposium, {ETS} 2019, Baden-Baden, Germany,
May 27-31, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ETS.2019.8791518},
doi = {10.1109/ETS.2019.8791518},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/WuRMTMYCHK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/FiebackWMARMTH19,
author = {Moritz Fieback and
Lizhou Wu and
Guilherme Cardoso Medeiros and
Hassen Aziza and
Siddharth Rao and
Erik Jan Marinissen and
Mottaqiallah Taouil and
Said Hamdioui},
title = {Device-Aware Test: {A} New Test Approach Towards {DPPB} Level},
booktitle = {{IEEE} International Test Conference, {ITC} 2019, Washington, DC,
USA, November 9-15, 2019},
pages = {1--10},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ITC44170.2019.9000134},
doi = {10.1109/ITC44170.2019.9000134},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/FiebackWMARMTH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/GaoMHSBHCGM19,
author = {Zhan Gao and
Santosh Malagi and
Min{-}Chun Hu and
Joe Swenton and
Rogier Baert and
Jos Huisken and
Bilal Chehab and
Kees Goossens and
Erik Jan Marinissen},
title = {Application of Cell-Aware Test on an Advanced 3nm {CMOS} Technology
Library},
booktitle = {{IEEE} International Test Conference, {ITC} 2019, Washington, DC,
USA, November 9-15, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ITC44170.2019.9000164},
doi = {10.1109/ITC44170.2019.9000164},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/GaoMHSBHCGM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc-asia/GaoHSMHGM19,
author = {Zhan Gao and
Min{-}Chun Hu and
Joe Swenton and
Santosh Malagi and
Jos Huisken and
Kees Goossens and
Erik Jan Marinissen},
title = {Optimization of Cell-Aware {ATPG} Results by Manipulating Library
Cells' Defect Detection Matrices},
booktitle = {{IEEE} International Test Conference in Asia, ITC-Asia 2019, Tokyo,
Japan, September 3-5, 2019},
pages = {91--96},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ITC-Asia.2019.00029},
doi = {10.1109/ITC-ASIA.2019.00029},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc-asia/GaoHSMHGM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/GaoMMSHG19,
author = {Zhan Gao and
Santosh Malagi and
Erik Jan Marinissen and
Joe Swenton and
Jos Huisken and
Kees Goossens},
title = {Defect-Location Identification for Cell-Aware Test},
booktitle = {{IEEE} Latin American Test Symposium, {LATS} 2019, Santiago, Chile,
March 11-13, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/LATW.2019.8704561},
doi = {10.1109/LATW.2019.8704561},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/latw/GaoMMSHG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/LiSJCBM18,
author = {Yu Li and
Ming Shao and
Hailong Jiao and
Adam Cron and
Sandeep Bhatia and
Erik Jan Marinissen},
title = {{IEEE} Std P1838's flexible parallel port and its specification with
Google's protocol buffers},
booktitle = {23rd {IEEE} European Test Symposium, {ETS} 2018, Bremen, Germany,
May 28 - June 1, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ETS.2018.8400690},
doi = {10.1109/ETS.2018.8400690},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/LiSJCBM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/SchaaijkSM18,
author = {Harm van Schaaijk and
Martien Spierings and
Erik Jan Marinissen},
title = {Automatic generation of in-circuit tests for board assembly defects},
booktitle = {23rd {IEEE} European Test Symposium, {ETS} 2018, Bremen, Germany,
May 28 - June 1, 2018},
pages = {1--2},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ETS.2018.8400714},
doi = {10.1109/ETS.2018.8400714},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/SchaaijkSM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/KatselasHJPM18,
author = {Leonidas Katselas and
Alkis A. Hatzopoulos and
Hailong Jiao and
Christos Papameletis and
Erik Jan Marinissen},
title = {On-Chip Toggle Generators to Provide Realistic Conditions during Test
of Digital 2D-SoCs and 3D-SICs},
booktitle = {{IEEE} International Test Conference, {ITC} 2018, Phoenix, AZ, USA,
October 29 - Nov. 1, 2018},
pages = {1--9},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/TEST.2018.8624803},
doi = {10.1109/TEST.2018.8624803},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/KatselasHJPM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MarinissenFPSJW18,
author = {Erik Jan Marinissen and
Ferenc Fodor and
Arnita Podpod and
Michele Stucchi and
Yu{-}Rong Jian and
Cheng{-}Wen Wu},
title = {Solutions to Multiple Probing Challenges for Test Access to Multi-Die
Stacked Integrated Circuits},
booktitle = {{IEEE} International Test Conference, {ITC} 2018, Phoenix, AZ, USA,
October 29 - Nov. 1, 2018},
pages = {1--10},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/TEST.2018.8624731},
doi = {10.1109/TEST.2018.8624731},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MarinissenFPSJW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/WuTRMH18,
author = {Lizhou Wu and
Mottaqiallah Taouil and
Siddharth Rao and
Erik Jan Marinissen and
Said Hamdioui},
title = {Electrical Modeling of {STT-MRAM} Defects},
booktitle = {{IEEE} International Test Conference, {ITC} 2018, Phoenix, AZ, USA,
October 29 - Nov. 1, 2018},
pages = {1--10},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/TEST.2018.8624749},
doi = {10.1109/TEST.2018.8624749},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/WuTRMH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc-asia/SchaaijkSM18,
author = {Harm van Schaaijk and
Martien Spierings and
Erik Jan Marinissen},
title = {Automatic Generation of In-Circuit Tests for Board Assembly Defects},
booktitle = {{IEEE} International Test Conference in Asia, ITC-Asia 2018, Harbin,
China, August 15-17, 2018},
pages = {13--18},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ITC-Asia.2018.00013},
doi = {10.1109/ITC-ASIA.2018.00013},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc-asia/SchaaijkSM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/MarinissenZ17,
author = {Erik Jan Marinissen and
Yervant Zorian},
title = {Guest Editors' Introduction: Design {\&} Test of a High-Volume
3-D Stacked Graphics Processor With High-Bandwidth Memory},
journal = {{IEEE} Des. Test},
volume = {34},
number = {1},
pages = {6--7},
year = {2017},
url = {https://doi.org/10.1109/MDAT.2016.2624265},
doi = {10.1109/MDAT.2016.2624265},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/MarinissenZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc-asia/MarinissenFWKHS17,
author = {Erik Jan Marinissen and
Ferenc Fodor and
Bart De Wachter and
Jorg Kiesewetter and
Eric Hill and
Ken Smith},
title = {A fully automatic test system for characterizing large-array fine-pitch
micro-bump probe cards},
booktitle = {International Test Conference in Asia, ITC-Asia 2017, Taipei, Taiwan,
September 13-15, 2017},
pages = {144--149},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ITC-ASIA.2017.8097130},
doi = {10.1109/ITC-ASIA.2017.8097130},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc-asia/MarinissenFWKHS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/KatselasJAPHM17,
author = {Leonidas Katselas and
Hailong Jiao and
Angelos Athanasiadis and
Christos Papameletis and
Alkis A. Hatzopoulos and
Erik Jan Marinissen},
title = {Embedded toggle generator to control the switching activity during
test of digital 2D-SoCs and 3D-SICs},
booktitle = {27th International Symposium on Power and Timing Modeling, Optimization
and Simulation, {PATMOS} 2017, Thessaloniki, Greece, September 25-27,
2017},
pages = {1--8},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/PATMOS.2017.8106969},
doi = {10.1109/PATMOS.2017.8106969},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/patmos/KatselasJAPHM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/KhursheedVHM16,
author = {S. Saqib Khursheed and
Pascal Vivet and
Fabian Hopsch and
Erik Jan Marinissen},
title = {Guest Editors' Introduction: Robust 3-D Stacked ICs},
journal = {{IEEE} Des. Test},
volume = {33},
number = {3},
pages = {6--7},
year = {2016},
url = {https://doi.org/10.1109/MDAT.2016.2542210},
doi = {10.1109/MDAT.2016.2542210},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/KhursheedVHM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/CosterHPSCMACB16,
author = {Jeroen De Coster and
Peter De Heyn and
Marianna Pantouvaki and
Brad Snyder and
Hongtao Chen and
Erik Jan Marinissen and
Philippe Absil and
Joris Van Campenhout and
Bryan Bolt},
title = {Test-station for flexible semi-automatic wafer-level silicon photonics
testing},
booktitle = {21th {IEEE} European Test Symposium, {ETS} 2016, Amsterdam, Netherlands,
May 23-27, 2016},
pages = {1--6},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ETS.2016.7519306},
doi = {10.1109/ETS.2016.7519306},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/CosterHPSCMACB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/MarinissenMJ16,
author = {Erik Jan Marinissen and
Teresa L. McLaurin and
Hailong Jiao},
title = {{IEEE} Std {P1838:} DfT standard-under-development for 2.5D-, 3D-,
and 5.5D-SICs},
booktitle = {21th {IEEE} European Test Symposium, {ETS} 2016, Amsterdam, Netherlands,
May 23-27, 2016},
pages = {1--10},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ETS.2016.7519330},
doi = {10.1109/ETS.2016.7519330},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/MarinissenMJ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/MarinissenZKHHC16,
author = {Erik Jan Marinissen and
Yervant Zorian and
Mario Konijnenburg and
Chih{-}Tsun Huang and
Ping{-}Hsuan Hsieh and
Peter Cockburn and
Jeroen Delvaux and
Vladimir Rozic and
Bohan Yang and
Dave Singel{\'{e}}e and
Ingrid Verbauwhede and
Cedric Mayor and
Robert Van Rijsinge and
Cocoy Reyes},
title = {IoT: Source of test challenges},
booktitle = {21th {IEEE} European Test Symposium, {ETS} 2016, Amsterdam, Netherlands,
May 23-27, 2016},
pages = {1--10},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ETS.2016.7519331},
doi = {10.1109/ETS.2016.7519331},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/MarinissenZKHHC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/PapameletisKCHM15,
author = {Christos Papameletis and
Brion L. Keller and
Vivek Chickermane and
Said Hamdioui and
Erik Jan Marinissen},
title = {A DfT Architecture and Tool Flow for 3-D SICs With Test Data Compression,
Embedded Cores, and Multiple Towers},
journal = {{IEEE} Des. Test},
volume = {32},
number = {4},
pages = {40--48},
year = {2015},
url = {https://doi.org/10.1109/MDAT.2015.2424422},
doi = {10.1109/MDAT.2015.2424422},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/PapameletisKCHM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/IngelssonGLM15,
author = {Urban Ingelsson and
Sandeep Kumar Goel and
Erik Larsson and
Erik Jan Marinissen},
title = {Abort-on-Fail Test Scheduling for Modular SOCs without and with Preemption},
journal = {{IEEE} Trans. Computers},
volume = {64},
number = {12},
pages = {3335--3347},
year = {2015},
url = {https://doi.org/10.1109/TC.2015.2409840},
doi = {10.1109/TC.2015.2409840},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/IngelssonGLM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TaouilMHM15,
author = {Mottaqiallah Taouil and
Mahmoud Masadeh and
Said Hamdioui and
Erik Jan Marinissen},
title = {Post-Bond Interconnect Test and Diagnosis for 3-D Memory Stacked on
Logic},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1860--1872},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2432142},
doi = {10.1109/TCAD.2015.2432142},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/TaouilMHM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DeutschCM15,
author = {Sergej Deutsch and
Krishnendu Chakrabarty and
Erik Jan Marinissen},
title = {Robust Optimization of Test-Access Architectures Under Realistic Scenarios},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {11},
pages = {1873--1884},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2432139},
doi = {10.1109/TCAD.2015.2432139},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/DeutschCM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/TaouilHM15,
author = {Mottaqiallah Taouil and
Said Hamdioui and
Erik Jan Marinissen},
title = {Yield Improvement for 3D Wafer-to-Wafer Stacked ICs Using Wafer Matching},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {20},
number = {2},
pages = {19:1--19:23},
year = {2015},
url = {https://doi.org/10.1145/2699832},
doi = {10.1145/2699832},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/TaouilHM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/VelenisDHSMPMML15,
author = {Dimitrios Velenis and
Mikael Detalle and
Geert Hellings and
Mirko Scholz and
Erik Jan Marinissen and
Geert Van der Plas and
Antonio La Manna and
Andy Miller and
Dimitri Linten and
Eric Beyne},
title = {Processing active devices on Si interposer and impact on cost},
booktitle = {2015 International 3D Systems Integration Conference, 3DIC 2015, Sendai,
Japan, August 31 - September 2, 2015},
pages = {TS11.2.1--TS11.2.4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/3DIC.2015.7334620},
doi = {10.1109/3DIC.2015.7334620},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/3dic/VelenisDHSMPMML15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ShibinCKPM15,
author = {Konstantin Shibin and
Vivek Chickermane and
Brion L. Keller and
Christos Papameletis and
Erik Jan Marinissen},
title = {At-Speed Testing of Inter-Die Connections of 3D-SICs in the Presence
of Shore Logic},
booktitle = {24th {IEEE} Asian Test Symposium, {ATS} 2015, Mumbai, India, November
22-25, 2015},
pages = {79--84},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ATS.2015.21},
doi = {10.1109/ATS.2015.21},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/ShibinCKPM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MarinissenWWFKS15,
author = {Erik Jan Marinissen and
Bart De Wachter and
Teng Wang and
Jens Fiedler and
Jorg Kiesewetter and
Karsten Stoll},
title = {Automated testing of bare die-to-die stacks},
booktitle = {2015 {IEEE} International Test Conference, {ITC} 2015, Anaheim, CA,
USA, October 6-8, 2015},
pages = {1--10},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/TEST.2015.7342412},
doi = {10.1109/TEST.2015.7342412},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MarinissenWWFKS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/HellingsSDVBNLH15,
author = {Geert Hellings and
Mirko Scholz and
Mikael Detalle and
Dimitrios Velenis and
Muriel de Potter de ten Broeck and
C. Roda Neve and
Y. Li and
Stefaan Van Huylenbroeck and
Shih{-}Hung Chen and
Erik Jan Marinissen and
Antonio La Manna and
Geert Van der Plas and
Dimitri Linten and
Eric Beyne and
Aaron Thean},
title = {Active-lite interposer for 2.5 {\&} 3D integration},
booktitle = {Symposium on {VLSI} Circuits, {VLSIC} 2015, Kyoto, Japan, June 17-19,
2015},
pages = {222},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/VLSIC.2015.7231374},
doi = {10.1109/VLSIC.2015.7231374},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/HellingsSDVBNLH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ChiMGW14,
author = {Chun{-}Chuan Chi and
Erik Jan Marinissen and
Sandeep Kumar Goel and
Cheng{-}Wen Wu},
title = {Low-Cost Post-Bond Testing of 3-D ICs Containing a Passive Silicon
Interposer Base},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {22},
number = {11},
pages = {2388--2401},
year = {2014},
url = {https://doi.org/10.1109/TVLSI.2013.2293192},
doi = {10.1109/TVLSI.2013.2293192},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ChiMGW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/TaouilMHM14,
author = {Mottaqiallah Taouil and
Mahmoud Masadeh and
Said Hamdioui and
Erik Jan Marinissen},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {Interconnect test for 3D stacked memory-on-logic},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--6},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.139},
doi = {10.7873/DATE.2014.139},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/TaouilMHM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MarinissenWODPB14,
author = {Erik Jan Marinissen and
Bart De Wachter and
Stephen O'Loughlin and
Sergej Deutsch and
Christos Papameletis and
Tobias Burgherr},
title = {Vesuvius-3D: {A} 3D-DfT demonstrator},
booktitle = {2014 International Test Conference, {ITC} 2014, Seattle, WA, USA,
October 20-23, 2014},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/TEST.2014.7035332},
doi = {10.1109/TEST.2014.7035332},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MarinissenWODPB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MarinissenWSKTH14,
author = {Erik Jan Marinissen and
Bart De Wachter and
Ken Smith and
Jorg Kiesewetter and
Mottaqiallah Taouil and
Said Hamdioui},
title = {Direct probing on large-array fine-pitch micro-bumps of a wide-I/O
logic-memory interface},
booktitle = {2014 International Test Conference, {ITC} 2014, Seattle, WA, USA,
October 20-23, 2014},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/TEST.2014.7035314},
doi = {10.1109/TEST.2014.7035314},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MarinissenWSKTH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/TaouilHM14,
author = {Mottaqiallah Taouil and
Said Hamdioui and
Erik Jan Marinissen},
title = {Quality versus cost analysis for 3D Stacked ICs},
booktitle = {32nd {IEEE} {VLSI} Test Symposium, {VTS} 2014, Napa, CA, USA, April
13-17, 2014},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/VTS.2014.6818763},
doi = {10.1109/VTS.2014.6818763},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/TaouilHM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/TaouilHMB13,
author = {Mottaqiallah Taouil and
Said Hamdioui and
Erik Jan Marinissen and
Sudipta Bhawmik},
title = {Using 3D-COSTAR for 2.5D test cost optimization},
booktitle = {2013 {IEEE} International 3D Systems Integration Conference (3DIC),
San Francisco, CA, USA, October 2-4, 2013},
pages = {1--8},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/3DIC.2013.6702351},
doi = {10.1109/3DIC.2013.6702351},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/3dic/TaouilHMB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/VelenisDMB13,
author = {Dimitrios Velenis and
Mikael Detalle and
Erik Jan Marinissen and
Eric Beyne},
title = {Si interposer build-up options and impact on 3D system cost},
booktitle = {2013 {IEEE} International 3D Systems Integration Conference (3DIC),
San Francisco, CA, USA, October 2-4, 2013},
pages = {1--5},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/3DIC.2013.6702367},
doi = {10.1109/3DIC.2013.6702367},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/3dic/VelenisDMB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MilojevicMMPVB13,
author = {Dragomir Milojevic and
Pol Marchal and
Erik Jan Marinissen and
Geert Van der Plas and
Diederik Verkest and
Eric Beyne},
title = {Design issues in heterogeneous 3D/2.5D integration},
booktitle = {18th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2013, Yokohama, Japan, January 22-25, 2013},
pages = {403--410},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ASPDAC.2013.6509630},
doi = {10.1109/ASPDAC.2013.6509630},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/MilojevicMMPVB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/Marinissen13,
author = {Erik Jan Marinissen},
editor = {Luk{\'{a}}s Sekanina and
G{\"{o}}rschwin Fey and
Jaan Raik and
Snorre Aunet and
Richard Ruzicka},
title = {Creating options for 3D-SIC testing},
booktitle = {16th {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2013, Karlovy Vary, Czech Republic,
April 8-10, 2013},
pages = {7},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/DDECS.2013.6549777},
doi = {10.1109/DDECS.2013.6549777},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/Marinissen13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/TaouilHMB13,
author = {Mottaqiallah Taouil and
Said Hamdioui and
Erik Jan Marinissen and
Sudipta Bhawmik},
title = {Impact of mid-bond testing in 3D stacked ICs},
booktitle = {2013 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFTS} 2013, New York City,
NY, USA, October 2-4, 2013},
pages = {178--183},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/DFT.2013.6653603},
doi = {10.1109/DFT.2013.6653603},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/TaouilHMB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/PapameletisKCMH13,
author = {Christos Papameletis and
Brion L. Keller and
Vivek Chickermane and
Erik Jan Marinissen and
Said Hamdioui},
title = {Automated DfT insertion and test generation for 3D-SICs with embedded
cores and multiple towers},
booktitle = {18th {IEEE} European Test Symposium, {ETS} 2013, Avignon, France,
May 27-30, 2013},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ETS.2013.6569350},
doi = {10.1109/ETS.2013.6569350},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/PapameletisKCMH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/Marinissen13,
author = {Erik Jan Marinissen},
title = {Murphy goes 3D},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2013, Natal,
Brazil, August 5-7, 2013},
pages = {102},
publisher = {{IEEE} Computer Socity},
year = {2013},
url = {https://doi.org/10.1109/ISVLSI.2013.6654641},
doi = {10.1109/ISVLSI.2013.6654641},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/Marinissen13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/DeutschCM13,
author = {Sergej Deutsch and
Krishnendu Chakrabarty and
Erik Jan Marinissen},
title = {Uncertainty-aware robust optimization of test-access architectures
for 3D stacked ICs},
booktitle = {2013 {IEEE} International Test Conference, {ITC} 2013, Anaheim, CA,
USA, September 6-13, 2013},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/TEST.2013.6651905},
doi = {10.1109/TEST.2013.6651905},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/DeutschCM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/Marinissen13,
author = {Erik Jan Marinissen},
title = {Creating options for 3D-SIC testing},
booktitle = {2013 International Symposium on {VLSI} Design, Automation, and Test,
{VLSI-DAT} 2013, Hsinchu, Taiwan, April 22-24, 2013},
pages = {1--7},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/VLDI-DAT.2013.6533800},
doi = {10.1109/VLDI-DAT.2013.6533800},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi-dat/Marinissen13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/Marinissen12,
author = {Erik Jan Marinissen},
title = {Pioneering in Asia With the {US} Venture Capital Model},
journal = {{IEEE} Des. Test Comput.},
volume = {29},
number = {6},
pages = {52--55},
year = {2012},
url = {https://doi.org/10.1109/MDT.2012.2221003},
doi = {10.1109/MDT.2012.2221003},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/Marinissen12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/MarinissenZ12,
author = {Erik Jan Marinissen and
Yervant Zorian},
title = {Guest Editorial: Special Issue on Testing of 3D Stacked Integrated
Circuits},
journal = {J. Electron. Test.},
volume = {28},
number = {1},
pages = {13--14},
year = {2012},
url = {https://doi.org/10.1007/s10836-012-5279-2},
doi = {10.1007/S10836-012-5279-2},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/MarinissenZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/TaouilHBM12,
author = {Mottaqiallah Taouil and
Said Hamdioui and
Kees Beenakker and
Erik Jan Marinissen},
title = {Test Impact on the Overall Die-to-Wafer 3D Stacked {IC} Cost},
journal = {J. Electron. Test.},
volume = {28},
number = {1},
pages = {15--25},
year = {2012},
url = {https://doi.org/10.1007/s10836-011-5270-3},
doi = {10.1007/S10836-011-5270-3},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/TaouilHBM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/MarinissenCKV12,
author = {Erik Jan Marinissen and
Chun{-}Chuan Chi and
Mario Konijnenburg and
Jouke Verbree},
title = {A DfT Architecture for 3D-SICs Based on a Standardizable Die Wrapper},
journal = {J. Electron. Test.},
volume = {28},
number = {1},
pages = {73--92},
year = {2012},
url = {https://doi.org/10.1007/s10836-011-5269-9},
doi = {10.1007/S10836-011-5269-9},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/MarinissenCKV12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/NoiaCM12,
author = {Brandon Noia and
Krishnendu Chakrabarty and
Erik Jan Marinissen},
title = {Optimization Methods for Post-Bond Testing of 3D Stacked ICs},
journal = {J. Electron. Test.},
volume = {28},
number = {1},
pages = {103--120},
year = {2012},
url = {https://doi.org/10.1007/s10836-011-5233-8},
doi = {10.1007/S10836-011-5233-8},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/NoiaCM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MarinissenVGHRMB12,
author = {Erik Jan Marinissen and
Gilbert Vandling and
Sandeep Kumar Goel and
Friedrich Hapke and
Jason Rivers and
Nikolaus Mittermaier and
Swapnil Bahl},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {{EDA} solutions to new-defect detection in advanced process technologies},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {123--128},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176444},
doi = {10.1109/DATE.2012.6176444},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/MarinissenVGHRMB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Marinissen12,
author = {Erik Jan Marinissen},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {Challenges and emerging solutions in testing TSV-based 2 1 over 2D-
and 3D-stacked ICs},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {1277--1282},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176689},
doi = {10.1109/DATE.2012.6176689},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/Marinissen12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/DeutschKCMSGCMLM12,
author = {Sergej Deutsch and
Brion L. Keller and
Vivek Chickermane and
Subhasish Mukherjee and
Navdeep Sood and
Sandeep Kumar Goel and
Ji{-}Jan Chen and
Ashok Mehta and
Frank Lee and
Erik Jan Marinissen},
title = {DfT architecture and {ATPG} for Interconnect tests of {JEDEC} Wide-I/O
memory-on-logic die stacks},
booktitle = {2012 {IEEE} International Test Conference, {ITC} 2012, Anaheim, CA,
USA, November 5-8, 2012},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/TEST.2012.6401569},
doi = {10.1109/TEST.2012.6401569},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/DeutschKCMSGCMLM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NoiaCGMV11,
author = {Brandon Noia and
Krishnendu Chakrabarty and
Sandeep Kumar Goel and
Erik Jan Marinissen and
Jouke Verbree},
title = {Test-Architecture Optimization and Test Scheduling for TSV-Based 3-D
Stacked ICs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {30},
number = {11},
pages = {1705--1718},
year = {2011},
url = {https://doi.org/10.1109/TCAD.2011.2160177},
doi = {10.1109/TCAD.2011.2160177},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/NoiaCGMV11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/DeutschCKMKMG11,
author = {Sergej Deutsch and
Vivek Chickermane and
Brion L. Keller and
Subhasish Mukherjee and
Mario Konijnenburg and
Erik Jan Marinissen and
Sandeep Kumar Goel},
title = {Automation of 3D-DfT Insertion},
booktitle = {Proceedings of the 20th {IEEE} Asian Test Symposium, {ATS} 2011, New
Delhi, India, November 20-23, 2011},
pages = {395--400},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ATS.2011.58},
doi = {10.1109/ATS.2011.58},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/DeutschCKMKMG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ChiMGW11,
author = {Chun{-}Chuan Chi and
Erik Jan Marinissen and
Sandeep Kumar Goel and
Cheng{-}Wen Wu},
title = {Multi-visit TAMs to Reduce the Post-Bond Test Length of 2.5D-SICs
with a Passive Silicon Interposer Base},
booktitle = {Proceedings of the 20th {IEEE} Asian Test Symposium, {ATS} 2011, New
Delhi, India, November 20-23, 2011},
pages = {451--456},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ATS.2011.36},
doi = {10.1109/ATS.2011.36},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/ChiMGW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/ChiMGW11,
author = {Chun{-}Chuan Chi and
Erik Jan Marinissen and
Sandeep Kumar Goel and
Cheng{-}Wen Wu},
title = {DfT Architecture for 3D-SICs with Multiple Towers},
booktitle = {16th European Test Symposium, {ETS} 2011, Trondheim, Norway, May 23-27,
2011},
pages = {51--56},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ETS.2011.52},
doi = {10.1109/ETS.2011.52},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/ChiMGW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/idt/TaouilHM11,
author = {Mottaqiallah Taouil and
Said Hamdioui and
Erik Jan Marinissen},
title = {On modeling and optimizing cost in 3D Stacked-ICs},
booktitle = {6th {IEEE} International Design and Test Workshop, {IDT} 2011, Beirut,
Lebanon, 11-14 December 2011},
pages = {24--29},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/IDT.2011.6123096},
doi = {10.1109/IDT.2011.6123096},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/idt/TaouilHM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ChiMGW11,
author = {Chun{-}Chuan Chi and
Erik Jan Marinissen and
Sandeep Kumar Goel and
Cheng{-}Wen Wu},
editor = {Bill Eklow and
R. D. (Shawn) Blanton},
title = {Post-bond testing of 2.5D-SICs and 3D-SICs containing a passive silicon
interposer base},
booktitle = {2011 {IEEE} International Test Conference, {ITC} 2011, Anaheim, CA,
USA, September 20-22, 2011},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/TEST.2011.6139181},
doi = {10.1109/TEST.2011.6139181},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ChiMGW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SmithHJGSDDKMD11,
author = {Ken Smith and
Peter Hanaway and
Mike Jolley and
Reed Gleason and
Eric Strid and
Tom Daenen and
Luc Dupas and
Bruno Knuts and
Erik Jan Marinissen and
Marc Van Dievel},
editor = {Bill Eklow and
R. D. (Shawn) Blanton},
title = {Evaluation of {TSV} and micro-bump probing for wide {I/O} testing},
booktitle = {2011 {IEEE} International Test Conference, {ITC} 2011, Anaheim, CA,
USA, September 20-22, 2011},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/TEST.2011.6139180},
doi = {10.1109/TEST.2011.6139180},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SmithHJGSDDKMD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:series/icas/Marinissen11,
author = {Erik Jan Marinissen},
editor = {Abbas Sheibanyrad and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
Axel Jantsch},
title = {Testing 3D Stacked ICs Containing Through-Silicon Vias},
booktitle = {3D Integration for NoC-based SoC Architectures},
series = {Integrated Circuits and Systems},
pages = {47--74},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-1-4419-7618-5\_3},
doi = {10.1007/978-1-4419-7618-5\_3},
timestamp = {Mon, 06 May 2019 18:53:12 +0200},
biburl = {https://dblp.org/rec/series/icas/Marinissen11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/BergRMGG10,
author = {Ardy van den Berg and
Pengwei Ren and
Erik Jan Marinissen and
Georgi Gaydadjiev and
Kees Goossens},
title = {Bandwidth Analysis of Functional Interconnects Used as Test Access
Mechanism},
journal = {J. Electron. Test.},
volume = {26},
number = {4},
pages = {453--464},
year = {2010},
url = {https://doi.org/10.1007/s10836-010-5163-x},
doi = {10.1007/S10836-010-5163-X},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/BergRMGG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/MarinissenCVK10,
author = {Erik Jan Marinissen and
Chun{-}Chuan Chi and
Jouke Verbree and
Mario Konijnenburg},
title = {3D DfT architecture for pre-bond and post-bond testing},
booktitle = {{IEEE} International Conference on 3D System Integration, 3DIC 2010,
Munich, Germany, 16-18 November 2010},
pages = {1--8},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/3DIC.2010.5751450},
doi = {10.1109/3DIC.2010.5751450},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/3dic/MarinissenCVK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/VelenisMB10,
author = {Dimitrios Velenis and
Erik Jan Marinissen and
Eric Beyne},
title = {Cost effectiveness of 3D integration options},
booktitle = {{IEEE} International Conference on 3D System Integration, 3DIC 2010,
Munich, Germany, 16-18 November 2010},
pages = {1--6},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/3DIC.2010.5751428},
doi = {10.1109/3DIC.2010.5751428},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/3dic/VelenisMB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/Marinissen10,
author = {Erik Jan Marinissen},
title = {Challenges in testing TSV-based 3D stacked ICs: Test flows, test contents,
and test access},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2010,
Kuala Lumpur, Malaysia, December 6-9, 2010},
pages = {544--547},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/APCCAS.2010.5775087},
doi = {10.1109/APCCAS.2010.5775087},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/apccas/Marinissen10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/TaouilHBM10,
author = {Mottaqiallah Taouil and
Said Hamdioui and
Kees Beenakker and
Erik Jan Marinissen},
title = {Test Cost Analysis for 3D Die-to-Wafer Stacking},
booktitle = {Proceedings of the 19th {IEEE} Asian Test Symposium, {ATS} 2010, 1-4
December 2010, Shanghai, China},
pages = {435--441},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ATS.2010.80},
doi = {10.1109/ATS.2010.80},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/TaouilHBM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MarinissenSGECNBAP10,
author = {Erik Jan Marinissen and
Adit D. Singh and
Dan Glotter and
Marco Esposito and
John M. Carulli Jr. and
Amit Nahar and
Kenneth M. Butler and
Davide Appello and
Chris Portelli},
editor = {Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller and
Enrico Macii},
title = {Adapting to adaptive testing},
booktitle = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany,
March 8-12, 2010},
pages = {556--561},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DATE.2010.5457143},
doi = {10.1109/DATE.2010.5457143},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MarinissenSGECNBAP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Marinissen10,
author = {Erik Jan Marinissen},
editor = {Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller and
Enrico Macii},
title = {Testing TSV-based three-dimensional stacked ICs},
booktitle = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany,
March 8-12, 2010},
pages = {1689--1694},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DATE.2010.5457087},
doi = {10.1109/DATE.2010.5457087},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Marinissen10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/NoiaGCMV10,
author = {Brandon Noia and
Sandeep Kumar Goel and
Krishnendu Chakrabarty and
Erik Jan Marinissen and
Jouke Verbree},
title = {Test-architecture optimization for TSV-based 3D stacked ICs},
booktitle = {15th European Test Symposium, {ETS} 2010, Prague, Czech Republic,
May 24-28, 2010},
pages = {24--29},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ETSYM.2010.5512787},
doi = {10.1109/ETSYM.2010.5512787},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/NoiaGCMV10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/VerbreeMRV10,
author = {Jouke Verbree and
Erik Jan Marinissen and
Philippe Roussel and
Dimitrios Velenis},
title = {On the cost-effectiveness of matching repositories of pre-tested wafers
for wafer-to-wafer 3D chip stacking},
booktitle = {15th European Test Symposium, {ETS} 2010, Prague, Czech Republic,
May 24-28, 2010},
pages = {36--41},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ETSYM.2010.5512785},
doi = {10.1109/ETSYM.2010.5512785},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/VerbreeMRV10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/MinasWMSOMPVM10,
author = {Nikolaos Minas and
Ingrid De Wolf and
Erik Jan Marinissen and
Michele Stucchi and
Herman Oprins and
Abdelkarim Mercha and
Geert Van der Plas and
Dimitrios Velenis and
Pol Marchal},
title = {3D integration: Circuit design, test, and reliability challenges},
booktitle = {16th {IEEE} International On-Line Testing Symposium {(IOLTS} 2010),
5-7 July, 2010, Corfu, Greece},
pages = {217},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/IOLTS.2010.5560201},
doi = {10.1109/IOLTS.2010.5560201},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/MinasWMSOMPVM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/TaouilHVM10,
author = {Mottaqiallah Taouil and
Said Hamdioui and
Jouke Verbree and
Erik Jan Marinissen},
editor = {Ron Press and
Erik H. Volkerink},
title = {On maximizing the compound yield for 3D Wafer-to-Wafer stacked ICs},
booktitle = {2011 {IEEE} International Test Conference, {ITC} 2010, Austin, TX,
USA, November 2-4, 2010},
pages = {183--192},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/TEST.2010.5699218},
doi = {10.1109/TEST.2010.5699218},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/TaouilHVM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/NoiaCM10,
author = {Brandon Noia and
Krishnendu Chakrabarty and
Erik Jan Marinissen},
editor = {Ron Press and
Erik H. Volkerink},
title = {Optimization methods for post-bond die-internal/external testing in
3D stacked ICs},
booktitle = {2011 {IEEE} International Test Conference, {ITC} 2010, Austin, TX,
USA, November 2-4, 2010},
pages = {193--201},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/TEST.2010.5699219},
doi = {10.1109/TEST.2010.5699219},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/NoiaCM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MarinissenVK10,
author = {Erik Jan Marinissen and
Jouke Verbree and
Mario Konijnenburg},
title = {A structured and scalable test access architecture for TSV-based 3D
stacked ICs},
booktitle = {28th {IEEE} {VLSI} Test Symposium, {VTS} 2010, April 19-22, 2010,
Santa Cruz, California, {USA}},
pages = {269--274},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/VTS.2010.5469556},
doi = {10.1109/VTS.2010.5469556},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MarinissenVK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/MarinissenZ09,
author = {Erik Jan Marinissen and
Yervant Zorian},
title = {Guest Editors' Introduction: The Status of {IEEE} Std 1500},
journal = {{IEEE} Des. Test Comput.},
volume = {26},
number = {1},
pages = {6--7},
year = {2009},
url = {https://doi.org/10.1109/MDT.2009.10},
doi = {10.1109/MDT.2009.10},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/MarinissenZ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/MarinissenZ09a,
author = {Erik Jan Marinissen and
Yervant Zorian},
title = {{IEEE} Std 1500 Enables Modular SoC Testing},
journal = {{IEEE} Des. Test Comput.},
volume = {26},
number = {1},
pages = {8--17},
year = {2009},
url = {https://doi.org/10.1109/MDT.2009.12},
doi = {10.1109/MDT.2009.12},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/MarinissenZ09a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/MarinissenZ09b,
author = {Erik Jan Marinissen and
Yervant Zorian},
title = {Guest Editors' Introduction: The Status of {IEEE} Std 1500 - Part
2},
journal = {{IEEE} Des. Test Comput.},
volume = {26},
number = {3},
pages = {4},
year = {2009},
url = {https://doi.org/10.1109/MDT.2009.60},
doi = {10.1109/MDT.2009.60},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/MarinissenZ09b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/SinanogluMSFR09,
author = {Ozgur Sinanoglu and
Erik Jan Marinissen and
Anuja Sehgal and
Jeff Fitzgerald and
Jeff Rearick},
title = {Test Data Volume Comparison: Monolithic vs. Modular SoC Testing},
journal = {{IEEE} Des. Test Comput.},
volume = {26},
number = {3},
pages = {25--37},
year = {2009},
url = {https://doi.org/10.1109/MDT.2009.65},
doi = {10.1109/MDT.2009.65},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/SinanogluMSFR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/GoelMSC09,
author = {Sandeep Kumar Goel and
Erik Jan Marinissen and
Anuja Sehgal and
Krishnendu Chakrabarty},
title = {Testing of SoCs with Hierarchical Cores: Common Fallacies, Test Access
Optimization, and Test Scheduling},
journal = {{IEEE} Trans. Computers},
volume = {58},
number = {3},
pages = {409--423},
year = {2009},
url = {https://doi.org/10.1109/TC.2008.169},
doi = {10.1109/TC.2008.169},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/GoelMSC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/VelenisSMSB09,
author = {Dimitrios Velenis and
Michele Stucchi and
Erik Jan Marinissen and
Bart Swinnen and
Eric Beyne},
title = {Impact of 3D design choices on manufacturing cost},
booktitle = {{IEEE} International Conference on 3D System Integration, 3DIC 2009,
San Francisco, California, USA, 28-30 September 2009},
pages = {1--5},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/3DIC.2009.5306575},
doi = {10.1109/3DIC.2009.5306575},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/3dic/VelenisSMSB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/AdolfssonSML09,
author = {Dan Adolfsson and
Joanna Siew and
Erik Jan Marinissen and
Erik Larsson},
title = {On Scan Chain Diagnosis for Intermittent Faults},
booktitle = {Proceedings of the Eighteentgh Asian Test Symposium, {ATS} 2009, 23-26
November 2009, Taichung, Taiwan},
pages = {47--54},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ATS.2009.74},
doi = {10.1109/ATS.2009.74},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/AdolfssonSML09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MarinissenLHSMSP09,
author = {Erik Jan Marinissen and
Dae Young Lee and
John P. Hayes and
Chris Sellathamby and
Brian Moore and
Steven Slupsky and
Laurence Pujol},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Contactless testing: Possibility or pipe-dream?},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {676--681},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090751},
doi = {10.1109/DATE.2009.5090751},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MarinissenLHSMSP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MarinissenZ09,
author = {Erik Jan Marinissen and
Yervant Zorian},
editor = {Gordon W. Roberts and
Bill Eklow},
title = {Testing 3D chips containing through-silicon vias},
booktitle = {2009 {IEEE} International Test Conference, {ITC} 2009, Austin, TX,
USA, November 1-6, 2009},
pages = {1--11},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/TEST.2009.5355573},
doi = {10.1109/TEST.2009.5355573},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MarinissenZ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/AitkenM08,
author = {Rob Aitken and
Erik Jan Marinissen},
title = {Guest Editors' Introduction: Addressing the Challenges of Debug and
Diagnosis},
journal = {{IEEE} Des. Test Comput.},
volume = {25},
number = {3},
pages = {206--207},
year = {2008},
url = {https://doi.org/10.1109/MDT.2008.67},
doi = {10.1109/MDT.2008.67},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/AitkenM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/Marinissen08,
author = {Erik Jan Marinissen},
title = {Bugs, moths, grasshoppers, and whales},
journal = {{IEEE} Des. Test Comput.},
volume = {25},
number = {3},
pages = {288},
year = {2008},
url = {https://doi.org/10.1109/MDT.2008.59},
doi = {10.1109/MDT.2008.59},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/Marinissen08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SinanogluM08,
author = {Ozgur Sinanoglu and
Erik Jan Marinissen},
editor = {Donatella Sciuto},
title = {Analysis of The Test Data Volume Reduction Benefit of Modular {SOC}
Testing},
booktitle = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
March 10-14, 2008},
pages = {182--187},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1109/DATE.2008.4484683},
doi = {10.1109/DATE.2008.4484683},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/SinanogluM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/BergRMGG08,
author = {Ardy van den Berg and
Pengwei Ren and
Erik Jan Marinissen and
Georgi Gaydadjiev and
Kees Goossens},
title = {Bandwidth Analysis for Reusing Functional Interconnect as Test Access
Mechanism},
booktitle = {13th European Test Symposium, {ETS} 2008, Verbania, Italy, May 25-29,
2008},
pages = {21--26},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ETS.2008.34},
doi = {10.1109/ETS.2008.34},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/BergRMGG08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/MarinissenJN07,
author = {Erik Jan Marinissen and
Axel Jantsch and
Nicola Nicolici},
title = {{DATE} 07 workshop on diagnostic services in NoCs},
journal = {{IEEE} Des. Test Comput.},
volume = {24},
number = {5},
pages = {510},
year = {2007},
url = {https://doi.org/10.1109/MDT.2007.162},
doi = {10.1109/MDT.2007.162},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/MarinissenJN07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/LandraultM07,
author = {Christian Landrault and
Erik Jan Marinissen},
title = {Editorial},
journal = {{IET} Comput. Digit. Tech.},
volume = {1},
number = {3},
pages = {145},
year = {2007},
url = {https://doi.org/10.1049/iet-cdt:20079007},
doi = {10.1049/IET-CDT:20079007},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/iet-cdt/LandraultM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/AmoryGMLM07,
author = {Alexandre M. Amory and
Kees Goossens and
Erik Jan Marinissen and
Marcelo Lubaszewski and
Fernando Moraes},
title = {Wrapper design for the reuse of a bus, network-on-chip, or other functional
interconnect as test access mechanism},
journal = {{IET} Comput. Digit. Tech.},
volume = {1},
number = {3},
pages = {197--206},
year = {2007},
url = {https://doi.org/10.1049/iet-cdt:20060152},
doi = {10.1049/IET-CDT:20060152},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/iet-cdt/AmoryGMLM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/MarinissenN07,
author = {Erik Jan Marinissen and
Nicola Nicolici},
title = {Editorial Silicon Debug and Diagnosis},
journal = {{IET} Comput. Digit. Tech.},
volume = {1},
number = {6},
pages = {659--660},
year = {2007},
url = {https://doi.org/10.1049/iet-cdt:20079026},
doi = {10.1049/IET-CDT:20079026},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/iet-cdt/MarinissenN07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WielageMAW07,
author = {Paul Wielage and
Erik Jan Marinissen and
Michel Altheimer and
Clemens Wouters},
editor = {Rudy Lauwereins and
Jan Madsen},
title = {Design and DfT of a high-speed area-efficient embedded asynchronous
{FIFO}},
booktitle = {2007 Design, Automation and Test in Europe Conference and Exposition,
{DATE} 2007, Nice, France, April 16-20, 2007},
pages = {853--858},
publisher = {{EDA} Consortium, San Jose, CA, {USA}},
year = {2007},
url = {https://doi.org/10.1109/DATE.2007.364399},
doi = {10.1109/DATE.2007.364399},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/WielageMAW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/DuboisMAWLW07,
author = {Tobias Dubois and
Erik Jan Marinissen and
Mohamed Azimane and
Paul Wielage and
Erik Larsson and
Clemens Wouters},
editor = {Rudy Lauwereins and
Jan Madsen},
title = {Test quality analysis and improvement for an embedded asynchronous
{FIFO}},
booktitle = {2007 Design, Automation and Test in Europe Conference and Exposition,
{DATE} 2007, Nice, France, April 16-20, 2007},
pages = {859--864},
publisher = {{EDA} Consortium, San Jose, CA, {USA}},
year = {2007},
url = {https://doi.org/10.1109/DATE.2007.364400},
doi = {10.1109/DATE.2007.364400},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/DuboisMAWLW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/GeuzebroekMMGH07,
author = {Jeroen Geuzebroek and
Erik Jan Marinissen and
Ananta K. Majhi and
Andreas Glowatz and
Friedrich Hapke},
editor = {Jill Sibert and
Janusz Rajski},
title = {Embedded multi-detect {ATPG} and Its Effect on the Detection of Unmodeled
Defects},
booktitle = {2007 {IEEE} International Test Conference, {ITC} 2007, Santa Clara,
California, USA, October 21-26, 2007},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/TEST.2007.4437649},
doi = {10.1109/TEST.2007.4437649},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/GeuzebroekMMGH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-0710-4687,
author = {Sandeep Kumar Goel and
Erik Jan Marinissen},
title = {On-Chip Test Infrastructure Design for Optimal Multi-Site Testing
of System Chips},
journal = {CoRR},
volume = {abs/0710.4687},
year = {2007},
url = {http://arxiv.org/abs/0710.4687},
eprinttype = {arXiv},
eprint = {0710.4687},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-0710-4687.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/SubhasishNKAMR06,
author = {Subhasish Mitra and
Ondrej Nov{\'{a}}k and
Hana Kub{\'{a}}tov{\'{a}} and
Bashir M. Al{-}Hashimi and
Erik Jan Marinissen and
C. P. Ravikumar},
title = {Conference Reports},
journal = {{IEEE} Des. Test Comput.},
volume = {23},
number = {4},
pages = {262--265},
year = {2006},
url = {https://doi.org/10.1109/MDT.2006.91},
doi = {10.1109/MDT.2006.91},
timestamp = {Tue, 23 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/SubhasishNKAMR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SehgalGMC06,
author = {Anuja Sehgal and
Sandeep Kumar Goel and
Erik Jan Marinissen and
Krishnendu Chakrabarty},
editor = {Georges G. E. Gielen},
title = {Hierarchy-aware and area-efficient test infrastructure design for
core-based system chips},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2006, Munich, Germany, March 6-10, 2006},
pages = {285--290},
publisher = {European Design and Automation Association, Leuven, Belgium},
year = {2006},
url = {https://doi.org/10.1109/DATE.2006.244140},
doi = {10.1109/DATE.2006.244140},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/SehgalGMC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/AmoryGMLM06,
author = {Alexandre M. Amory and
Kees Goossens and
Erik Jan Marinissen and
Marcelo Lubaszewski and
Fernando Moraes},
title = {Wrapper Design for the Reuse of Networks-on-Chip as Test Access Mechanism},
booktitle = {11th European Test Symposium, {ETS} 2006, Southhampton, UK, May 21-24,
2006},
pages = {213--218},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ETS.2006.48},
doi = {10.1109/ETS.2006.48},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/AmoryGMLM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/HollmannMV05,
author = {Henk D. L. Hollmann and
Erik Jan Marinissen and
Bart Vermeulen},
title = {Optimal Interconnect {ATPG} Under a Ground-Bounce Constraint},
journal = {J. Electron. Test.},
volume = {21},
number = {1},
pages = {17--31},
year = {2005},
url = {https://doi.org/10.1007/s10836-005-5284-9},
doi = {10.1007/S10836-005-5284-9},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/HollmannMV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/WaayersML05,
author = {Tom Waayers and
Erik Jan Marinissen and
Maurice Lousberg},
title = {{IEEE} Std 1500 Compliant Infrastructure forModular {SOC} Testing},
booktitle = {14th Asian Test Symposium {(ATS} 2005), 18-21 December 2005, Calcutta,
India},
pages = {450},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ATS.2005.67},
doi = {10.1109/ATS.2005.67},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/WaayersML05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GoelM05,
author = {Sandeep Kumar Goel and
Erik Jan Marinissen},
title = {On-Chip Test Infrastructure Design for Optimal Multi-Site Testing
of System Chips},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {44--49},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.231},
doi = {10.1109/DATE.2005.231},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/GoelM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MarinissenPKZ05,
author = {Erik Jan Marinissen and
Betty Prince and
Doris Keitel{-}Schulz and
Yervant Zorian},
title = {Challenges in Embedded Memory Design and Test},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {722--727},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.92},
doi = {10.1109/DATE.2005.92},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/MarinissenPKZ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/IngelssonGLM05,
author = {Urban Ingelsson and
Sandeep Kumar Goel and
Erik Larsson and
Erik Jan Marinissen},
title = {Test scheduling for modular SOCs in an abort-on-fail environment},
booktitle = {10th European Test Symposium, {ETS} 2005, Tallinn, Estonia, May 22-25,
2005},
pages = {8--13},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ETS.2005.38},
doi = {10.1109/ETS.2005.38},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/IngelssonGLM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/MarinissenW04,
author = {Erik Jan Marinissen and
Tom Waayers},
title = {Infrastructure for modular {SOC} testing},
booktitle = {Proceedings of the {IEEE} 2004 Custom Integrated Circuits Conference,
{CICC} 2004, Orlando, FL, USA, October 2004},
pages = {671--678},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/CICC.2004.1358916},
doi = {10.1109/CICC.2004.1358916},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cicc/MarinissenW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GoelCMNO04,
author = {Sandeep Kumar Goel and
Kuoshu Chiu and
Erik Jan Marinissen and
Toan Nguyen and
Steven Oostdijk},
title = {Test Infrastructure Design for the Nexperia? Home Platform {PNX8550}
System Chip},
booktitle = {2004 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2004), 16-20 February 2004, Paris, France},
pages = {108--113},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DATE.2004.1269215},
doi = {10.1109/DATE.2004.1269215},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/GoelCMNO04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/KrundelGMFR04,
author = {Ludovic A. Krundel and
Sandeep Kumar Goel and
Erik Jan Marinissen and
Marie{-}Lise Flottes and
Bruno Rouzeyre},
title = {User-constrained test architecture design for modular {SOC} testing},
booktitle = {9th European Test Symposium, {ETS} 2004, Ajaccio, France, May 23-26,
2004},
pages = {80--85},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ETSYM.2004.1347611},
doi = {10.1109/ETSYM.2004.1347611},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/KrundelGMFR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/VermeulenHKMR04,
author = {Bart Vermeulen and
Camelia Hora and
Bram Kruseman and
Erik Jan Marinissen and
Robert Van Rijsinge},
title = {Trends in Testing Integrated Circuits},
booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October
26-28, 2004, Charlotte, NC, {USA}},
pages = {688--697},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1387330},
doi = {10.1109/TEST.2004.1387330},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/VermeulenHKMR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SehgalGMC04,
author = {Anuja Sehgal and
Sandeep Kumar Goel and
Erik Jan Marinissen and
Krishnendu Chakrabarty},
title = {{IEEE} P1500-Compliant Test Wrapper Design for Hierarchical Cores},
booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October
26-28, 2004, Charlotte, NC, {USA}},
pages = {1203--1212},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1387393},
doi = {10.1109/TEST.2004.1387393},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SehgalGMC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/Marinissen04,
author = {Erik Jan Marinissen},
title = {Security vs. Test Quality: Can We Really Only Have One at a Time?},
booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October
26-28, 2004, Charlotte, NC, {USA}},
pages = {1411},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1387419},
doi = {10.1109/TEST.2004.1387419},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/Marinissen04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/MarinissenVHB03,
author = {Erik Jan Marinissen and
Bart Vermeulen and
Henk D. L. Hollmann and
Ben Bennetts},
title = {Minimizing Pattern Count for Interconnect Test under a Ground Bounce
Constraint},
journal = {{IEEE} Des. Test Comput.},
volume = {20},
number = {2},
pages = {8--18},
year = {2003},
url = {https://doi.org/10.1109/MDT.2003.1188257},
doi = {10.1109/MDT.2003.1188257},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/MarinissenVHB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/GoelM03,
author = {Sandeep Kumar Goel and
Erik Jan Marinissen},
title = {A Test Time Reduction Algorithm for Test Architecture Design for Core-Based
System Chips},
journal = {J. Electron. Test.},
volume = {19},
number = {4},
pages = {425--435},
year = {2003},
url = {https://doi.org/10.1023/A:1024644026761},
doi = {10.1023/A:1024644026761},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/GoelM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/IyengarCM03,
author = {Vikram Iyengar and
Krishnendu Chakrabarty and
Erik Jan Marinissen},
title = {Test Access Mechanism Optimization, Test Scheduling, and Tester Data
Volume Reduction for System-on-Chip},
journal = {{IEEE} Trans. Computers},
volume = {52},
number = {12},
pages = {1619--1632},
year = {2003},
url = {https://doi.org/10.1109/TC.2003.1252857},
doi = {10.1109/TC.2003.1252857},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/IyengarCM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/IyengarCM03,
author = {Vikram Iyengar and
Krishnendu Chakrabarty and
Erik Jan Marinissen},
title = {Efficient test access mechanism optimization for system-on-chip},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {22},
number = {5},
pages = {635--643},
year = {2003},
url = {https://doi.org/10.1109/TCAD.2003.810737},
doi = {10.1109/TCAD.2003.810737},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/IyengarCM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/GoelM03,
author = {Sandeep Kumar Goel and
Erik Jan Marinissen},
title = {{SOC} test architecture design for efficient utilization of test bandwidth},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {8},
number = {4},
pages = {399--429},
year = {2003},
url = {https://doi.org/10.1145/944027.944029},
doi = {10.1145/944027.944029},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/GoelM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MarinissenVMKM03,
author = {Erik Jan Marinissen and
Bart Vermeulen and
Robert Madge and
Michael Kessler and
Michael M{\"{u}}ller},
title = {Creating Value Through Test},
booktitle = {2003 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2003), 3-7 March 2003, Munich, Germany},
pages = {10402--10409},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.ieeecomputersociety.org/10.1109/DATE.2003.10023},
doi = {10.1109/DATE.2003.10023},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/MarinissenVMKM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GoelM03,
author = {Sandeep Kumar Goel and
Erik Jan Marinissen},
title = {Layout-Driven {SOC} Test Architecture Design for Test Time and Wire
Length Minimization},
booktitle = {2003 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2003), 3-7 March 2003, Munich, Germany},
pages = {10738--10741},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.ieeecomputersociety.org/10.1109/DATE.2003.10171},
doi = {10.1109/DATE.2003.10171},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/GoelM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/SehgalDMWVC03,
author = {Anuja Sehgal and
Aishwarya Dubey and
Erik Jan Marinissen and
Clemens Wouters and
Harald P. E. Vranken and
Krishnendu Chakrabarty},
title = {Yield analysis for repairable embedded memories},
booktitle = {8th European Test Workshop, {ETW} 2003, Maastricht, The Netherlands,
May 25-28, 2003},
pages = {35--40},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ETW.2003.1231666},
doi = {10.1109/ETW.2003.1231666},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/SehgalDMWVC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/GoelM03,
author = {Sandeep Kumar Goel and
Erik Jan Marinissen},
title = {Control-aware test architecture design for modular {SOC} testing},
booktitle = {8th European Test Workshop, {ETW} 2003, Maastricht, The Netherlands,
May 25-28, 2003},
pages = {57--62},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ETW.2003.1231669},
doi = {10.1109/ETW.2003.1231669},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/GoelM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/HollmannMV03,
author = {Henk D. L. Hollmann and
Erik Jan Marinissen and
Bart Vermeulen},
title = {Optimal Interconnect {ATPG} Under a Ground-Bounce Constraint},
booktitle = {Proceedings 2003 International Test Conference {(ITC} 2003), Breaking
Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte,
NC, {USA}},
pages = {369--378},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/TEST.2003.1270860},
doi = {10.1109/TEST.2003.1270860},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/HollmannMV03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/ChakrabartyM02,
author = {Krishnendu Chakrabarty and
Erik Jan Marinissen},
title = {How Useful are the {ITC} 02 SoC Test Benchmarks?},
journal = {{IEEE} Des. Test Comput.},
volume = {19},
number = {5},
pages = {120, 119},
year = {2002},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/ChakrabartyM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/IyengarCM02,
author = {Vikram Iyengar and
Krishnendu Chakrabarty and
Erik Jan Marinissen},
title = {Test Wrapper and Test Access Mechanism Co-Optimization for System-on-Chip},
journal = {J. Electron. Test.},
volume = {18},
number = {2},
pages = {213--230},
year = {2002},
url = {https://doi.org/10.1023/A:1014916913577},
doi = {10.1023/A:1014916913577},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/IyengarCM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/MarinissenKLMRZ02,
author = {Erik Jan Marinissen and
Rohit Kapur and
Maurice Lousberg and
Teresa L. McLaurin and
Mike Ricchetti and
Yervant Zorian},
title = {On {IEEE} P1500's Standard for Embedded Core Test},
journal = {J. Electron. Test.},
volume = {18},
number = {4-5},
pages = {365--383},
year = {2002},
url = {https://doi.org/10.1023/A:1016585206097},
doi = {10.1023/A:1016585206097},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/MarinissenKLMRZ02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/Marinissen02,
author = {Erik Jan Marinissen},
title = {The Role of Test Protocols in Automated Test Generation for Embedded-Core-Based
System ICs},
journal = {J. Electron. Test.},
volume = {18},
number = {4-5},
pages = {435--454},
year = {2002},
url = {https://doi.org/10.1023/A:1016545607915},
doi = {10.1023/A:1016545607915},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/Marinissen02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/IyengarCM02,
author = {Vikram Iyengar and
Krishnendu Chakrabarty and
Erik Jan Marinissen},
title = {Recent Advances in Test Planning for Modular Testing of Core-Based
SOCs},
booktitle = {11th Asian Test Symposium {(ATS} 2002), 18-20 November 2002, Guam,
{USA}},
pages = {320},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ATS.2002.1181731},
doi = {10.1109/ATS.2002.1181731},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/IyengarCM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/IyengarCM02,
author = {Vikram Iyengar and
Krishnendu Chakrabarty and
Erik Jan Marinissen},
title = {Wrapper/TAM co-optimization, constraint-driven test scheduling, and
tester data volume reduction for SOCs},
booktitle = {Proceedings of the 39th Design Automation Conference, {DAC} 2002,
New Orleans, LA, USA, June 10-14, 2002},
pages = {685--690},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/513918.514092},
doi = {10.1145/513918.514092},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/IyengarCM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/IyengarCM02,
author = {Vikram Iyengar and
Krishnendu Chakrabarty and
Erik Jan Marinissen},
title = {Efficient Wrapper/TAM Co-Optimization for Large SOCs},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {491--498},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998318},
doi = {10.1109/DATE.2002.998318},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/IyengarCM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/GoelM02,
author = {Sandeep Kumar Goel and
Erik Jan Marinissen},
title = {A novel test time reduction algorithm for test architecture design
for core-based system chips},
booktitle = {7th European Test Workshop, {ETW} 2002, Corfu, Greece, May 26-29,
2002},
pages = {7--12},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ETW.2002.1029633},
doi = {10.1109/ETW.2002.1029633},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/GoelM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MarinissenIC02,
author = {Erik Jan Marinissen and
Vikram Iyengar and
Krishnendu Chakrabarty},
title = {A Set of Benchmarks fo Modular Testing of SOCs},
booktitle = {Proceedings {IEEE} International Test Conference 2002, Baltimore,
MD, USA, October 7-10, 2002},
pages = {519--528},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/TEST.2002.1041802},
doi = {10.1109/TEST.2002.1041802},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MarinissenIC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/GoelM02,
author = {Sandeep Kumar Goel and
Erik Jan Marinissen},
title = {Effective and Efficient Test Architecture Design for SOCs},
booktitle = {Proceedings {IEEE} International Test Conference 2002, Baltimore,
MD, USA, October 7-10, 2002},
pages = {529--538},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/TEST.2002.1041803},
doi = {10.1109/TEST.2002.1041803},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/GoelM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/IyengarGMC02,
author = {Vikram Iyengar and
Sandeep Kumar Goel and
Erik Jan Marinissen and
Krishnendu Chakrabarty},
title = {Test Resource Optimization for Multi-Site Testing of SOCs Under {ATE}
Memory Depth Constraints},
booktitle = {Proceedings {IEEE} International Test Conference 2002, Baltimore,
MD, USA, October 7-10, 2002},
pages = {1159--1168},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/TEST.2002.1041874},
doi = {10.1109/TEST.2002.1041874},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/IyengarGMC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/IyengarCM02,
author = {Vikram Iyengar and
Krishnendu Chakrabarty and
Erik Jan Marinissen},
title = {On Using Rectangle Packing for {SOC} Wrapper/TAM Co-Optimization},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {253--258},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011146},
doi = {10.1109/VTS.2002.1011146},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/IyengarCM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GoelM02,
author = {Sandeep Kumar Goel and
Erik Jan Marinissen},
title = {Cluster-Based Test Architecture Design for System-on-Chip},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {259--264},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011147},
doi = {10.1109/VTS.2002.1011147},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GoelM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/KieferVMW01,
author = {Gundolf Kiefer and
Harald P. E. Vranken and
Erik Jan Marinissen and
Hans{-}Joachim Wunderlich},
title = {Application of Deterministic Logic {BIST} on Industrial Circuits},
journal = {J. Electron. Test.},
volume = {17},
number = {3-4},
pages = {351--362},
year = {2001},
url = {https://doi.org/10.1023/A:1012283800306},
doi = {10.1023/A:1012283800306},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/KieferVMW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/Marinissen01,
author = {Erik Jan Marinissen},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {An Industrial Approach to Core-Based System Chip Testing},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {389--400},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 16:01:37 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/Marinissen01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/IyengarCM01,
author = {Vikram Iyengar and
Krishnendu Chakrabarty and
Erik Jan Marinissen},
title = {Test wrapper and test access mechanism co-optimization for system-on-chip},
booktitle = {Proceedings {IEEE} International Test Conference 2001, Baltimore,
MD, USA, 30 October - 1 November 2001},
pages = {1023--1032},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/TEST.2001.966728},
doi = {10.1109/TEST.2001.966728},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/IyengarCM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/MarinissenZ01,
author = {Erik Jan Marinissen and
Yervant Zorian},
title = {Testing Embedded Core-Based System Chips},
booktitle = {2nd Latin American Test Workshop, {LATW} 2001, Cancun, Mexico, February
11-14, 2001},
pages = {2},
publisher = {{IEEE}},
year = {2001},
timestamp = {Tue, 25 Jul 2023 13:25:31 +0200},
biburl = {https://dblp.org/rec/conf/latw/MarinissenZ01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ZorianM00,
author = {Yervant Zorian and
Erik Jan Marinissen},
editor = {Giovanni De Micheli},
title = {System chip test: how will it impact your design?},
booktitle = {Proceedings of the 37th Conference on Design Automation, Los Angeles,
CA, USA, June 5-9, 2000},
pages = {136--141},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/337292.337352},
doi = {10.1145/337292.337352},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ZorianM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/KieferWVM00,
author = {Gundolf Kiefer and
Hans{-}Joachim Wunderlich and
Harald P. E. Vranken and
Erik Jan Marinissen},
title = {Application of deterministic logic {BIST} on industrial circuits},
booktitle = {Proceedings {IEEE} International Test Conference 2000, Atlantic City,
NJ, USA, October 2000},
pages = {105--114},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/TEST.2000.894197},
doi = {10.1109/TEST.2000.894197},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/KieferWVM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ZorianMK00,
author = {Yervant Zorian and
Erik Jan Marinissen and
Rohit Kapur},
title = {On using {IEEE} {P1500} {SECT} for test plug-n-play},
booktitle = {Proceedings {IEEE} International Test Conference 2000, Atlantic City,
NJ, USA, October 2000},
pages = {770--777},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/TEST.2000.894273},
doi = {10.1109/TEST.2000.894273},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ZorianMK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ZorianMLG00,
author = {Yervant Zorian and
Erik Jan Marinissen and
Maurice Lousberg and
Sandeep Kumar Goel},
title = {Wrapper design for embedded core test},
booktitle = {Proceedings {IEEE} International Test Conference 2000, Atlantic City,
NJ, USA, October 2000},
pages = {911--920},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/TEST.2000.894302},
doi = {10.1109/TEST.2000.894302},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ZorianMLG00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cm/MarinissenZ99,
author = {Erik Jan Marinissen and
Yervant Zorian},
title = {Challenges in testing core-based system ICs},
journal = {{IEEE} Commun. Mag.},
volume = {37},
number = {6},
pages = {104--109},
year = {1999},
url = {https://doi.org/10.1109/35.769283},
doi = {10.1109/35.769283},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cm/MarinissenZ99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/ZorianMD99,
author = {Yervant Zorian and
Erik Jan Marinissen and
Sujit Dey},
title = {Testing Embedded-Core-Based System Chips},
journal = {Computer},
volume = {32},
number = {6},
pages = {52--60},
year = {1999},
url = {https://doi.org/10.1109/2.769444},
doi = {10.1109/2.769444},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/computer/ZorianMD99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/MarinissenL99,
author = {Erik Jan Marinissen and
Maurice Lousberg},
title = {The role of test protocols in testing embedded-core-based system ICs},
booktitle = {4th European Test Workshop, {ETW} 1999, Constance, Germany, May 25-28,
1999},
pages = {70--75},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ETW.1999.804248},
doi = {10.1109/ETW.1999.804248},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/MarinissenL99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ZorianMKTW99,
author = {Yervant Zorian and
Erik Jan Marinissen and
Rohit Kapur and
Tony Taylor and
Lee Whetsel},
title = {Towards a standard for embedded core test: an example},
booktitle = {Proceedings {IEEE} International Test Conference 1999, Atlantic City,
NJ, USA, 27-30 September 1999},
pages = {616--627},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/TEST.1999.805786},
doi = {10.1109/TEST.1999.805786},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ZorianMKTW99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ZorianMD98,
author = {Yervant Zorian and
Erik Jan Marinissen and
Sujit Dey},
title = {Testing embedded-core based system chips},
booktitle = {Proceedings {IEEE} International Test Conference 1998, Washington,
DC, USA, October 18-22, 1998},
pages = {130--143},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/TEST.1998.743146},
doi = {10.1109/TEST.1998.743146},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ZorianMD98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MarinissenABDLW98,
author = {Erik Jan Marinissen and
Robert G. J. Arendsen and
Gerard Bos and
Hans Dingemanse and
Maurice Lousberg and
Clemens Wouters},
title = {A structured and scalable mechanism for test access to embedded reusable
cores},
booktitle = {Proceedings {IEEE} International Test Conference 1998, Washington,
DC, USA, October 18-22, 1998},
pages = {284--293},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/TEST.1998.743166},
doi = {10.1109/TEST.1998.743166},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MarinissenABDLW98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/AertsM98,
author = {Joep Aerts and
Erik Jan Marinissen},
title = {Scan chain design for test time reduction in core-based ICs},
booktitle = {Proceedings {IEEE} International Test Conference 1998, Washington,
DC, USA, October 18-22, 1998},
pages = {448--457},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/TEST.1998.743185},
doi = {10.1109/TEST.1998.743185},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/AertsM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-03-19 02:09 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
