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ORCIDBibTeX records: Pramod Kumar Meher
@article{DBLP:journals/cbm/AnsariYMD23,
author = {Mohammed Yusuf Ansari and
Yin Yang and
Pramod Kumar Meher and
Sarada Prasad Dakua},
title = {Dense-PSP-UNet: {A} neural network for fast inference liver ultrasound
segmentation},
journal = {Comput. Biol. Medicine},
volume = {153},
pages = {106478},
year = {2023},
url = {https://doi.org/10.1016/j.compbiomed.2022.106478},
doi = {10.1016/J.COMPBIOMED.2022.106478},
timestamp = {Sat, 13 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cbm/AnsariYMD23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/VermaKDM23,
author = {Anu Verma and
Khyati Kiyawat and
Bishnu Prasad Das and
Pramod Kumar Meher},
title = {An Efficient Scaling-Free Folded Hyperbolic {CORDIC} Design Using
a Novel Low-Complexity Power-of-2 Taylor Series Approximation},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {31},
number = {8},
pages = {1167--1177},
year = {2023},
url = {https://doi.org/10.1109/TVLSI.2023.3281078},
doi = {10.1109/TVLSI.2023.3281078},
timestamp = {Sat, 05 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/VermaKDM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/KaliSM23,
author = {Anil Kali and
Samrat L. Sabat and
Pramod Kumar Meher},
title = {Low-Complexity Distributed Arithmetic-Based Architecture for Inner-Product
of Variable Vectors},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {31},
number = {9},
pages = {1368--1376},
year = {2023},
url = {https://doi.org/10.1109/TVLSI.2023.3294571},
doi = {10.1109/TVLSI.2023.3294571},
timestamp = {Thu, 14 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/KaliSM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/LeeNMP22,
author = {Sun Sik Lee and
Thanh Dat Nguyen and
Pramod Kumar Meher and
Sang Yoon Park},
title = {Energy-Efficient High-Speed {ASIC} Implementation of Convolutional
Neural Network Using Novel Reduced Critical-Path Design},
journal = {{IEEE} Access},
volume = {10},
pages = {34032--34045},
year = {2022},
url = {https://doi.org/10.1109/ACCESS.2022.3162066},
doi = {10.1109/ACCESS.2022.3162066},
timestamp = {Wed, 27 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/LeeNMP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cssp/AggarwalM22,
author = {Supriya Aggarwal and
Pramod Kumar Meher},
title = {Enhanced Sharpening of {CIC} Decimation Filters, Implementation and
Applications},
journal = {Circuits Syst. Signal Process.},
volume = {41},
number = {8},
pages = {4581--4603},
year = {2022},
url = {https://doi.org/10.1007/s00034-022-01993-w},
doi = {10.1007/S00034-022-01993-W},
timestamp = {Mon, 25 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cssp/AggarwalM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/ChoMTCP21,
author = {Su Min Cho and
Pramod Kumar Meher and
Luong Tran Nhat Trung and
Hyo Jin Cho and
Sang Yoon Park},
title = {Design of Very High-Speed Pipeline {FIR} Filter Through Precise Critical
Path Analysis},
journal = {{IEEE} Access},
volume = {9},
pages = {34722--34735},
year = {2021},
url = {https://doi.org/10.1109/ACCESS.2021.3061759},
doi = {10.1109/ACCESS.2021.3061759},
timestamp = {Wed, 07 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/ChoMTCP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jrtip/JridiAM20,
author = {Maher Jridi and
Ayman Alfalou and
Pramod Kumar Meher},
title = {Efficient approximate core transform and its reconfigurable architectures
for {HEVC}},
journal = {J. Real Time Image Process.},
volume = {17},
number = {2},
pages = {329--339},
year = {2020},
url = {https://doi.org/10.1007/s11554-018-0768-x},
doi = {10.1007/S11554-018-0768-X},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jrtip/JridiAM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/RayGM20,
author = {Dwaipayan Ray and
Nithin V. George and
Pramod Kumar Meher},
title = {An Analytical Framework and Approximation Strategy for Efficient Implementation
of Distributed Arithmetic-Based Inner-Product Architectures},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {67-I},
number = {1},
pages = {212--224},
year = {2020},
url = {https://doi.org/10.1109/TCSI.2019.2948791},
doi = {10.1109/TCSI.2019.2948791},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/RayGM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/MohantyM20,
author = {Basant Kumar Mohanty and
Pramod Kumar Meher},
title = {An Efficient Parallel DA-Based Fixed-Width Design for Approximate
Inner-Product Computation},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {28},
number = {5},
pages = {1221--1229},
year = {2020},
url = {https://doi.org/10.1109/TVLSI.2020.2972772},
doi = {10.1109/TVLSI.2020.2972772},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/MohantyM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/RayGM20,
author = {Dwaipayan Ray and
Nithin V. George and
Pramod Kumar Meher},
title = {Analysis and Design of Unified Architectures for Zero-Attraction-Based
Sparse Adaptive Filters},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {28},
number = {5},
pages = {1321--1325},
year = {2020},
url = {https://doi.org/10.1109/TVLSI.2020.2965018},
doi = {10.1109/TVLSI.2020.2965018},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/RayGM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cem/SahooMG19,
author = {Subhendu Kumar Sahoo and
Pramod Kumar Meher and
Ganesh Kumar Ganjikunta},
title = {Multichannel Filters for Wireless Networks: Lookup-Table-Based Efficient
Implementation},
journal = {{IEEE} Consumer Electron. Mag.},
volume = {8},
number = {3},
pages = {44--49},
year = {2019},
url = {https://doi.org/10.1109/MCE.2019.2892242},
doi = {10.1109/MCE.2019.2892242},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cem/SahooMG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cssp/MeherM19,
author = {Bimal Kumar Meher and
Pramod Kumar Meher},
title = {Analysis of Systolic Penalties and Design of Efficient Digit-Level
Systolic-like Multiplier for Binary Extension Fields},
journal = {Circuits Syst. Signal Process.},
volume = {38},
number = {2},
pages = {774--790},
year = {2019},
url = {https://doi.org/10.1007/s00034-018-0884-7},
doi = {10.1007/S00034-018-0884-7},
timestamp = {Sun, 21 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cssp/MeherM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cssp/KumarSM19,
author = {G. Ganesh Kumar and
Subhendu Kumar Sahoo and
Pramod Kumar Meher},
title = {50 Years of {FFT} Algorithms and Applications},
journal = {Circuits Syst. Signal Process.},
volume = {38},
number = {12},
pages = {5665--5698},
year = {2019},
url = {https://doi.org/10.1007/s00034-019-01136-8},
doi = {10.1007/S00034-019-01136-8},
timestamp = {Sun, 21 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cssp/KumarSM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MohantyM19,
author = {Basant K. Mohanty and
Pramod Kumar Meher},
title = {Area-Delay-Energy Efficient {VLSI} Architecture for Scalable In-Place
Computation of {FFT} on Real Data},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {66-I},
number = {3},
pages = {1042--1050},
year = {2019},
url = {https://doi.org/10.1109/TCSI.2018.2873720},
doi = {10.1109/TCSI.2018.2873720},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MohantyM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/XieLMM19,
author = {Jiafeng Xie and
Chiou{-}Yng Lee and
Pramod Kumar Meher and
Zhi{-}Hong Mao},
title = {Novel Bit-Parallel and Digit-Serial Systolic Finite Field Multipliers
Over {\textdollar}GF(2{\^{}}m){\textdollar} Based on Reordered Normal
Basis},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {27},
number = {9},
pages = {2119--2130},
year = {2019},
url = {https://doi.org/10.1109/TVLSI.2019.2918836},
doi = {10.1109/TVLSI.2019.2918836},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/XieLMM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RayGM19,
author = {Dwaipayan Ray and
Nithin V. George and
Pramod Kumar Meher},
title = {Analysis and Design of Approximate Inner-Product Architectures Based
on Distributed Arithmetic},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2019,
Sapporo, Japan, May 26-29, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISCAS.2019.8702162},
doi = {10.1109/ISCAS.2019.8702162},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RayGM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/XieLM19,
author = {Jiafeng Xie and
Chiou{-}Yng Lee and
Pramod Kumar Meher},
title = {Low-Complexity Systolic Multiplier for GF(2\({}^{\mbox{m}}\)) using
Toeplitz Matrix-Vector Product Method},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2019,
Sapporo, Japan, May 26-29, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISCAS.2019.8702298},
doi = {10.1109/ISCAS.2019.8702298},
timestamp = {Sun, 14 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/XieLM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ises/WadkarDM19,
author = {Sumit Satyavijay Wadkar and
Bishnu Prasad Das and
Pramod Kumar Meher},
title = {Low Latency Scaling-Free Pipeline {CORDIC} Architecture Using Augmented
Taylor Series},
booktitle = {{IEEE} International Symposium on Smart Electronic Systems, iSES 2019
(Formerly iNiS), Rourkela, India, December 16-18, 2019},
pages = {312--315},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/iSES47678.2019.00077},
doi = {10.1109/ISES47678.2019.00077},
timestamp = {Sun, 26 Apr 2020 17:41:57 +0200},
biburl = {https://dblp.org/rec/conf/ises/WadkarDM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cssp/AhmedMV18,
author = {Syed Naveen Altaf Ahmed and
Pramod Kumar Meher and
Achutavarrier Prasad Vinod},
title = {Efficient Cross-Correlation Algorithm and Architecture for Robust
Synchronization in Frame-Based Communication Systems},
journal = {Circuits Syst. Signal Process.},
volume = {37},
number = {6},
pages = {2548--2573},
year = {2018},
url = {https://doi.org/10.1007/s00034-017-0678-3},
doi = {10.1007/S00034-017-0678-3},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cssp/AhmedMV18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/RayGM18,
author = {Dwaipayan Ray and
Nithin V. George and
Pramod Kumar Meher},
title = {Efficient Shift-Add Implementation of {FIR} Filters Using Variable
Partition Hybrid Form Structures},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {65-I},
number = {12},
pages = {4247--4257},
year = {2018},
url = {https://doi.org/10.1109/TCSI.2018.2838666},
doi = {10.1109/TCSI.2018.2838666},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/RayGM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcsv/JasaniLMW18,
author = {Bhavan A. Jasani and
Siew{-}Kei Lam and
Pramod Kumar Meher and
Meiqing Wu},
title = {Threshold-Guided Design and Optimization for Harris Corner Detector
Architecture},
journal = {{IEEE} Trans. Circuits Syst. Video Technol.},
volume = {28},
number = {12},
pages = {3516--3526},
year = {2018},
url = {https://doi.org/10.1109/TCSVT.2017.2757998},
doi = {10.1109/TCSVT.2017.2757998},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcsv/JasaniLMW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tmscs/XieMZL18,
author = {Jiafeng Xie and
Pramod Kumar Meher and
Xiaojun Zhou and
Chiou{-}Yng Lee},
title = {Low Register-Complexity Systolic Digit-Serial Multiplier Over GF(2\({}^{\mbox{m}}\))
Based on Trinomials},
journal = {{IEEE} Trans. Multi Scale Comput. Syst.},
volume = {4},
number = {4},
pages = {773--783},
year = {2018},
url = {https://doi.org/10.1109/TMSCS.2018.2878437},
doi = {10.1109/TMSCS.2018.2878437},
timestamp = {Wed, 02 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tmscs/XieMZL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LouYM17,
author = {Xin Lou and
Ya Jun Yu and
Pramod Kumar Meher},
title = {Lower Bound Analysis and Perturbation of Critical Path for Area-Time
Efficient Multiple Constant Multiplications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {36},
number = {2},
pages = {313--324},
year = {2017},
url = {https://doi.org/10.1109/TCAD.2016.2584181},
doi = {10.1109/TCAD.2016.2584181},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LouYM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MeherL17,
author = {Pramod Kumar Meher and
Xin Lou},
title = {Low-Latency, Low-Area, and Scalable Systolic-Like Modular Multipliers
for GF(2\({}^{\mbox{m}}\)) Based on Irreducible All-One Polynomials},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {64-I},
number = {2},
pages = {399--408},
year = {2017},
url = {https://doi.org/10.1109/TCSI.2016.2614309},
doi = {10.1109/TCSI.2016.2614309},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MeherL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/XieMSLZM17,
author = {Jiafeng Xie and
Pramod Kumar Meher and
Mingui Sun and
Yuecheng Li and
Bo Zeng and
Zhi{-}Hong Mao},
title = {Efficient {FPGA} Implementation of Low-Complexity Systolic Karatsuba
Multiplier Over GF(2\({}^{\mbox{m}}\)) Based on {NIST} Polynomials},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {64-I},
number = {7},
pages = {1815--1825},
year = {2017},
url = {https://doi.org/10.1109/TCSI.2017.2677962},
doi = {10.1109/TCSI.2017.2677962},
timestamp = {Fri, 30 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/XieMSLZM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LouMYY17,
author = {Xin Lou and
Pramod Kumar Meher and
Yajun Yu and
Wenbin Ye},
title = {Novel Structure for Area-Efficient Implementation of {FIR} Filters},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {64-II},
number = {10},
pages = {1212--1216},
year = {2017},
url = {https://doi.org/10.1109/TCSII.2016.2614727},
doi = {10.1109/TCSII.2016.2614727},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LouMYY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcsv/JridiM17,
author = {Maher Jridi and
Pramod Kumar Meher},
title = {Scalable Approximate {DCT} Architectures for Efficient HEVC-Compliant
Video Coding},
journal = {{IEEE} Trans. Circuits Syst. Video Technol.},
volume = {27},
number = {8},
pages = {1815--1825},
year = {2017},
url = {https://doi.org/10.1109/TCSVT.2016.2556578},
doi = {10.1109/TCSVT.2016.2556578},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcsv/JridiM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LeeMFY17,
author = {Chiou{-}Yng Lee and
Pramod Kumar Meher and
Chia{-}Chen Fan and
Shyan{-}Ming Yuan},
title = {Low-Complexity Digit-Serial Multiplier Over {\textdollar}GF(2{\^{}}\{m\}){\textdollar}
Based on Efficient Toeplitz Block Toeplitz Matrix-Vector Product Decomposition},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {25},
number = {2},
pages = {735--746},
year = {2017},
url = {https://doi.org/10.1109/TVLSI.2016.2605183},
doi = {10.1109/TVLSI.2016.2605183},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/LeeMFY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ises/SahooM17,
author = {Subhendu Kumar Sahoo and
Pramod Kumar Meher},
title = {Lookup Table-Based Low-Power Implementation of Multi-channel Filters
for Software Defined Radio},
booktitle = {{IEEE} International Symposium on Nanoelectronic and Information Systems,
iNIS 2017, Bhopal, India, December 18-20, 2017},
pages = {23--27},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.ieeecomputersociety.org/10.1109/iNIS.2017.15},
doi = {10.1109/INIS.2017.15},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ises/SahooM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cssp/Meher16,
author = {Pramod Kumar Meher},
title = {Seamless Pipelining of {DSP} Circuits},
journal = {Circuits Syst. Signal Process.},
volume = {35},
number = {4},
pages = {1147--1162},
year = {2016},
url = {https://doi.org/10.1007/s00034-015-0089-2},
doi = {10.1007/S00034-015-0089-2},
timestamp = {Sun, 21 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cssp/Meher16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/MohantyMSS16,
author = {Basant Kumar Mohanty and
Pramod Kumar Meher and
Subodh Kumar Singhal and
M. N. S. Swamy},
title = {A high-performance {VLSI} architecture for reconfigurable {FIR} using
distributed arithmetic},
journal = {Integr.},
volume = {54},
pages = {37--46},
year = {2016},
url = {https://doi.org/10.1016/j.vlsi.2016.01.006},
doi = {10.1016/J.VLSI.2016.01.006},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/MohantyMSS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LeeM16,
author = {Chiou{-}Yng Lee and
Pramod Kumar Meher},
title = {Comment on "Subquadratic Space-Complexity Digit-Serial Multipliers
Over GF(2\({}^{\mbox{m}}\)) Using Generalized (a, b)-Way Karatsuba
Algorithm"},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {63-I},
number = {8},
pages = {1316--1319},
year = {2016},
url = {https://doi.org/10.1109/TCSI.2016.2568213},
doi = {10.1109/TCSI.2016.2568213},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LeeM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LouYM16,
author = {Xin Lou and
Ya Jun Yu and
Pramod Kumar Meher},
title = {Analysis and Optimization of Product-Accumulation Section for Efficient
Implementation of {FIR} Filters},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {63-I},
number = {10},
pages = {1701--1713},
year = {2016},
url = {https://doi.org/10.1109/TCSI.2016.2587105},
doi = {10.1109/TCSI.2016.2587105},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LouYM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcsv/BoulgourisBCCCR16,
author = {Nikolaos V. Boulgouris and
David R. Bull and
Marco Cagnazzo and
Andrea Cavallaro and
Gene Cheung and
Amit K. Roy{-}Chowdhury and
Pedro {Comesa{\~{n}}a Alfaro} and
Shan Du and
Sarp Ert{\"{u}}rk and
Markus Flierl and
Gian Luca Foresti and
Gang Hua and
Zhu Li and
Weisi Lin and
Siwei Ma and
Pramod Kumar Meher and
Debargha Mukherjee and
Aleksandra Pizurica and
Andrea Prati and
Paolo Remagnino and
Arun Ross and
Shin'ichi Satoh and
Andreas E. Savakis and
Heiko Schwarz and
Ling Shao and
Shervin Shirmohammadi and
Giuseppe Valenzise and
Meng Wang and
Zhou Wang and
Yonggang Wen and
Dong Xu and
Junsong Yuan and
Yuan Yuan},
title = {Introduction of New Associate Editors},
journal = {{IEEE} Trans. Circuits Syst. Video Technol.},
volume = {26},
number = {2},
pages = {253--263},
year = {2016},
url = {https://doi.org/10.1109/TCSVT.2016.2518782},
doi = {10.1109/TCSVT.2016.2518782},
timestamp = {Mon, 18 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcsv/BoulgourisBCCCR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/MohantyM16,
author = {Basant Kumar Mohanty and
Pramod Kumar Meher},
title = {A High-Performance {FIR} Filter Architecture for Fixed and Reconfigurable
Applications},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {24},
number = {2},
pages = {444--452},
year = {2016},
url = {https://doi.org/10.1109/TVLSI.2015.2412556},
doi = {10.1109/TVLSI.2015.2412556},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/MohantyM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/Meher16,
author = {Pramod Kumar Meher},
title = {On Efficient Retiming of Fixed-Point Circuits},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {24},
number = {4},
pages = {1257--1265},
year = {2016},
url = {https://doi.org/10.1109/TVLSI.2015.2453324},
doi = {10.1109/TVLSI.2015.2453324},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/Meher16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/AggarwalMK16,
author = {Supriya Aggarwal and
Pramod Kumar Meher and
Kavita Khare},
title = {Concept, Design, and Implementation of Reconfigurable {CORDIC}},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {24},
number = {4},
pages = {1588--1592},
year = {2016},
url = {https://doi.org/10.1109/TVLSI.2015.2445855},
doi = {10.1109/TVLSI.2015.2445855},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/AggarwalMK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/MohantyMP16,
author = {Basant K. Mohanty and
Pramod Kumar Meher and
Sujit Kumar Patel},
title = {{LUT} Optimization for Distributed Arithmetic-Based Block Least Mean
Square Adaptive Filter},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {24},
number = {5},
pages = {1926--1935},
year = {2016},
url = {https://doi.org/10.1109/TVLSI.2015.2472964},
doi = {10.1109/TVLSI.2015.2472964},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/MohantyMP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LeeML16,
author = {Chiou{-}Yng Lee and
Pramod Kumar Meher and
Chung{-}Hsin Liu},
title = {Area-Delay Efficient Digit-Serial Multiplier Based on k-Partitioning
Scheme Combined With {TMVP} Block Recombination Approach},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {24},
number = {7},
pages = {2413--2425},
year = {2016},
url = {https://doi.org/10.1109/TVLSI.2016.2514272},
doi = {10.1109/TVLSI.2016.2514272},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/LeeML16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/XieMM15,
author = {Jiafeng Xie and
Pramod Kumar Meher and
Zhi{-}Hong Mao},
title = {High-Throughput Finite Field Multipliers Using Redundant Basis for
{FPGA} and {ASIC} Implementations},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {62-I},
number = {1},
pages = {110--119},
year = {2015},
url = {https://doi.org/10.1109/TCSI.2014.2349577},
doi = {10.1109/TCSI.2014.2349577},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/XieMM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/JridiAM15,
author = {Maher Jridi and
Ayman Alfalou and
Pramod Kumar Meher},
title = {A Generalized Algorithm and Reconfigurable Architecture for Efficient
and Scalable Orthogonal Approximation of {DCT}},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {62-I},
number = {2},
pages = {449--457},
year = {2015},
url = {https://doi.org/10.1109/TCSI.2014.2360763},
doi = {10.1109/TCSI.2014.2360763},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/JridiAM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LeeM15a,
author = {Chiou{-}Yng Lee and
Pramod Kumar Meher},
title = {Efficient Subquadratic Space Complexity Architectures for Parallel
{MPB} Single- and Double-Multiplications for All Trinomials Using
Toeplitz Matrix-Vector Product Decomposition},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {62-I},
number = {3},
pages = {854--862},
year = {2015},
url = {https://doi.org/10.1109/TCSI.2014.2376091},
doi = {10.1109/TCSI.2014.2376091},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LeeM15a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LouYM15,
author = {Xin Lou and
Ya Jun Yu and
Pramod Kumar Meher},
title = {Fine-Grained Critical Path Analysis and Optimization for Area-Time
Efficient Realization of Multiple Constant Multiplications},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {62-I},
number = {3},
pages = {863--872},
year = {2015},
url = {https://doi.org/10.1109/TCSI.2014.2377412},
doi = {10.1109/TCSI.2014.2377412},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LouYM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/XieMM15a,
author = {Jiafeng Xie and
Pramod Kumar Meher and
Zhi{-}Hong Mao},
title = {Low-Latency High-Throughput Systolic Multipliers Over GF(2\({}^{\mbox{m}}\))
for {NIST} Recommended Pentanomials},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {62-I},
number = {3},
pages = {881--890},
year = {2015},
url = {https://doi.org/10.1109/TCSI.2014.2386782},
doi = {10.1109/TCSI.2014.2386782},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/XieMM15a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LeeM15b,
author = {Chiou{-}Yng Lee and
Pramod Kumar Meher},
title = {Subquadratic Space-Complexity Digit-Serial Multipliers Over GF(2\({}^{\mbox{m}}\))
Using Generalized (a, b)-Way Karatsuba Algorithm},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {62-I},
number = {4},
pages = {1091--1098},
year = {2015},
url = {https://doi.org/10.1109/TCSI.2015.2388842},
doi = {10.1109/TCSI.2015.2388842},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LeeM15b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/HsiaoWWM15,
author = {Shen{-}Fu Hsiao and
Po{-}Han Wu and
Chia{-}Sheng Wen and
Pramod Kumar Meher},
title = {Table Size Reduction Methods for Faithfully Rounded Lookup-Table-Based
Multiplierless Function Evaluation},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {62-II},
number = {5},
pages = {466--470},
year = {2015},
url = {https://doi.org/10.1109/TCSII.2014.2386232},
doi = {10.1109/TCSII.2014.2386232},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/HsiaoWWM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/XieMM15b,
author = {Jiafeng Xie and
Pramod Kumar Meher and
Zhi{-}Hong Mao},
title = {High-Throughput Digit-Level Systolic Multiplier Over GF(2\({}^{\mbox{m}}\))
Based on Irreducible Trinomials},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {62-II},
number = {5},
pages = {481--485},
year = {2015},
url = {https://doi.org/10.1109/TCSII.2014.2386260},
doi = {10.1109/TCSII.2014.2386260},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/XieMM15b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LiuLM15,
author = {Chung{-}Hsin Liu and
Chiou{-}Yng Lee and
Pramod Kumar Meher},
title = {Efficient Digit-Serial KA-Based Multiplier Over Binary Extension Fields
Using Block Recombination Approach},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {62-I},
number = {8},
pages = {2044--2051},
year = {2015},
url = {https://doi.org/10.1109/TCSI.2015.2437516},
doi = {10.1109/TCSI.2015.2437516},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LiuLM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LouYM15a,
author = {Xin Lou and
Ya Jun Yu and
Pramod Kumar Meher},
title = {New Approach to the Reduction of Sign-Extension Overhead for Efficient
Implementation of Multiple Constant Multiplications},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {62-I},
number = {11},
pages = {2695--2705},
year = {2015},
url = {https://doi.org/10.1109/TCSI.2015.2476319},
doi = {10.1109/TCSI.2015.2476319},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LouYM15a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MeherMPGS15,
author = {Pramod Kumar Meher and
Basant Kumar Mohanty and
Sujit Kumar Patel and
Soumya Ganguly and
Thambipillai Srikanthan},
title = {Efficient {VLSI} Architecture for Decimation-in-Time Fast Fourier
Transform of Real-Valued Data},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {62-I},
number = {12},
pages = {2836--2845},
year = {2015},
url = {https://doi.org/10.1109/TCSI.2015.2495724},
doi = {10.1109/TCSI.2015.2495724},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MeherMPGS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LeeM15c,
author = {Chiou{-}Yng Lee and
Pramod Kumar Meher},
title = {Area-Efficient Subquadratic Space-Complexity Digit-Serial Multiplier
for Type-II Optimal Normal Basis of GF(2\({}^{\mbox{m}}\)) Using Symmetric
{TMVP} and Block Recombination Techniques},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {62-I},
number = {12},
pages = {2846--2855},
year = {2015},
url = {https://doi.org/10.1109/TCSI.2015.2495758},
doi = {10.1109/TCSI.2015.2495758},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LeeM15c.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/RabahAMAM15,
author = {Hassan Rabah and
Abbes Amira and
Basant Kumar Mohanty and
Somaya Al{-}M{\'{a}}adeed and
Pramod Kumar Meher},
title = {{FPGA} Implementation of Orthogonal Matching Pursuit for Compressive
Sensing Reconstruction},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {23},
number = {10},
pages = {2209--2220},
year = {2015},
url = {https://doi.org/10.1109/TVLSI.2014.2358716},
doi = {10.1109/TVLSI.2014.2358716},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/RabahAMAM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LouMY15,
author = {Xin Lou and
Pramod Kumar Meher and
Ya Jun Yu},
title = {Fine-grained pipelining for multiple constant multiplications},
booktitle = {2015 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
2015, Lisbon, Portugal, May 24-27, 2015},
pages = {966--969},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ISCAS.2015.7168796},
doi = {10.1109/ISCAS.2015.7168796},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LouMY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MohantyMS15,
author = {Basant K. Mohanty and
Pramod Kumar Meher and
Thambipillai Srikanthan},
title = {Critical-path optimization for efficient hardware realization of lifting
and flipping DWTs},
booktitle = {2015 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
2015, Lisbon, Portugal, May 24-27, 2015},
pages = {1186--1189},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ISCAS.2015.7168851},
doi = {10.1109/ISCAS.2015.7168851},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/MohantyMS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PanMLB15,
author = {Jeng{-}Shyang Pan and
Pramod Kumar Meher and
Chiou{-}Yng Lee and
Hong{-}Hai Bai},
title = {Efficient subquadratic parallel multiplier based on modified {SPB}
of GF(2\({}^{\mbox{m}}\))},
booktitle = {2015 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
2015, Lisbon, Portugal, May 24-27, 2015},
pages = {1430--1433},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ISCAS.2015.7168912},
doi = {10.1109/ISCAS.2015.7168912},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/PanMLB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MeherMS15,
author = {Pramod Kumar Meher and
Basant Kumar Mohanty and
M. N. S. Swamy},
title = {Low-Area and Low-Power Reconfigurable Architecture for Convolution-Based
1-D {DWT} Using 9/7 and 5/3 Filters},
booktitle = {28th International Conference on {VLSI} Design, {VLSID} 2015, Bangalore,
India, January 3-7, 2015},
pages = {327--332},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/VLSID.2015.61},
doi = {10.1109/VLSID.2015.61},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MeherMS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-ipr/MohantyM14,
author = {Basant K. Mohanty and
Pramod Kumar Meher},
title = {Area-delay-power-efficient architecture for folded two-dimensional
discrete wavelet transform by multiple lifting computation},
journal = {{IET} Image Process.},
volume = {8},
number = {6},
pages = {345--353},
year = {2014},
url = {https://doi.org/10.1049/iet-ipr.2012.0661},
doi = {10.1049/IET-IPR.2012.0661},
timestamp = {Thu, 18 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-ipr/MohantyM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MohantyMAA14,
author = {Basant K. Mohanty and
Pramod Kumar Meher and
Somaya Al{-}M{\'{a}}adeed and
Abbes Amira},
title = {Memory Footprint Reduction for Power-Efficient Realization of 2-D
Finite Impulse Response Filters},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {61-I},
number = {1},
pages = {120--133},
year = {2014},
url = {https://doi.org/10.1109/TCSI.2013.2265953},
doi = {10.1109/TCSI.2013.2265953},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MohantyMAA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/PanM14,
author = {Yu Pan and
Pramod Kumar Meher},
title = {Bit-Level Optimization of Adder-Trees for Multiple Constant Multiplications
for Efficient {FIR} Filter Implementation},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {61-I},
number = {2},
pages = {455--462},
year = {2014},
url = {https://doi.org/10.1109/TCSI.2013.2278331},
doi = {10.1109/TCSI.2013.2278331},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/PanM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MeherP14,
author = {Pramod Kumar Meher and
Sang Yoon Park},
title = {Critical-Path Analysis and Low-Complexity Implementation of the {LMS}
Adaptive Algorithm},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {61-I},
number = {3},
pages = {778--788},
year = {2014},
url = {https://doi.org/10.1109/TCSI.2013.2284173},
doi = {10.1109/TCSI.2013.2284173},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MeherP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ParkM14,
author = {Sang Yoon Park and
Pramod Kumar Meher},
title = {Efficient {FPGA} and {ASIC} Realizations of a DA-Based Reconfigurable
{FIR} Digital Filter},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {61-II},
number = {7},
pages = {511--515},
year = {2014},
url = {https://doi.org/10.1109/TCSII.2014.2324418},
doi = {10.1109/TCSII.2014.2324418},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/ParkM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LeeYMMP14,
author = {Chiou{-}Yng Lee and
Chun{-}Sheng Yang and
Bimal Kumar Meher and
Pramod Kumar Meher and
Jeng{-}Shyang Pan},
title = {Low-Complexity Digit-Serial and Scalable {SPB/GPB} Multipliers Over
Large Binary Extension Fields Using (b, 2)-Way Karatsuba Decomposition},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {61-I},
number = {11},
pages = {3115--3124},
year = {2014},
url = {https://doi.org/10.1109/TCSI.2014.2335031},
doi = {10.1109/TCSI.2014.2335031},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/LeeYMMP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LeeMC14,
author = {Chiou{-}Yng Lee and
Pramod Kumar Meher and
Chien{-}Ping Chang},
title = {Efficient {\textdollar}M{\textdollar} -ary Exponentiation over {\textdollar}GF(2{\^{}}\{m\}){\textdollar}
Using Subquadratic KA-Based Three-Operand Montgomery Multiplier},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {61-I},
number = {11},
pages = {3125--3134},
year = {2014},
url = {https://doi.org/10.1109/TCSI.2014.2334992},
doi = {10.1109/TCSI.2014.2334992},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LeeMC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcsv/MeherPMLY14,
author = {Pramod Kumar Meher and
Sang Yoon Park and
Basant Kumar Mohanty and
Khoon Seong Lim and
Chuohao Yeo},
title = {Efficient Integer {DCT} Architectures for {HEVC}},
journal = {{IEEE} Trans. Circuits Syst. Video Technol.},
volume = {24},
number = {1},
pages = {168--178},
year = {2014},
url = {https://doi.org/10.1109/TCSVT.2013.2276862},
doi = {10.1109/TCSVT.2013.2276862},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcsv/MeherPMLY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/MeherP14,
author = {Pramod Kumar Meher and
Sang Yoon Park},
title = {Area-Delay-Power Efficient Fixed-Point {LMS} Adaptive Filter With
Low Adaptation-Delay},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {22},
number = {2},
pages = {362--371},
year = {2014},
url = {https://doi.org/10.1109/TVLSI.2013.2239321},
doi = {10.1109/TVLSI.2013.2239321},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/MeherP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MeherP14,
author = {Pramod Kumar Meher and
Sang Yoon Park},
title = {A novel DA-based architecture for efficient computation of inner-product
of variable vectors},
booktitle = {{IEEE} International Symposium on Circuits and Systemss, {ISCAS} 2014,
Melbourne, Victoria, Australia, June 1-5, 2014},
pages = {369--372},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISCAS.2014.6865142},
doi = {10.1109/ISCAS.2014.6865142},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MeherP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LouYM14,
author = {Xin Lou and
Ya Jun Yu and
Pramod Kumar Meher},
title = {High-speed multiplier block design based on bit-level critical path
optimization},
booktitle = {{IEEE} International Symposium on Circuits and Systemss, {ISCAS} 2014,
Melbourne, Victoria, Australia, June 1-5, 2014},
pages = {1308--1311},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISCAS.2014.6865383},
doi = {10.1109/ISCAS.2014.6865383},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LouYM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AggarwalM14,
author = {Supriya Aggarwal and
Pramod Kumar Meher},
title = {Reconfigurable {CORDIC} architectures for multi-mode and multi-trajectory
operations},
booktitle = {{IEEE} International Symposium on Circuits and Systemss, {ISCAS} 2014,
Melbourne, Victoria, Australia, June 1-5, 2014},
pages = {2490--2494},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISCAS.2014.6865678},
doi = {10.1109/ISCAS.2014.6865678},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AggarwalM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MeherMS14,
author = {Pramod Kumar Meher and
Basant K. Mohanty and
Thambipillai Srikanthan},
title = {Area-delay efficient architecture for {MP} algorithm using reconfigurable
inner-product circuits},
booktitle = {{IEEE} International Symposium on Circuits and Systemss, {ISCAS} 2014,
Melbourne, Victoria, Australia, June 1-5, 2014},
pages = {2628--2631},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISCAS.2014.6865712},
doi = {10.1109/ISCAS.2014.6865712},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/MeherMS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isicir/LeeML14,
author = {Chiou{-}Yng Lee and
Pramod Kumar Meher and
Wen{-}Yo Lee},
title = {Subquadratic space complexity digit-serial multiplier over binary
extension fields using Toom-Cook algorithm},
booktitle = {2014 International Symposium on Integrated Circuits (ISIC), Singapore,
December 10-12, 2014},
pages = {176--179},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISICIR.2014.7029517},
doi = {10.1109/ISICIR.2014.7029517},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/isicir/LeeML14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cssp/MeherMV13,
author = {Pramod Kumar Meher and
Saraju P. Mohanty and
A. Prasad Vinod},
title = {Guest Editorial: Advanced Techniques for Efficient Electronic System
Design},
journal = {Circuits Syst. Signal Process.},
volume = {32},
number = {6},
pages = {2539--2541},
year = {2013},
url = {https://doi.org/10.1007/s00034-013-9670-8},
doi = {10.1007/S00034-013-9670-8},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cssp/MeherMV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cssp/MeherM13,
author = {Bimal Kumar Meher and
Pramod Kumar Meher},
title = {An Efficient Look-up Table-based Approach for Multiplication over
GF(2\({}^{\mbox{m}}\)) Generated by Trinomials},
journal = {Circuits Syst. Signal Process.},
volume = {32},
number = {6},
pages = {2623--2638},
year = {2013},
url = {https://doi.org/10.1007/s00034-013-9553-z},
doi = {10.1007/S00034-013-9553-Z},
timestamp = {Sun, 21 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cssp/MeherM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-ipr/JridiMA13,
author = {Maher Jridi and
Pramod Kumar Meher and
Ayman Alfalou},
title = {Zero-quantised discrete cosine transform coefficients prediction technique
for intra-frame video encoding},
journal = {{IET} Image Process.},
volume = {7},
number = {2},
pages = {165--173},
year = {2013},
url = {https://doi.org/10.1049/iet-ipr.2012.0145},
doi = {10.1049/IET-IPR.2012.0145},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/iet-ipr/JridiMA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sivp/SudhaPM13,
author = {Natarajan Sudha and
Niladri B. Puhan and
Pramod Kumar Meher},
title = {Special section on image and video processing for security},
journal = {Signal Image Video Process.},
volume = {7},
number = {4},
pages = {607--608},
year = {2013},
url = {https://doi.org/10.1007/s11760-013-0467-9},
doi = {10.1007/S11760-013-0467-9},
timestamp = {Sun, 06 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sivp/SudhaPM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/XieMH13,
author = {Jiafeng Xie and
Pramod Kumar Meher and
Jianjun He},
title = {Hardware-Efficient Realization of Prime-Length {DCT} Based on Distributed
Arithmetic},
journal = {{IEEE} Trans. Computers},
volume = {62},
number = {6},
pages = {1170--1178},
year = {2013},
url = {https://doi.org/10.1109/TC.2012.64},
doi = {10.1109/TC.2012.64},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/XieMH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/AggarwalMK13,
author = {Supriya Aggarwal and
Pramod Kumar Meher and
Kavita Khare},
title = {Scale-Free Hyperbolic {CORDIC} Processor and Its Application to Waveform
Generation},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {60-I},
number = {2},
pages = {314--326},
year = {2013},
url = {https://doi.org/10.1109/TCSI.2012.2215778},
doi = {10.1109/TCSI.2012.2215778},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/AggarwalMK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ParkM13,
author = {Sang Yoon Park and
Pramod Kumar Meher},
title = {Low-Power, High-Throughput, and Low-Area Adaptive {FIR} Filter Based
on Distributed Arithmetic},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {60-II},
number = {6},
pages = {346--350},
year = {2013},
url = {https://doi.org/10.1109/TCSII.2013.2251968},
doi = {10.1109/TCSII.2013.2251968},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/ParkM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/PanLM13,
author = {Jeng{-}Shyang Pan and
Chiou{-}Yng Lee and
Pramod Kumar Meher},
title = {Low-Latency Digit-Serial and Digit-Parallel Systolic Multipliers for
Large Binary Extension Fields},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {60-I},
number = {12},
pages = {3195--3204},
year = {2013},
url = {https://doi.org/10.1109/TCSI.2013.2264694},
doi = {10.1109/TCSI.2013.2264694},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/PanLM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcsv/MohantyM13,
author = {Basant K. Mohanty and
Pramod Kumar Meher},
title = {Memory-Efficient High-Speed Convolution-Based Generic Structure for
Multilevel 2-D {DWT}},
journal = {{IEEE} Trans. Circuits Syst. Video Technol.},
volume = {23},
number = {2},
pages = {353--363},
year = {2013},
url = {https://doi.org/10.1109/TCSVT.2012.2203745},
doi = {10.1109/TCSVT.2012.2203745},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcsv/MohantyM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tsp/MohantyM13,
author = {Basant K. Mohanty and
Pramod Kumar Meher},
title = {A High-Performance Energy-Efficient Architecture for {FIR} Adaptive
Filter Based on New Distributed Arithmetic Formulation of Block {LMS}
Algorithm},
journal = {{IEEE} Trans. Signal Process.},
volume = {61},
number = {4},
pages = {921--932},
year = {2013},
url = {https://doi.org/10.1109/TSP.2012.2226453},
doi = {10.1109/TSP.2012.2226453},
timestamp = {Tue, 10 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tsp/MohantyM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/XieMH13,
author = {Jiafeng Xie and
Pramod Kumar Meher and
Jianjun He},
title = {Low-Complexity Multiplier for GF(2\({}^{\mbox{m}}\)) Based on All-One
Polynomials},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {1},
pages = {168--173},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2011.2181434},
doi = {10.1109/TVLSI.2011.2181434},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/XieMH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/MeherP13,
author = {Pramod Kumar Meher and
Sang Yoon Park},
title = {{CORDIC} Designs for Fixed Angle of Rotation},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {2},
pages = {217--228},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2187080},
doi = {10.1109/TVLSI.2012.2187080},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/MeherP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/XieHM13,
author = {Jiafeng Xie and
Jianjun He and
Pramod Kumar Meher},
title = {Low Latency Systolic Montgomery Multiplier for Finite Field {\textdollar}GF(2{\^{}}\{m\}){\textdollar}
Based on Pentanomials},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {2},
pages = {385--389},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2185257},
doi = {10.1109/TVLSI.2012.2185257},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/XieHM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEicics/PrattipatiSM13,
author = {Soni Prattipati and
M. N. S. Swamy and
Pramod Kumar Meher},
title = {A variable quantization technique for image compression using integer
Tchebichef transform},
booktitle = {9th International Conference on Information, Communications {\&}
Signal Processing, {ICICS} 2013, Tainan, Taiwan, December 10-13, 2013},
pages = {1--5},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ICICS.2013.6782815},
doi = {10.1109/ICICS.2013.6782815},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/IEEEicics/PrattipatiSM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ParkM13,
author = {Sang Yoon Park and
Pramod Kumar Meher},
title = {Flexible integer {DCT} architectures for {HEVC}},
booktitle = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013),
Beijing, China, May 19-23, 2013},
pages = {1376--1379},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISCAS.2013.6572111},
doi = {10.1109/ISCAS.2013.6572111},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ParkM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/PrattipatiISM13,
author = {Soni Prattipati and
Sujata Ishwar and
M. N. S. Swamy and
Pramod Kumar Meher},
title = {A fast 8{\texttimes}8 integer Tchebichef transform and comparison
with integer cosine transform for image compression},
booktitle = {{IEEE} 56th International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2013, Columbus, OH, USA, August 4-7, 2013},
pages = {1294--1297},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/MWSCAS.2013.6674892},
doi = {10.1109/MWSCAS.2013.6674892},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/PrattipatiISM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijbra/MeherMDR12,
author = {Jayakishan Meher and
Pramod Kumar Meher and
Gananath Dash and
Mukesh Kumar Raval},
title = {New encoded single-indicator sequences based on physico-chemical parameters
for efficient exon identification},
journal = {Int. J. Bioinform. Res. Appl.},
volume = {8},
number = {1/2},
pages = {126--140},
year = {2012},
url = {https://doi.org/10.1504/IJBRA.2012.045955},
doi = {10.1504/IJBRA.2012.045955},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijbra/MeherMDR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MohantyMM12,
author = {Basant K. Mohanty and
Anurag Mahajan and
Pramod Kumar Meher},
title = {Area- and Power-Efficient Architecture for High-Throughput Implementation
of Lifting 2-D {DWT}},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {59-II},
number = {7},
pages = {434--438},
year = {2012},
url = {https://doi.org/10.1109/TCSII.2012.2200169},
doi = {10.1109/TCSII.2012.2200169},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MohantyMM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/Garcia-HerreroCVM12,
author = {Francisco Garcia{-}Herrero and
Mar{\'{\i}}a Jos{\'{e}} Canet and
Javier Valls and
Pramod Kumar Meher},
title = {High-Throughput Interpolator Architecture for Low-Complexity Chase
Decoding of {RS} Codes},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {20},
number = {3},
pages = {568--573},
year = {2012},
url = {https://doi.org/10.1109/TVLSI.2010.2103961},
doi = {10.1109/TVLSI.2010.2103961},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/Garcia-HerreroCVM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/AggarwalMK12,
author = {Supriya Aggarwal and
Pramod Kumar Meher and
Kavita Khare},
title = {Area-Time Efficient Scaling-Free {CORDIC} Using Generalized Micro-Rotation
Selection},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {20},
number = {8},
pages = {1542--1546},
year = {2012},
url = {https://doi.org/10.1109/TVLSI.2011.2158459},
doi = {10.1109/TVLSI.2011.2158459},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/AggarwalMK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsi/JridiAM12,
author = {Maher Jridi and
Ayman Alfalou and
Pramod Kumar Meher},
title = {Optimized Architecture Using a Novel Subexpression Elimination on
Loeffler Algorithm for DCT-Based Image Compression},
journal = {{VLSI} Design},
volume = {2012},
pages = {209208:1--209208:12},
year = {2012},
url = {https://doi.org/10.1155/2012/209208},
doi = {10.1155/2012/209208},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsi/JridiAM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccoms/AhmedMV12,
author = {Syed Naveen Altaf Ahmed and
Pramod Kumar Meher and
A. Prasad Vinod},
title = {A low-complexity spectrum sensing technique for cognitive radios based
on correlation of intra-segment decimated vectors},
booktitle = {{IEEE} International Conference on Communication Systems, {ICCS} 2012,
Singapore, November 21-23, 2012},
pages = {443--447},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ICCS.2012.6406187},
doi = {10.1109/ICCS.2012.6406187},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccoms/AhmedMV12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/XieMH12,
author = {Jiafeng Xie and
Pramod Kumar Meher and
Jianjun He},
title = {Low-latency area-delay-efficient systolic multiplier over GF(2\({}^{\mbox{m}}\))
for a wider class of trinomials using parallel register sharing},
booktitle = {2012 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
2012, Seoul, Korea (South), May 20-23, 2012},
pages = {89--92},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISCAS.2012.6272184},
doi = {10.1109/ISCAS.2012.6272184},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/XieMH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MohantyMS12,
author = {Basant K. Mohanty and
Pramod Kumar Meher and
Subodh Kumar Singhal},
title = {Efficient architectures for {VLSI} implementation of 2-D discrete
Hadamard transform},
booktitle = {2012 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
2012, Seoul, Korea (South), May 20-23, 2012},
pages = {1480--1483},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISCAS.2012.6271527},
doi = {10.1109/ISCAS.2012.6271527},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MohantyMS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cssp/VinodLMPM11,
author = {A. Prasad Vinod and
Edmund Ming{-}Kit Lai and
Pramod Kumar Meher and
Jacques Palicot and
Shahriar Mirabbasi},
title = {Guest Editorial: Special Issue on Embedded Signal Processing Circuits
and Systems for Cognitive Radio-Based Wireless Communication Devices},
journal = {Circuits Syst. Signal Process.},
volume = {30},
number = {4},
pages = {683--688},
year = {2011},
url = {https://doi.org/10.1007/s00034-011-9299-4},
doi = {10.1007/S00034-011-9299-4},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cssp/VinodLMPM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cssp/Garcia-HerreroV11,
author = {Francisco Garcia{-}Herrero and
Javier Valls and
Pramod Kumar Meher},
title = {High-Speed RS(255, 239) Decoder Based on {LCC} Decoding},
journal = {Circuits Syst. Signal Process.},
volume = {30},
number = {6},
pages = {1643--1669},
year = {2011},
url = {https://doi.org/10.1007/s00034-011-9327-4},
doi = {10.1007/S00034-011-9327-4},
timestamp = {Sun, 21 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cssp/Garcia-HerreroV11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsip/MeherMD11,
author = {Jayakishan Meher and
Pramod Kumar Meher and
Gananath Dash},
title = {Improved Comb Filter based Approach for Effective Prediction of Protein
Coding Regions in {DNA} Sequences},
journal = {J. Signal Inf. Process.},
volume = {2},
number = {2},
pages = {88--99},
year = {2011},
url = {https://doi.org/10.4236/jsip.2011.22012},
doi = {10.4236/JSIP.2011.22012},
timestamp = {Thu, 09 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsip/MeherMD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsip/MeherRMD11,
author = {Jayakishan Meher and
Mukesh Kumar Raval and
Pramod Kumar Meher and
Gananath Dash},
title = {The Role of Combined {OSR} and {SDF} Method for Pre-Processing of
Microarray Data that Accounts for Effective Denoising and Quantification},
journal = {J. Signal Inf. Process.},
volume = {2},
number = {3},
pages = {190--195},
year = {2011},
url = {https://doi.org/10.4236/jsip.2011.23026},
doi = {10.4236/JSIP.2011.23026},
timestamp = {Thu, 09 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsip/MeherRMD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcsv/SudhaMM11,
author = {Natarajan Sudha and
A. R. Mohan and
Pramod Kumar Meher},
title = {A Self-Configurable Systolic Architecture for Face Recognition System
Based on Principal Component Neural Network},
journal = {{IEEE} Trans. Circuits Syst. Video Technol.},
volume = {21},
number = {8},
pages = {1071--1084},
year = {2011},
url = {https://doi.org/10.1109/TCSVT.2011.2133210},
doi = {10.1109/TCSVT.2011.2133210},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcsv/SudhaMM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tim/PatraMC11,
author = {Jagdish Chandra Patra and
Pramod Kumar Meher and
Goutam Chakraborty},
title = {Development of Laguerre Neural-Network-Based Intelligent Sensors for
Wireless Sensor Networks},
journal = {{IEEE} Trans. Instrum. Meas.},
volume = {60},
number = {3},
pages = {725--734},
year = {2011},
url = {https://doi.org/10.1109/TIM.2010.2082390},
doi = {10.1109/TIM.2010.2082390},
timestamp = {Sun, 12 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tim/PatraMC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tsp/MohantyM11,
author = {Basant K. Mohanty and
Pramod Kumar Meher},
title = {Memory Efficient Modular {VLSI} Architecture for Highthroughput and
Low-Latency Implementation of Multilevel Lifting 2-D {DWT}},
journal = {{IEEE} Trans. Signal Process.},
volume = {59},
number = {5},
pages = {2072--2084},
year = {2011},
url = {https://doi.org/10.1109/TSP.2011.2109953},
doi = {10.1109/TSP.2011.2109953},
timestamp = {Tue, 10 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tsp/MohantyM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tsp/MohantyM11a,
author = {Basant K. Mohanty and
Pramod Kumar Meher},
title = {Memory-Efficient Architecture for 3-D {DWT} Using Overlapped Grouping
of Frames},
journal = {{IEEE} Trans. Signal Process.},
volume = {59},
number = {11},
pages = {5605--5616},
year = {2011},
url = {https://doi.org/10.1109/TSP.2011.2162510},
doi = {10.1109/TSP.2011.2162510},
timestamp = {Tue, 10 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tsp/MohantyM11a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icgec/LeeM11,
author = {Chiou{-}Yng Lee and
Pramod Kumar Meher},
editor = {Junzo Watada and
Pau{-}Choo Chung and
Jim{-}Min Lin and
Chin{-}Shiuh Shieh and
Jeng{-}Shyang Pan},
title = {Speeding up Subquadratic Finite Field Multiplier over GF(2m) Generated
by Trinomials Using Toeplitz Matrix-Vector with Inner Product Formula},
booktitle = {Fifth International Conference on Genetic and Evolutionary Computing,
{ICGEC} 2011, Kinmen, Taiwan / Xiamen, China, August 29 - September
1, 2011},
pages = {232--236},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ICGEC.2011.62},
doi = {10.1109/ICGEC.2011.62},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icgec/LeeM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MeherM11,
author = {Pramod Kumar Meher and
Megha Maheshwari},
title = {A high-speed {FIR} adaptive filter architecture using a modified delayed
{LMS} algorithm},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
15-19 2011, Rio de Janeiro, Brazil},
pages = {121--124},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISCAS.2011.5937516},
doi = {10.1109/ISCAS.2011.5937516},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MeherM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PanM11,
author = {Yu Pan and
Pramod Kumar Meher},
title = {Efficient coefficient partitioning for decomposed DA-based inner-product
computation},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
15-19 2011, Rio de Janeiro, Brazil},
pages = {406--409},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISCAS.2011.5937588},
doi = {10.1109/ISCAS.2011.5937588},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PanM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ised/MeherM11,
author = {Bimal Kumar Meher and
Pramod Kumar Meher},
title = {A New Look-Up Table Approach for High-Speed Finite Field Multiplication},
booktitle = {International Symposium on Electronic System Design, {ISED} 2011,
Kochi, Kerala, India, December 19-21, 2011},
pages = {51--55},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ISED.2011.35},
doi = {10.1109/ISED.2011.35},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ised/MeherM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MeherP11,
author = {Pramod Kumar Meher and
Yu Pan},
title = {MCM-based implementation of block {FIR} filters for high-speed and
low-power applications},
booktitle = {{IEEE/IFIP} 19th International Conference on {VLSI} and System-on-Chip,
VLSI-SoC 2011, Kowloon, Hong Kong, China, October 3-5, 2011},
pages = {118--121},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/VLSISoC.2011.6081653},
doi = {10.1109/VLSISOC.2011.6081653},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/MeherP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MeherP11a,
author = {Pramod Kumar Meher and
Sang Yoon Park},
title = {High-throughput pipelined realization of adaptive {FIR} filter based
on distributed arithmetic},
booktitle = {{IEEE/IFIP} 19th International Conference on {VLSI} and System-on-Chip,
VLSI-SoC 2011, Kowloon, Hong Kong, China, October 3-5, 2011},
pages = {428--433},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/VLSISoC.2011.6081621},
doi = {10.1109/VLSISOC.2011.6081621},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/MeherP11a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cee/LeeM10,
author = {Chiou{-}Yng Lee and
Pramod Kumar Meher},
title = {Efficient bit-parallel multipliers over finite fields GF(2\({}^{\mbox{m}}\))},
journal = {Comput. Electr. Eng.},
volume = {36},
number = {5},
pages = {955--968},
year = {2010},
url = {https://doi.org/10.1016/j.compeleceng.2010.01.001},
doi = {10.1016/J.COMPELECENG.2010.01.001},
timestamp = {Wed, 19 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cee/LeeM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/VinodLMM10,
author = {Achutavarrier Prasad Vinod and
Edmund Ming{-}Kit Lai and
Douglas L. Maskell and
Pramod Kumar Meher},
title = {An improved common subexpression elimination method for reducing logic
operators in {FIR} filter implementations without increasing logic
depth},
journal = {Integr.},
volume = {43},
number = {1},
pages = {124--135},
year = {2010},
url = {https://doi.org/10.1016/j.vlsi.2009.07.001},
doi = {10.1016/J.VLSI.2009.07.001},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/VinodLMM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/Meher10,
author = {Pramod Kumar Meher},
title = {New Approach to Look-Up-Table Design and Memory-Based Realization
of {FIR} Digital Filter},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {57-I},
number = {3},
pages = {592--603},
year = {2010},
url = {https://doi.org/10.1109/TCSI.2009.2026683},
doi = {10.1109/TCSI.2009.2026683},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/Meher10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/Meher10a,
author = {Pramod Kumar Meher},
title = {{LUT} Optimization for Memory-Based Computation},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {57-II},
number = {4},
pages = {285--289},
year = {2010},
url = {https://doi.org/10.1109/TCSII.2010.2043467},
doi = {10.1109/TCSII.2010.2043467},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/Meher10a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcsv/MohantyM10,
author = {Basant K. Mohanty and
Pramod Kumar Meher},
title = {Parallel and Pipeline Architectures for High-Throughput Computation
of Multilevel 3-D {DWT}},
journal = {{IEEE} Trans. Circuits Syst. Video Technol.},
volume = {20},
number = {9},
pages = {1200--1209},
year = {2010},
url = {https://doi.org/10.1109/TCSVT.2010.2056950},
doi = {10.1109/TCSVT.2010.2056950},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcsv/MohantyM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LeeMP10,
author = {Chiou{-}Yng Lee and
Pramod Kumar Meher and
Jagdish Chandra Patra},
title = {Concurrent Error Detection in Bit-Serial Normal Basis Multiplication
Over GF(2\({}^{\mbox{m}}\)) Using Multiple Parity Prediction Schemes},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {8},
pages = {1234--1238},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2009.2020593},
doi = {10.1109/TVLSI.2009.2020593},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/LeeMP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/MeherPV10,
author = {Pramod Kumar Meher and
Jagdish Chandra Patra and
Achutavarrier Prasad Vinod},
title = {Efficient Systolic Designs for 1- and 2-Dimensional {DFT} of General
Transform-Lengths for High-Speed Wireless Communication Applications},
journal = {J. Signal Process. Syst.},
volume = {60},
number = {1},
pages = {1--14},
year = {2010},
url = {https://doi.org/10.1007/s11265-008-0328-x},
doi = {10.1007/S11265-008-0328-X},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/MeherPV10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/JuangMK10,
author = {Tso{-}Bing Juang and
Pramod Kumar Meher and
Chung{-}Chun Kuan},
title = {Area-efficient parallel-prefix Ling adders},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2010,
Kuala Lumpur, Malaysia, December 6-9, 2010},
pages = {736--739},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/APCCAS.2010.5774877},
doi = {10.1109/APCCAS.2010.5774877},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/apccas/JuangMK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ijcnn/PatraAMC10,
author = {Jagdish Chandra Patra and
Jacob A. Abraham and
Pramod Kumar Meher and
Goutam Chakraborty},
title = {An improved SOM-based visualization technique for {DNA} microarray
data analysis},
booktitle = {International Joint Conference on Neural Networks, {IJCNN} 2010, Barcelona,
Spain, 18-23 July, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/IJCNN.2010.5596807},
doi = {10.1109/IJCNN.2010.5596807},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/ijcnn/PatraAMC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ijcnn/PatraGM10,
author = {Jagdish Chandra Patra and
Nyttle V. George and
Pramod Kumar Meher},
title = {{DNA} microarray analysis using Equalized Orthogonal Mapping},
booktitle = {International Joint Conference on Neural Networks, {IJCNN} 2010, Barcelona,
Spain, 18-23 July, 2010},
pages = {1--8},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/IJCNN.2010.5596705},
doi = {10.1109/IJCNN.2010.5596705},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ijcnn/PatraGM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/Meher10,
author = {Pramod Kumar Meher},
title = {An optimized lookup-table for the evaluation of sigmoid function for
artificial neural networks},
booktitle = {18th {IEEE/IFIP} VLSI-SoC 2010, {IEEE/IFIP} {WG} 10.5 International
Conference on Very Large Scale Integration of System-on-Chip, Madrid,
Spain, 27-29 September 2010},
pages = {91--95},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/VLSISOC.2010.5642617},
doi = {10.1109/VLSISOC.2010.5642617},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/Meher10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/Meher10a,
author = {Pramod Kumar Meher},
title = {Novel input coding technique for high-precision LUT-based multiplication
for {DSP} applications},
booktitle = {18th {IEEE/IFIP} VLSI-SoC 2010, {IEEE/IFIP} {WG} 10.5 International
Conference on Very Large Scale Integration of System-on-Chip, Madrid,
Spain, 27-29 September 2010},
pages = {201--206},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/VLSISOC.2010.5642660},
doi = {10.1109/VLSISOC.2010.5642660},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/Meher10a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigpro/PatraMC09,
author = {Jagdish Chandra Patra and
Pramod Kumar Meher and
Goutam Chakraborty},
title = {Nonlinear channel equalization for wireless communication systems
using Legendre neural networks},
journal = {Signal Process.},
volume = {89},
number = {11},
pages = {2251--2262},
year = {2009},
url = {https://doi.org/10.1016/j.sigpro.2009.05.004},
doi = {10.1016/J.SIGPRO.2009.05.004},
timestamp = {Sun, 12 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/sigpro/PatraMC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Meher09,
author = {Pramod Kumar Meher},
title = {Extended Sequential Logic for Synchronous Circuit Optimization and
Its Applications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {28},
number = {4},
pages = {469--477},
year = {2009},
url = {https://doi.org/10.1109/TCAD.2009.2014006},
doi = {10.1109/TCAD.2009.2014006},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Meher09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/VachhaniSM09,
author = {Leena Vachhani and
K. Sridharan and
Pramod Kumar Meher},
title = {Efficient {CORDIC} Algorithms and Architectures for Low Area and High
Throughput Implementation},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {56-II},
number = {1},
pages = {61--65},
year = {2009},
url = {https://doi.org/10.1109/TCSII.2008.2010169},
doi = {10.1109/TCSII.2008.2010169},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/VachhaniSM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MeherVJSM09,
author = {Pramod Kumar Meher and
Javier Valls and
Tso{-}Bing Juang and
K. Sridharan and
Koushik Maharatna},
title = {50 Years of {CORDIC:} Algorithms, Architectures, and Applications},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {56-I},
number = {9},
pages = {1893--1907},
year = {2009},
url = {https://doi.org/10.1109/TCSI.2009.2025803},
doi = {10.1109/TCSI.2009.2025803},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/MeherVJSM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tie/VachhaniSM09,
author = {Leena Vachhani and
K. Sridharan and
Pramod Kumar Meher},
title = {Efficient {FPGA} Realization of {CORDIC} With Application to Robotic
Exploration},
journal = {{IEEE} Trans. Ind. Electron.},
volume = {56},
number = {12},
pages = {4915--4929},
year = {2009},
url = {https://doi.org/10.1109/TIE.2009.2026225},
doi = {10.1109/TIE.2009.2026225},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tie/VachhaniSM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/Meher09,
author = {Pramod Kumar Meher},
title = {On Efficient Implementation of Accumulation in Finite Field Over GF(2\({}^{\mbox{m}}\))
and its Applications},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {17},
number = {4},
pages = {541--550},
year = {2009},
url = {https://doi.org/10.1109/TVLSI.2008.2005288},
doi = {10.1109/TVLSI.2008.2005288},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/Meher09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/Meher09a,
author = {Pramod Kumar Meher},
title = {Systolic and Non-Systolic Scalable Modular Designs of Finite Field
Multipliers for Reed-Solomon Codec},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {17},
number = {6},
pages = {747--757},
year = {2009},
url = {https://doi.org/10.1109/TVLSI.2008.2006080},
doi = {10.1109/TVLSI.2008.2006080},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/Meher09a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MeherHL09,
author = {Pramod Kumar Meher and
Yajun Ha and
Chiou{-}Yng Lee},
editor = {Kazutoshi Wakabayashi},
title = {An optimized design for serial-parallel finite field multiplication
over \emph{GF}(2\({}^{\mbox{\emph{m}}}\)) based on all-one polynomials},
booktitle = {Proceedings of the 14th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2009, Yokohama, Japan, January 19-22, 2009},
pages = {210--215},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ASPDAC.2009.4796482},
doi = {10.1109/ASPDAC.2009.4796482},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MeherHL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ijcnn/PatraTM09,
author = {Jagdish Chandra Patra and
Nguyen C. Thanh and
Pramod Kumar Meher},
title = {Computationally efficient FLANN-based intelligent stock price prediction
system},
booktitle = {International Joint Conference on Neural Networks, {IJCNN} 2009, Atlanta,
Georgia, USA, 14-19 June 2009},
pages = {2431--2438},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/IJCNN.2009.5178594},
doi = {10.1109/IJCNN.2009.5178594},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ijcnn/PatraTM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Meher09,
author = {Pramod Kumar Meher},
title = {New Approach to {LUT} Implementation and Accumulation for Memory-based
Multiplication},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2009), 24-17
May 2009, Taipei, Taiwan},
pages = {453--456},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ISCAS.2009.5117783},
doi = {10.1109/ISCAS.2009.5117783},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Meher09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MeherL09,
author = {Pramod Kumar Meher and
Chiou{-}Yng Lee},
title = {Scalable Serial-parallel Multiplier over GF(2\({}^{\mbox{m}}\)) by
Hierarchical Pre-reduction and Input Decomposition},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2009), 24-17
May 2009, Taipei, Taiwan},
pages = {2910--2913},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ISCAS.2009.5118411},
doi = {10.1109/ISCAS.2009.5118411},
timestamp = {Sun, 04 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MeherL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ejasp/NguyenPM08,
author = {Thang Viet Nguyen and
Jagdish Chandra Patra and
Pramod Kumar Meher},
title = {WMicaD: {A} New Digital Watermarking Technique Using Independent Component
Analysis},
journal = {{EURASIP} J. Adv. Signal Process.},
volume = {2008},
year = {2008},
url = {https://doi.org/10.1155/2008/317242},
doi = {10.1155/2008/317242},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ejasp/NguyenPM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MeherMP08,
author = {Pramod Kumar Meher and
Basant K. Mohanty and
Jagdish Chandra Patra},
title = {Hardware-Efficient Systolic-Like Modular Design for Two-Dimensional
Discrete Wavelet Transform},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {55-II},
number = {2},
pages = {151--155},
year = {2008},
url = {https://doi.org/10.1109/TCSII.2007.911801},
doi = {10.1109/TCSII.2007.911801},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MeherMP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/Meher08a,
author = {Pramod Kumar Meher},
title = {Systolic and Super-Systolic Multipliers for Finite Field GF(2\({}^{\mbox{m}}\))
Based on Irreducible Trinomials},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {55-I},
number = {4},
pages = {1031--1040},
year = {2008},
url = {https://doi.org/10.1109/TCSI.2008.916622},
doi = {10.1109/TCSI.2008.916622},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/Meher08a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/PatraCM08,
author = {Jagdish Chandra Patra and
Goutam Chakraborty and
Pramod Kumar Meher},
title = {Neural-Network-Based Robust Linearization and Compensation Technique
for Sensors Under Nonlinear Environmental Influences},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {55-I},
number = {5},
pages = {1316--1327},
year = {2008},
url = {https://doi.org/10.1109/TCSI.2008.916617},
doi = {10.1109/TCSI.2008.916617},
timestamp = {Sun, 12 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/PatraCM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/Meher08,
author = {Pramod Kumar Meher},
title = {New Approach to Scalable Parallel and Pipelined Realization of Repetitive
Multiple Accumulations},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {55-II},
number = {9},
pages = {902--906},
year = {2008},
url = {https://doi.org/10.1109/TCSII.2008.924376},
doi = {10.1109/TCSII.2008.924376},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/Meher08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcsv/Meher08,
author = {Pramod Kumar Meher},
title = {Parallel and Pipelined Architectures for Cyclic Convolution by Block
Circulant Formulation Using Low-Complexity Short-Length Algorithms},
journal = {{IEEE} Trans. Circuits Syst. Video Technol.},
volume = {18},
number = {10},
pages = {1422--1431},
year = {2008},
url = {https://doi.org/10.1109/TCSVT.2008.2004918},
doi = {10.1109/TCSVT.2008.2004918},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcsv/Meher08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tsp/MeherCA08,
author = {Pramod Kumar Meher and
Shrutisagar Chandrasekaran and
Abbes Amira},
title = {{FPGA} Realization of {FIR} Filters by Efficient and Flexible Systolization
Using Distributed Arithmetic},
journal = {{IEEE} Trans. Signal Process.},
volume = {56},
number = {7-1},
pages = {3009--3017},
year = {2008},
url = {https://doi.org/10.1109/TSP.2007.914926},
doi = {10.1109/TSP.2007.914926},
timestamp = {Tue, 10 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tsp/MeherCA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apscc/LeeM08,
author = {Chiou{-}Yng Lee and
Pramod Kumar Meher},
title = {Efficient Bit-Parallel Multipliers in Composite Fields},
booktitle = {Proceedings of the 3rd {IEEE} Asia-Pacific Services Computing Conference,
{APSCC} 2008, Yilan, Taiwan, 9-12 December 2008},
pages = {686--691},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/APSCC.2008.103},
doi = {10.1109/APSCC.2008.103},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/apscc/LeeM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MeherP08,
author = {Pramod Kumar Meher and
Jagdish Chandra Patra},
title = {Fully-pipelined efficient architectures for {FPGA} realization of
discrete Hadamard transform},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {43--48},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580152},
doi = {10.1109/ASAP.2008.4580152},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MeherP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Meher08,
author = {Pramod Kumar Meher},
title = {Efficient systolization of cyclic convolution for systolic implementation
of sinusoidal transforms},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {97--101},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580161},
doi = {10.1109/ASAP.2008.4580161},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Meher08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MohantyM08,
author = {Basant K. Mohanty and
Pramod Kumar Meher},
title = {Concurrent systolic architecture for high-throughput implementation
of 3-dimensional discrete wavelet transform},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {162--166},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580172},
doi = {10.1109/ASAP.2008.4580172},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MohantyM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MohantyM08a,
author = {Basant K. Mohanty and
Pramod Kumar Meher},
title = {Throughput-scalable hybrid-pipeline architecture for multilevel lifting
2-D {DWT} of {JPEG} 2000 coder},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {305--309},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580196},
doi = {10.1109/ASAP.2008.4580196},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MohantyM08a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/IshwarMS08,
author = {Sujata Ishwar and
Pramod Kumar Meher and
M. N. S. Swamy},
title = {Discrete tchebichef transform-A fast 4x4 algorithm and its application
in image/video compression},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
pages = {260--263},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ISCAS.2008.4541404},
doi = {10.1109/ISCAS.2008.4541404},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/IshwarMS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/smc/PatraSMB08,
author = {Jagdish Chandra Patra and
Sonaabh Sood and
Pramod Kumar Meher and
C{\'{e}}dric Bornand},
title = {Content-based image retrieval using orthogonal moments heuristically},
booktitle = {Proceedings of the {IEEE} International Conference on Systems, Man
and Cybernetics, Singapore, 12-15 October 2008},
pages = {512--517},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICSMC.2008.4811328},
doi = {10.1109/ICSMC.2008.4811328},
timestamp = {Wed, 16 Oct 2019 14:14:51 +0200},
biburl = {https://dblp.org/rec/conf/smc/PatraSMB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/smc/PatraMC08,
author = {Jagdish Chandra Patra and
Pramod Kumar Meher and
Goutam Chakraborty},
title = {Development of intelligent sensors using Legendre functional-link
artificial neural networks},
booktitle = {Proceedings of the {IEEE} International Conference on Systems, Man
and Cybernetics, Singapore, 12-15 October 2008},
pages = {1140--1145},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICSMC.2008.4811435},
doi = {10.1109/ICSMC.2008.4811435},
timestamp = {Sun, 12 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/smc/PatraMC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/smc/PatraCMC08,
author = {Jagdish Chandra Patra and
Rowena Wai Sim Cheong and
Pramod Kumar Meher and
Goutam Chakraborty},
title = {Determination of {QSAR} of aldose reductase inhibitors using an {RBF}
network},
booktitle = {Proceedings of the {IEEE} International Conference on Systems, Man
and Cybernetics, Singapore, 12-15 October 2008},
pages = {1713--1718},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICSMC.2008.4811535},
doi = {10.1109/ICSMC.2008.4811535},
timestamp = {Sun, 12 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/smc/PatraCMC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/smc/PatraLM08,
author = {Jagdish Chandra Patra and
Li Li and
Pramod Kumar Meher},
title = {Support vector machine application in drug discovery of aldose reductase
inhibitors},
booktitle = {Proceedings of the {IEEE} International Conference on Systems, Man
and Cybernetics, Singapore, 12-15 October 2008},
pages = {1731--1736},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICSMC.2008.4811538},
doi = {10.1109/ICSMC.2008.4811538},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/smc/PatraLM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/smc/PatraCMC08a,
author = {Jagdish Chandra Patra and
Wei Chiat Chin and
Pramod Kumar Meher and
Goutam Chakraborty},
title = {Legendre-FLANN-based nonlinear channel equalization in wireless communication
system},
booktitle = {Proceedings of the {IEEE} International Conference on Systems, Man
and Cybernetics, Singapore, 12-15 October 2008},
pages = {1826--1831},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICSMC.2008.4811554},
doi = {10.1109/ICSMC.2008.4811554},
timestamp = {Sun, 12 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/smc/PatraCMC08a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/smc/PatraKMB08,
author = {Jagdish Chandra Patra and
Alagappan Karthik and
Pramod Kumar Meher and
C{\'{e}}dric Bornand},
title = {Robust CRT-based watermarking technique for authentication of image
and document},
booktitle = {Proceedings of the {IEEE} International Conference on Systems, Man
and Cybernetics, Singapore, 12-15 October 2008},
pages = {3250--3255},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICSMC.2008.4811797},
doi = {10.1109/ICSMC.2008.4811797},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/smc/PatraKMB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MeherS07,
author = {Pramod Kumar Meher and
M. N. S. Swamy},
title = {New Systolic Algorithm and Array Architecture for Prime-Length Discrete
Sine Transform},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {54-II},
number = {3},
pages = {262--266},
year = {2007},
url = {https://doi.org/10.1109/TCSII.2006.889453},
doi = {10.1109/TCSII.2006.889453},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MeherS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MeherPS07,
author = {Pramod Kumar Meher and
Jagdish Chandra Patra and
M. N. S. Swamy},
title = {High-Throughput Memory-Based Architecture for {DHT} Using a New Convolutional
Formulation},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {54-II},
number = {7},
pages = {606--610},
year = {2007},
url = {https://doi.org/10.1109/TCSII.2007.894407},
doi = {10.1109/TCSII.2007.894407},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MeherPS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Meher07,
author = {Pramod Kumar Meher},
title = {Systolic Formulation for Low-Complexity Serial-Parallel Implementation
of Unified Finite Field Multiplication over GF(2\({}^{\mbox{m}}\))},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {134--139},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429970},
doi = {10.1109/ASAP.2007.4429970},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Meher07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ijcnn/PatraLMA07,
author = {Jagdish Chandra Patra and
Goh P. Lim and
Pramod Kumar Meher and
Ee{-}Luang Ang},
title = {{DNA} Microarray Data Analysis: Effective Feature Selection for Accurate
Cancer Classification},
booktitle = {Proceedings of the International Joint Conference on Neural Networks,
{IJCNN} 2007, Celebrating 20 years of neural networks, Orlando, Florida,
USA, August 12-17, 2007},
pages = {260--265},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/IJCNN.2007.4370965},
doi = {10.1109/IJCNN.2007.4370965},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/ijcnn/PatraLMA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/spl/Meher06,
author = {Pramod Kumar Meher},
title = {Highly concurrent reduced-complexity 2-D systolic array for discrete
Fourier transform},
journal = {{IEEE} Signal Process. Lett.},
volume = {13},
number = {8},
pages = {481--484},
year = {2006},
url = {https://doi.org/10.1109/LSP.2006.873149},
doi = {10.1109/LSP.2006.873149},
timestamp = {Sun, 28 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/spl/Meher06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MeherSP06,
author = {Pramod Kumar Meher and
Thambipillai Srikanthan and
Jagdish Chandra Patra},
title = {Scalable and modular memory-based systolic architectures for discrete
Hartley transform},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {53-I},
number = {5},
pages = {1065--1077},
year = {2006},
url = {https://doi.org/10.1109/TCSI.2006.870225},
doi = {10.1109/TCSI.2006.870225},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MeherSP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/Meher06a,
author = {Pramod Kumar Meher},
title = {Efficient Systolic Implementation of {DFT} Using a Low-Complexity
Convolution-Like Formulation},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {53-II},
number = {8},
pages = {702--706},
year = {2006},
url = {https://doi.org/10.1109/TCSII.2006.875379},
doi = {10.1109/TCSII.2006.875379},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/Meher06a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/Meher06b,
author = {Pramod Kumar Meher},
title = {Hardware-Efficient Systolization of DA-Based Calculation of Finite
Digital Convolution},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {53-II},
number = {8},
pages = {707--711},
year = {2006},
url = {https://doi.org/10.1109/TCSII.2006.877277},
doi = {10.1109/TCSII.2006.877277},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/Meher06b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/Meher06,
author = {Pramod Kumar Meher},
title = {Unified Systolic-Like Architecture for {DCT} and {DST} Using Distributed
Arithmetic},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {53-I},
number = {12},
pages = {2656--2663},
year = {2006},
url = {https://doi.org/10.1109/TCSI.2006.885978},
doi = {10.1109/TCSI.2006.885978},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/Meher06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcsv/Meher06,
author = {Pramod Kumar Meher},
title = {Systolic Designs for {DCT} Using a Low-Complexity Concurrent Convolutional
Formulation},
journal = {{IEEE} Trans. Circuits Syst. Video Technol.},
volume = {16},
number = {9},
pages = {1041--1050},
year = {2006},
url = {https://doi.org/10.1109/TCSVT.2006.880191},
doi = {10.1109/TCSVT.2006.880191},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcsv/Meher06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/MohantyM06,
author = {Basant K. Mohanty and
Pramod Kumar Meher},
title = {{VLSI} Architecture for High-Speed / Low-Power Implementation of Multilevel
Lifting {DWT}},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems 2006, {APCCAS}
2006, Singapore, 4-7 December 2006},
pages = {458--461},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/APCCAS.2006.342488},
doi = {10.1109/APCCAS.2006.342488},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/apccas/MohantyM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/MohantyM06a,
author = {Basant K. Mohanty and
Pramod Kumar Meher},
title = {Merged-Cascaded Systolic Array for {VLSI} Implementation of Discrete
Wavelet Transform},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems 2006, {APCCAS}
2006, Singapore, 4-7 December 2006},
pages = {462--465},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/APCCAS.2006.342489},
doi = {10.1109/APCCAS.2006.342489},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/apccas/MohantyM06a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/MeherVPS06,
author = {Pramod Kumar Meher and
A. Prasad Vinod and
Jagdish Chandra Patra and
M. N. S. Swamy},
title = {Reduced-Complexity Concurrent Systolic Implementation of the Discrete
Sine Transform},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems 2006, {APCCAS}
2006, Singapore, 4-7 December 2006},
pages = {1535--1538},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/APCCAS.2006.342535},
doi = {10.1109/APCCAS.2006.342535},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/apccas/MeherVPS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/VinodCMS06,
author = {A. Prasad Vinod and
Chip{-}Hong Chang and
Pramod Kumar Meher and
Ankita Singla},
title = {Low Power {FIR} Filter Realization using Minimal Difference Coefficients:
Part {I} - Complexity Analysis},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems 2006, {APCCAS}
2006, Singapore, 4-7 December 2006},
pages = {1547--1550},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/APCCAS.2006.342538},
doi = {10.1109/APCCAS.2006.342538},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/apccas/VinodCMS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/VinodCMS06a,
author = {A. Prasad Vinod and
Chip{-}Hong Chang and
Pramod Kumar Meher and
Ankita Singla},
title = {Low Power {FIR} Filter Realization Using Minimal Difference Coefficients:
Part {II} - Algorithm},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems 2006, {APCCAS}
2006, Singapore, 4-7 December 2006},
pages = {1551--1554},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/APCCAS.2006.342539},
doi = {10.1109/APCCAS.2006.342539},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/apccas/VinodCMS06a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/MeherPV06,
author = {Pramod Kumar Meher and
Jagdish Chandra Patra and
A. Prasad Vinod},
title = {A 2-D Systolic Array for High-Throughput Computation of 2-D Discrete
Fourier Transform},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems 2006, {APCCAS}
2006, Singapore, 4-7 December 2006},
pages = {1927--1930},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/APCCAS.2006.342237},
doi = {10.1109/APCCAS.2006.342237},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/apccas/MeherPV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/PatraSAM06,
author = {Jagdish Chandra Patra and
W. Soh and
Ee{-}Luang Ang and
Pramod Kumar Meher},
title = {An Improved SVD-Based Watermarking Technique for Image and Document
Authentication},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems 2006, {APCCAS}
2006, Singapore, 4-7 December 2006},
pages = {1984--1987},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/APCCAS.2006.342276},
doi = {10.1109/APCCAS.2006.342276},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/apccas/PatraSAM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icarcv/PatraLMA06,
author = {Jagdish Chandra Patra and
Han Yang Lee and
Pramod Kumar Meher and
Ee{-}Luang Ang},
title = {Field Programmable Gate Array Implementation of a Neural Network-based
Intelligent Sensor System},
booktitle = {Ninth International Conference on Control, Automation, Robotics and
Vision, {ICARCV} 2006, Singapore, 5-8 December 2006, Proceedings},
pages = {1--5},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ICARCV.2006.345341},
doi = {10.1109/ICARCV.2006.345341},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/icarcv/PatraLMA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ijcnn/PatraLMA06,
author = {Jagdish Chandra Patra and
Weineng Lim and
Pramod Kumar Meher and
Ee{-}Luang Ang},
title = {Financial Prediction of Major Indices using Computational Efficient
Artificial Neural Networks},
booktitle = {Proceedings of the International Joint Conference on Neural Networks,
{IJCNN} 2006, part of the {IEEE} World Congress on Computational Intelligence,
{WCCI} 2006, Vancouver, BC, Canada, 16-21 July 2006},
pages = {2114--2120},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/IJCNN.2006.246982},
doi = {10.1109/IJCNN.2006.246982},
timestamp = {Tue, 10 Aug 2021 14:29:47 +0200},
biburl = {https://dblp.org/rec/conf/ijcnn/PatraLMA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ijcnn/PatraAMZ06,
author = {Jagdish Chandra Patra and
Ee{-}Luang Ang and
Pramod Kumar Meher and
Qin Zhen},
title = {A New SOM-based Visualization Technique for {DNA} Microarray Data},
booktitle = {Proceedings of the International Joint Conference on Neural Networks,
{IJCNN} 2006, part of the {IEEE} World Congress on Computational Intelligence,
{WCCI} 2006, Vancouver, BC, Canada, 16-21 July 2006},
pages = {4429--4434},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/IJCNN.2006.247044},
doi = {10.1109/IJCNN.2006.247044},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ijcnn/PatraAMZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MeherP06,
author = {Pramod Kumar Meher and
Jagdish Chandra Patra},
title = {A new approach to secure distributed storage, sharing and dissemination
of digital image},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
May 2006, Island of Kos, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISCAS.2006.1692600},
doi = {10.1109/ISCAS.2006.1692600},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MeherP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MeherPM06,
author = {Pramod Kumar Meher and
Jagdish Chandra Patra and
M. R. Meher},
title = {Low-complexity technique for secure storage and sharing of biomedical
images},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
May 2006, Island of Kos, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISCAS.2006.1693705},
doi = {10.1109/ISCAS.2006.1693705},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MeherPM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PatraAM06,
author = {Jagdish Chandra Patra and
Ee{-}Luang Ang and
Pramod Kumar Meher},
title = {A novel neural network-based linearization and auto-compensation technique
for sensors},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
May 2006, Island of Kos, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISCAS.2006.1692798},
doi = {10.1109/ISCAS.2006.1692798},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PatraAM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/Meher05,
author = {Pramod Kumar Meher},
title = {Design of a fully-pipelined systolic array for flexible transposition-free
{VLSI} of 2-D {DFT}},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {52-II},
number = {2},
pages = {85--89},
year = {2005},
url = {https://doi.org/10.1109/TCSII.2004.840284},
doi = {10.1109/TCSII.2004.840284},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/Meher05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aPcsac/Meher05,
author = {Pramod Kumar Meher},
editor = {Thambipillai Srikanthan and
Jingling Xue and
Chip{-}Hong Chang},
title = {Area-Time Efficient Systolic Architecture for the {DCT}},
booktitle = {Advances in Computer Systems Architecture, 10th Asia-Pacific Conference,
{ACSAC} 2005, Singapore, October 24-26, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3740},
pages = {787--794},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11572961\_64},
doi = {10.1007/11572961\_64},
timestamp = {Tue, 14 May 2019 10:00:42 +0200},
biburl = {https://dblp.org/rec/conf/aPcsac/Meher05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tce/SriskanthanMNH04,
author = {Nadarajah Sriskanthan and
Pramod Kumar Meher and
Geok See Ng and
C. K. Heng},
title = {WAP-teletext system},
journal = {{IEEE} Trans. Consumer Electron.},
volume = {50},
number = {1},
pages = {130--138},
year = {2004},
url = {https://doi.org/10.1109/TCE.2004.1277852},
doi = {10.1109/TCE.2004.1277852},
timestamp = {Thu, 09 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tce/SriskanthanMNH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/csreaESA/MeherSKA03,
author = {Pramod Kumar Meher and
Thambipillai Srikanthan and
M. Mahesh Kumar and
S. Arunkumar},
editor = {Hamid R. Arabnia and
Laurence Tianruo Yang},
title = {Low-Power Transform-Domain Coding by Separable Two-Dimensional Hartley-Like
Transform},
booktitle = {Proceedings of the International Conference on Embedded Systems and
Applications, {ESA} '03, June 23 - 26, 2003, Las Vegas, Nevada, {USA}},
pages = {228--236},
publisher = {{CSREA} Press},
year = {2003},
timestamp = {Fri, 12 Jun 2015 19:15:11 +0200},
biburl = {https://dblp.org/rec/conf/csreaESA/MeherSKA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/BeheraM02,
author = {Prafulla Kumar Behera and
Pramod Kumar Meher},
title = {Effective communication in ad hoc network of mobile users group},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems 2002, {APCCAS}
2002, Singapore, 16-18 December 2002},
pages = {461--465},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/APCCAS.2002.1115306},
doi = {10.1109/APCCAS.2002.1115306},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/apccas/BeheraM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/RathM02,
author = {A. K. Rath and
Pramod Kumar Meher},
title = {Reconfigurable execution core for high performance {DSP} applications},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems 2002, {APCCAS}
2002, Singapore, 16-18 December 2002},
pages = {509--514},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/APCCAS.2002.1115323},
doi = {10.1109/APCCAS.2002.1115323},
timestamp = {Wed, 17 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/apccas/RathM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iwdc/BeheraM02,
author = {Prafulla Kumar Behera and
Pramod Kumar Meher},
editor = {Sajal K. Das and
Swapan Bhattacharya},
title = {Prospects of Group-Based Communication in Mobile Ad hoc Networks},
booktitle = {Distributed Computing, Mobile and Wireless Computing 4th International
Workshop, {IWDC} 2002, Calcutta, India, December 28-31, 2002, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2571},
pages = {174--183},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-36385-8\_18},
doi = {10.1007/3-540-36385-8\_18},
timestamp = {Tue, 10 Sep 2019 13:47:28 +0200},
biburl = {https://dblp.org/rec/conf/iwdc/BeheraM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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