BibTeX records: Masayuki Mizuno

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@article{DBLP:journals/simpra/WuM19,
  author       = {Guan{-}Yuan Wu and
                  Masayuki Mizuno},
  title        = {The numerical analysis of mass evacuation in Taipei 101 with control
                  volume model},
  journal      = {Simul. Model. Pract. Theory},
  volume       = {96},
  year         = {2019},
  url          = {https://doi.org/10.1016/j.simpat.2019.101937},
  doi          = {10.1016/J.SIMPAT.2019.101937},
  timestamp    = {Mon, 24 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/simpra/WuM19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aplas/MizunoS19,
  author       = {Masayuki Mizuno and
                  Eijiro Sumii},
  editor       = {Anthony Widjaja Lin},
  title        = {Formal Verifications of Call-by-Need and Call-by-Name Evaluations
                  with Mutual Recursion},
  booktitle    = {Programming Languages and Systems - 17th Asian Symposium, {APLAS}
                  2019, Nusa Dua, Bali, Indonesia, December 1-4, 2019, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {11893},
  pages        = {181--201},
  publisher    = {Springer},
  year         = {2019},
  url          = {https://doi.org/10.1007/978-3-030-34175-6\_10},
  doi          = {10.1007/978-3-030-34175-6\_10},
  timestamp    = {Sat, 09 Apr 2022 12:39:28 +0200},
  biburl       = {https://dblp.org/rec/conf/aplas/MizunoS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/flops/MizunoS18,
  author       = {Masayuki Mizuno and
                  Eijiro Sumii},
  editor       = {John P. Gallagher and
                  Martin Sulzmann},
  title        = {Formal Verification of the Correspondence Between Call-by-Need and
                  Call-by-Name},
  booktitle    = {Functional and Logic Programming - 14th International Symposium, {FLOPS}
                  2018, Nagoya, Japan, May 9-11, 2018, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {10818},
  pages        = {1--16},
  publisher    = {Springer},
  year         = {2018},
  url          = {https://doi.org/10.1007/978-3-319-90686-7\_1},
  doi          = {10.1007/978-3-319-90686-7\_1},
  timestamp    = {Tue, 14 May 2019 10:00:53 +0200},
  biburl       = {https://dblp.org/rec/conf/flops/MizunoS18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/HijiokaMYM13,
  author       = {Ken'ichiro Hijioka and
                  Masaharu Matsudaira and
                  Koichi Yamaguchi and
                  Masayuki Mizuno},
  title        = {A 5.5Gb/s 5mm contactless interface containing a 50Mb/s bidirectional
                  sub-channel employing common-mode {OOK} signaling},
  booktitle    = {2013 {IEEE} International Solid-State Circuits Conference - Digest
                  of Technical Papers, {ISSCC} 2013, San Francisco, CA, USA, February
                  17-21, 2013},
  pages        = {406--407},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ISSCC.2013.6487790},
  doi          = {10.1109/ISSCC.2013.6487790},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/HijiokaMYM13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/KaeriyamaUFOMM12,
  author       = {Shunichi Kaeriyama and
                  Shinichi Uchida and
                  Masayuki Furumiya and
                  Mitsuji Okada and
                  Tadashi Maeda and
                  Masayuki Mizuno},
  title        = {A 2.5 kV Isolation 35 kV/us {CMR} 250 Mbps Digital Isolator in Standard
                  {CMOS} With a Small Transformer Driving Technique},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {47},
  number       = {2},
  pages        = {435--443},
  year         = {2012},
  url          = {https://doi.org/10.1109/JSSC.2011.2170775},
  doi          = {10.1109/JSSC.2011.2170775},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/KaeriyamaUFOMM12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/IkenagaNSSHSONISNNNHM12,
  author       = {Yoshifumi Ikenaga and
                  Masahiro Nomura and
                  Shuji Suenaga and
                  Hideo Sonohara and
                  Yoshitaka Horikoshi and
                  Toshiyuki Saito and
                  Yukio Ohdaira and
                  Yoichiro Nishio and
                  Tomohiro Iwashita and
                  Miyuki Satou and
                  Koji Nishida and
                  Koichi Nose and
                  Koichiro Noguchi and
                  Yoshihiro Hayashi and
                  Masayuki Mizuno},
  title        = {A 27{\%} Active-Power-Reduced 40-nm {CMOS} Multimedia SoC With Adaptive
                  Voltage Scaling Using Distributed Universal Delay Lines},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {47},
  number       = {4},
  pages        = {832--840},
  year         = {2012},
  url          = {https://doi.org/10.1109/JSSC.2012.2185340},
  doi          = {10.1109/JSSC.2012.2185340},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/IkenagaNSSHSONISNNNHM12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsic/TokairinNTNMKM12,
  author       = {Takashi Tokairin and
                  Koichi Nose and
                  Koichi Takeda and
                  Koichiro Noguchi and
                  Tadashi Maeda and
                  Kazuyoshi Kawai and
                  Masayuki Mizuno},
  title        = {A 280nW, 100kHz, 1-cycle start-up time, on-chip {CMOS} relaxation
                  oscillator employing a feedforward period control scheme},
  booktitle    = {Symposium on {VLSI} Circuits, {VLSIC} 2012, Honolulu, HI, USA, June
                  13-15, 2012},
  pages        = {16--17},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/VLSIC.2012.6243767},
  doi          = {10.1109/VLSIC.2012.6243767},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/TokairinNTNMKM12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieicet/KaeriyamaKM11,
  author       = {Shunichi Kaeriyama and
                  Mikihiro Kajita and
                  Masayuki Mizuno},
  title        = {A Clock Generator with Clock Period, Duty-Ratio and I/Q-Balance Adjustment
                  Capabilities for On-Chip Timing-Margin Tests},
  journal      = {{IEICE} Trans. Electron.},
  volume       = {94-C},
  number       = {1},
  pages        = {102--109},
  year         = {2011},
  url          = {https://doi.org/10.1587/transele.E94.C.102},
  doi          = {10.1587/TRANSELE.E94.C.102},
  timestamp    = {Sat, 11 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/KaeriyamaKM11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieicet/YamaguchiM11,
  author       = {Koichi Yamaguchi and
                  Masayuki Mizuno},
  title        = {Dicode Partial Response Signaling over Inductively-Coupled Channel},
  journal      = {{IEICE} Trans. Electron.},
  volume       = {94-C},
  number       = {4},
  pages        = {613--618},
  year         = {2011},
  url          = {https://doi.org/10.1587/transele.E94.C.613},
  doi          = {10.1587/TRANSELE.E94.C.613},
  timestamp    = {Sat, 11 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/YamaguchiM11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieicet/YamaguchiM11a,
  author       = {Koichi Yamaguchi and
                  Masayuki Mizuno},
  title        = {A Duobinary Signaling for Asymmetric Multi-Chip Communication},
  journal      = {{IEICE} Trans. Electron.},
  volume       = {94-C},
  number       = {4},
  pages        = {619--626},
  year         = {2011},
  url          = {https://doi.org/10.1587/transele.E94.C.619},
  doi          = {10.1587/TRANSELE.E94.C.619},
  timestamp    = {Sat, 11 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/YamaguchiM11a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/SaitoNOYOISYM10,
  author       = {Hideaki Saito and
                  Masayuki Nakajima and
                  Takumi Okamoto and
                  Yusuke Yamada and
                  Akira Ohuchi and
                  Noriyuki Iguchi and
                  Toshitsugu Sakamoto and
                  Koichi Yamaguchi and
                  Masayuki Mizuno},
  title        = {A Chip-Stacked Memory for On-Chip SRAM-Rich SoCs and Processors},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {45},
  number       = {1},
  pages        = {15--22},
  year         = {2010},
  url          = {https://doi.org/10.1109/JSSC.2009.2034078},
  doi          = {10.1109/JSSC.2009.2034078},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/SaitoNOYOISYM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/IshizakiM10,
  author       = {Haruya Ishizaki and
                  Masayuki Mizuno},
  title        = {A 0.2 mm \({}^{\mbox{2}}\) , 27 Mbps 3 mW ADC/FFT-Less {FDM} {BAN}
                  Receiver With Energy Exploitation Capability},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {45},
  number       = {4},
  pages        = {921--927},
  year         = {2010},
  url          = {https://doi.org/10.1109/JSSC.2010.2042243},
  doi          = {10.1109/JSSC.2010.2042243},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/IshizakiM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/YoshidaNNNMTMK10,
  author       = {Yoichi Yoshida and
                  Koichi Nose and
                  Yoshihiro Nakagawa and
                  Koichiro Noguchi and
                  Yasuhiro Morita and
                  Masamoto Tago and
                  Masayuki Mizuno and
                  Tadahiro Kuroda},
  title        = {An Inductive-Coupling {DC} Voltage Transceiver for Highly Parallel
                  Wafer-Level Testing},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {45},
  number       = {10},
  pages        = {2057--2065},
  year         = {2010},
  url          = {https://doi.org/10.1109/JSSC.2010.2061653},
  doi          = {10.1109/JSSC.2010.2061653},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/YoshidaNNNMTMK10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/cicc/TakeyaSYSYMK10,
  author       = {Tsutomu Takeya and
                  Kazuhisa Sunaga and
                  Koichi Yamaguchi and
                  Hideyuki Sugita and
                  Yoichi Yoshida and
                  Masayuki Mizuno and
                  Tadahiro Kuroda},
  editor       = {Jacqueline Snyder and
                  Rakesh Patel and
                  Tom Andre},
  title        = {A 6Gb/s receiver with discrete-time based channel filtering for wireline
                  {FDM} communications},
  booktitle    = {{IEEE} Custom Integrated Circuits Conference, {CICC} 2010, San Jose,
                  California, USA, 19-22 September, 2010, Proceedings},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/CICC.2010.5617600},
  doi          = {10.1109/CICC.2010.5617600},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/cicc/TakeyaSYSYMK10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/SugitaSYM10,
  author       = {Hideyuki Sugita and
                  Kazuhisa Sunaga and
                  Koichi Yamaguchi and
                  Masayuki Mizuno},
  title        = {A 16Gb/s 1\({}^{\mbox{st}}\)-Tap {FFE} and 3-Tap {DFE} in 90nm {CMOS}},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2010,
                  Digest of Technical Papers, San Francisco, CA, USA, 7-11 February,
                  2010},
  pages        = {162--163},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ISSCC.2010.5434005},
  doi          = {10.1109/ISSCC.2010.5434005},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/SugitaSYM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/SaneyoshiNM10,
  author       = {Eisuke Saneyoshi and
                  Koichi Nose and
                  Masayuki Mizuno},
  title        = {A precise-tracking NBTI-degradation monitor independent of {NBTI}
                  recovery effect},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2010,
                  Digest of Technical Papers, San Francisco, CA, USA, 7-11 February,
                  2010},
  pages        = {192--193},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ISSCC.2010.5433994},
  doi          = {10.1109/ISSCC.2010.5433994},
  timestamp    = {Wed, 17 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/SaneyoshiNM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/KimCKMM10,
  author       = {Young Moon Kim and
                  Tze Wee Chen and
                  Yoshio Kameda and
                  Masayuki Mizuno and
                  Subhasish Mitra},
  title        = {Gate-oxide early-life failure identification using delay shifts},
  booktitle    = {28th {IEEE} {VLSI} Test Symposium, {VTS} 2010, April 19-22, 2010,
                  Santa Cruz, California, {USA}},
  pages        = {69--74},
  publisher    = {{IEEE} Computer Society},
  year         = {2010},
  url          = {https://doi.org/10.1109/VTS.2010.5469615},
  doi          = {10.1109/VTS.2010.5469615},
  timestamp    = {Tue, 02 Mar 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/KimCKMM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/NakamuraM09,
  author       = {Katsu Nakamura and
                  Masayuki Mizuno},
  title        = {Introduction to the Special Issue on the 2008 Symposium on {VLSI}
                  Circuits},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {44},
  number       = {4},
  pages        = {1039--1040},
  year         = {2009},
  url          = {https://doi.org/10.1109/JSSC.2009.2014700},
  doi          = {10.1109/JSSC.2009.2014700},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/NakamuraM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/YamaguchiHNSMH09,
  author       = {Koichi Yamaguchi and
                  Yoshihiko Hori and
                  Keiichi Nakajima and
                  Kazumasa Suzuki and
                  Masayuki Mizuno and
                  Hiroshi Hayama},
  title        = {A 2.0 Gb/s Clock-Embedded Interface for Full-HD 10-Bit 120 Hz {LCD}
                  Drivers With 1/5-Rate Noise-Tolerant Phase and Frequency Recovery},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {44},
  number       = {12},
  pages        = {3560--3567},
  year         = {2009},
  url          = {https://doi.org/10.1109/JSSC.2009.2031024},
  doi          = {10.1109/JSSC.2009.2031024},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/YamaguchiHNSMH09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/pieee/OhashiNSNFUTNMY09,
  author       = {Keishi Ohashi and
                  Kenichi Nishi and
                  Takanori Shimizu and
                  Masafumi Nakada and
                  Junichi Fujikata and
                  Jun Ushida and
                  Sunao Torii and
                  Koichi Nose and
                  Masayuki Mizuno and
                  Hiroaki Yukawa and
                  Masao Kinoshita and
                  Nobuo Suzuki and
                  Akiko Gomyo and
                  Tsutomu Ishi and
                  Daisuke Okamoto and
                  Katsuya Furue and
                  Toshihide Ueno and
                  Tai Tsuchizawa and
                  Toshifumi Watanabe and
                  Koji Yamada and
                  Seiichi Itabashi and
                  Jun Akedo},
  title        = {On-Chip Optical Interconnect},
  journal      = {Proc. {IEEE}},
  volume       = {97},
  number       = {7},
  pages        = {1186--1198},
  year         = {2009},
  url          = {https://doi.org/10.1109/JPROC.2009.2020331},
  doi          = {10.1109/JPROC.2009.2020331},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/pieee/OhashiNSNFUTNMY09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iros/SekimotoKIAM09,
  author       = {Masahiro Sekimoto and
                  Sadao Kawamura and
                  Tomoya Ishitsubo and
                  Shinsuke Akizuki and
                  Masayuki Mizuno},
  title        = {Basis-motion torque composition approach: generation of feedforward
                  inputs for control of multi-joint robots},
  booktitle    = {2009 {IEEE/RSJ} International Conference on Intelligent Robots and
                  Systems, October 11-15, 2009, St. Louis, MO, {USA}},
  pages        = {3127--3132},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/IROS.2009.5354729},
  doi          = {10.1109/IROS.2009.5354729},
  timestamp    = {Wed, 16 Oct 2019 14:14:51 +0200},
  biburl       = {https://dblp.org/rec/conf/iros/SekimotoKIAM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/SaitoNOYOISYM09,
  author       = {Hideaki Saito and
                  Masayuki Nakajima and
                  Takumi Okamoto and
                  Yusuke Yamada and
                  Akira Ohuchi and
                  Noriyuki Iguchi and
                  Toshitsugu Sakamoto and
                  Koichi Yamaguchi and
                  Masayuki Mizuno},
  title        = {A chip-stacked memory for on-chip SRAM-rich SoCs and processors},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2009,
                  Digest of Technical Papers, San Francisco, CA, USA, 8-12 February,
                  2009},
  pages        = {60--61},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/ISSCC.2009.4977307},
  doi          = {10.1109/ISSCC.2009.4977307},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/SaitoNOYOISYM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/YamguchiHNSMH09,
  author       = {Koichi Yamaguchi and
                  Yoshihiko Hori and
                  Keiichi Nakajima and
                  Kazumasa Suzuki and
                  Masayuki Mizuno and
                  Hiroshi Hayama},
  title        = {A 2.0Gb/s clock-embedded interface for full-HD 10b 120Hz {LCD} drivers
                  with 1/5-rate noise-tolerant phase and frequency recovery},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2009,
                  Digest of Technical Papers, San Francisco, CA, USA, 8-12 February,
                  2009},
  pages        = {192--193},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/ISSCC.2009.4977373},
  doi          = {10.1109/ISSCC.2009.4977373},
  timestamp    = {Wed, 17 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/YamguchiHNSMH09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/YoshidaNNNMTKM09,
  author       = {Yoichi Yoshida and
                  Koichi Nose and
                  Yoshihiro Nakagawa and
                  Koichiro Noguchi and
                  Yasuhiro Morita and
                  Masamoto Tago and
                  Tadahiro Kuroda and
                  Masayuki Mizuno},
  title        = {Wireless {DC} voltage transmission using inductive-coupling channelfor
                  highly-parallel wafer-level testing},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2009,
                  Digest of Technical Papers, San Francisco, CA, USA, 8-12 February,
                  2009},
  pages        = {470--471},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/ISSCC.2009.4977512},
  doi          = {10.1109/ISSCC.2009.4977512},
  timestamp    = {Wed, 17 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/YoshidaNNNMTKM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieicet/FujikataNGUIYONSKNMTWYIO08,
  author       = {Junichi Fujikata and
                  Kenichi Nishi and
                  Akiko Gomyo and
                  Jun Ushida and
                  Tsutomu Ishi and
                  Hiroaki Yukawa and
                  Daisuke Okamoto and
                  Masafumi Nakada and
                  Takanori Shimizu and
                  Masao Kinoshita and
                  Koichi Nose and
                  Masayuki Mizuno and
                  Tai Tsuchizawa and
                  Toshifumi Watanabe and
                  Koji Yamada and
                  Seiichi Itabashi and
                  Keishi Ohashi},
  title        = {{LSI} On-Chip Optical Interconnection with Si Nano-Photonics},
  journal      = {{IEICE} Trans. Electron.},
  volume       = {91-C},
  number       = {2},
  pages        = {131--137},
  year         = {2008},
  url          = {https://doi.org/10.1093/ietele/e91-c.2.131},
  doi          = {10.1093/IETELE/E91-C.2.131},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/FujikataNGUIYONSKNMTWYIO08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/NoseM08,
  author       = {Koichi Nose and
                  Masayuki Mizuno},
  title        = {A 0.016 mm\({}^{\mbox{2}}\), 2.4 GHz {RF} Signal Quality Measurement
                  Macro for {RF} Test and Diagnosis},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {43},
  number       = {4},
  pages        = {1038--1046},
  year         = {2008},
  url          = {https://doi.org/10.1109/JSSC.2008.917566},
  doi          = {10.1109/JSSC.2008.917566},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/NoseM08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieicet/NiitsuMINTMSK07,
  author       = {Kiichi Niitsu and
                  Noriyuki Miura and
                  Mari Inoue and
                  Yoshihiro Nakagawa and
                  Masamoto Tago and
                  Masayuki Mizuno and
                  Takayasu Sakurai and
                  Tadahiro Kuroda},
  title        = {Daisy Chain Transmitter for Power Reduction in Inductive-Coupling
                  {CMOS} Link},
  journal      = {{IEICE} Trans. Electron.},
  volume       = {90-C},
  number       = {4},
  pages        = {829--835},
  year         = {2007},
  url          = {https://doi.org/10.1093/ietele/e90-c.4.829},
  doi          = {10.1093/IETELE/E90-C.4.829},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/ieicet/NiitsuMINTMSK07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/IkedaSIMNNA07,
  author       = {Makoto Ikeda and
                  Taku Sogabe and
                  Ken Ishii and
                  Masayuki Mizuno and
                  Toru Nakura and
                  Koichi Nose and
                  Kunihiro Asada},
  title        = {{LAGS} System Using Data/Instruction Grain Power Control},
  booktitle    = {2007 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2007, Digest of Technical Papers, San Francisco, CA, USA, February
                  11-15, 2007},
  pages        = {66--587},
  publisher    = {{IEEE}},
  year         = {2007},
  url          = {https://doi.org/10.1109/ISSCC.2007.373590},
  doi          = {10.1109/ISSCC.2007.373590},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/IkedaSIMNNA07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/KaeriyamaKM07,
  author       = {Shunichi Kaeriyama and
                  Mikihiro Kajita and
                  Masayuki Mizuno},
  title        = {A 1-to-2GHz 4-Phase On-Chip Clock Generator with Timing-Margin Test
                  Capability},
  booktitle    = {2007 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2007, Digest of Technical Papers, San Francisco, CA, USA, February
                  11-15, 2007},
  pages        = {174--594},
  publisher    = {{IEEE}},
  year         = {2007},
  url          = {https://doi.org/10.1109/ISSCC.2007.373350},
  doi          = {10.1109/ISSCC.2007.373350},
  timestamp    = {Wed, 17 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/KaeriyamaKM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/NakuraNM07,
  author       = {Toru Nakura and
                  Koichi Nose and
                  Masayuki Mizuno},
  title        = {Fine-Grain Redundant Logic Using Defect-Prediction Flip-Flops},
  booktitle    = {2007 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2007, Digest of Technical Papers, San Francisco, CA, USA, February
                  11-15, 2007},
  pages        = {402--611},
  publisher    = {{IEEE}},
  year         = {2007},
  url          = {https://doi.org/10.1109/ISSCC.2007.373464},
  doi          = {10.1109/ISSCC.2007.373464},
  timestamp    = {Wed, 17 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/NakuraNM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieicet/BannoSIKKMTHA06,
  author       = {Naoki Banno and
                  Toshitsugu Sakamoto and
                  Noriyuki Iguchi and
                  Hisao Kawaura and
                  Shunichi Kaeriyama and
                  Masayuki Mizuno and
                  Kazuya Terabe and
                  Tsuyoshi Hasegawa and
                  Masakazu Aono},
  title        = {Solid-Electrolyte Nanometer Switch},
  journal      = {{IEICE} Trans. Electron.},
  volume       = {89-C},
  number       = {11},
  pages        = {1492--1498},
  year         = {2006},
  url          = {https://doi.org/10.1093/ietele/e89-c.11.1492},
  doi          = {10.1093/IETELE/E89-C.11.1492},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/BannoSIKKMTHA06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/NoseKM06,
  author       = {Koichi Nose and
                  Mikihiro Kajita and
                  Masayuki Mizuno},
  title        = {A 1-ps Resolution Jitter-Measurement Macro Using Interpolated Jitter
                  Oversampling},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {41},
  number       = {12},
  pages        = {2911--2920},
  year         = {2006},
  url          = {https://doi.org/10.1109/JSSC.2006.884402},
  doi          = {10.1109/JSSC.2006.884402},
  timestamp    = {Fri, 15 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/NoseKM06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/OhashiFNINYFMNO06,
  author       = {Keishi Ohashi and
                  Junichi Fujikata and
                  Masafumi Nakada and
                  Tsutomu Ishi and
                  Kenichi Nishi and
                  Hirohito Yamada and
                  Muneo Fukaishi and
                  Masayuki Mizuno and
                  Koichi Nose and
                  Ichiro Ogura and
                  Yutaka Urino and
                  Toshio Baba},
  title        = {Optical interconnect technologies for high-speed {VLSI} chips using
                  silicon nano-photonics},
  booktitle    = {2006 {IEEE} International Solid State Circuits Conference, {ISSCC}
                  2006, Digest of Technical Papers, an Francisco, CA, USA, February
                  6-9, 2006},
  pages        = {1686--1695},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISSCC.2006.1696224},
  doi          = {10.1109/ISSCC.2006.1696224},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/OhashiFNINYFMNO06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/NoseKM06,
  author       = {Koichi Nose and
                  Mikihiro Kajita and
                  Masayuki Mizuno},
  title        = {A 1ps-Resolution Jitter-Measurement Macro Using Interpolated Jitter
                  Oversampling},
  booktitle    = {2006 {IEEE} International Solid State Circuits Conference, {ISSCC}
                  2006, Digest of Technical Papers, an Francisco, CA, USA, February
                  6-9, 2006},
  pages        = {2112--2121},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISSCC.2006.1696271},
  doi          = {10.1109/ISSCC.2006.1696271},
  timestamp    = {Thu, 14 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/NoseKM06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/KaeriyamaSSMKHT05,
  author       = {Shunichi Kaeriyama and
                  Toshitsugu Sakamoto and
                  Hiroshi Sunamura and
                  Masayuki Mizuno and
                  Hisao Kawaura and
                  Tsuyoshi Hasegawa and
                  Kazuya Terabe and
                  Tomonobu Nakayama and
                  Masakazu Aono},
  title        = {A nonvolatile programmable solid-electrolyte nanometer switch},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {40},
  number       = {1},
  pages        = {168--176},
  year         = {2005},
  url          = {https://doi.org/10.1109/JSSC.2004.837244},
  doi          = {10.1109/JSSC.2004.837244},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/KaeriyamaSSMKHT05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/TakamiyaM05,
  author       = {Makoto Takamiya and
                  Masayuki Mizuno},
  title        = {A 6.7-fF/{\(\mu\)}m\({}^{\mbox{2}}\) bias-independent gate capacitor
                  {(BIGCAP)} with digital {CMOS} process and its application to the
                  loop filter of a differential {PLL}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {40},
  number       = {3},
  pages        = {719--725},
  year         = {2005},
  url          = {https://doi.org/10.1109/JSSC.2005.843620},
  doi          = {10.1109/JSSC.2005.843620},
  timestamp    = {Mon, 14 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/TakamiyaM05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/cicc/KodamaMNT04,
  author       = {Hiroshi Kodama and
                  Masayuki Mizuno and
                  Koichi Nose and
                  Akio Tanaka},
  title        = {Frequency-hopping vernier clock generators for multiple clock domain
                  SoCs},
  booktitle    = {Proceedings of the {IEEE} 2004 Custom Integrated Circuits Conference,
                  {CICC} 2004, Orlando, FL, USA, October 2004},
  pages        = {91--94},
  publisher    = {{IEEE}},
  year         = {2004},
  url          = {https://doi.org/10.1109/CICC.2004.1358744},
  doi          = {10.1109/CICC.2004.1358744},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/cicc/KodamaMNT04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/KudohFM03,
  author       = {Yoshiharu Kudoh and
                  Muneo Fukaishi and
                  Masayuki Mizuno},
  title        = {A 0.13-{\(\mu\)}m {CMOS} 5-Gb/s 10-m 28AWG cable transceiver with
                  no-feedback-loop continuous-time post-equalizer},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {38},
  number       = {5},
  pages        = {741--746},
  year         = {2003},
  url          = {https://doi.org/10.1109/JSSC.2003.810029},
  doi          = {10.1109/JSSC.2003.810029},
  timestamp    = {Wed, 20 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/KudohFM03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/cicc/MinamiFMONIHYSN01,
  author       = {Koichiro Minami and
                  Muneo Fukaishi and
                  Masayuki Mizuno and
                  Hideaki Onishi and
                  Kenji Noda and
                  Kiyotaka Imai and
                  Tadahiko Horiuchi and
                  Hiroshi Yamaguchi and
                  Takanori Sato and
                  Kazuyuki Nakamura and
                  Masakazu Yaniashina},
  title        = {A 0.10 {\(\mu\)}m CMOS, 1.2 V, 2 GHz phase-locked loop with gain compensation
                  {VCO}},
  booktitle    = {Proceedings of the {IEEE} 2001 Custom Integrated Circuits Conference,
                  {CICC} 2001, San Diego, CA, USA, May 6-9, 2001},
  pages        = {213--216},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/CICC.2001.929758},
  doi          = {10.1109/CICC.2001.929758},
  timestamp    = {Mon, 10 Oct 2022 09:13:22 +0200},
  biburl       = {https://dblp.org/rec/conf/cicc/MinamiFMONIHYSN01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/SuzukiDINNMISFA99,
  author       = {Kazumasa Suzuki and
                  Masayuki Daito and
                  Tomoo Inoue and
                  Kouhei Nadehara and
                  Masahiro Nomura and
                  Masayuki Mizuno and
                  Tomofumi Iima and
                  Shoichiro Sato and
                  Terumi Fukuda and
                  Tomohisa Arai and
                  Ichiro Kuroda and
                  Masakazu Yamashina},
  title        = {A 2000-MOPS embedded {RISC} processor with a Rambus {DRAM} controller},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {34},
  number       = {7},
  pages        = {1010--1021},
  year         = {1999},
  url          = {https://doi.org/10.1109/4.772417},
  doi          = {10.1109/4.772417},
  timestamp    = {Tue, 05 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/SuzukiDINNMISFA99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/MizunoOHGHFSNOZ97,
  author       = {Masayuki Mizuno and
                  Yasushi Ooi and
                  Naoya Hayashi and
                  Junichi Goto and
                  Masatoshi Hozumi and
                  Koichiro Furuta and
                  Atsufumi Shibayama and
                  Yoetsu Nakazawa and
                  Osamu Ohnishi and
                  Shu{-}Yu Zhu and
                  Yutaka Yokoyama and
                  Yoichi Katayama and
                  Hideto Takano and
                  Noriyuki Miki and
                  Yuzo Senda and
                  Ichiro Tamitani and
                  Masakazu Yamashina},
  title        = {A 1.5-W single-chip {MPEG-2} MP@ML video encoder with low power motion
                  estimation and clocking},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {32},
  number       = {11},
  pages        = {1807--1816},
  year         = {1997},
  url          = {https://doi.org/10.1109/4.641704},
  doi          = {10.1109/4.641704},
  timestamp    = {Thu, 07 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/MizunoOHGHFSNOZ97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icassp/OoiOYKMYTHT97,
  author       = {Yasushi Ooi and
                  Osamu Ohnishi and
                  Yutaka Yokoyama and
                  Yoichi Katayama and
                  Masayuki Mizuno and
                  Masakazu Yamashina and
                  Hideo Takano and
                  Naoya Hayashi and
                  Ichiro Tamitani},
  title        = {An {MPEG-2} encoder architecture based on a single-chip dedicated
                  {LSI} with a control {MPU}},
  booktitle    = {1997 {IEEE} International Conference on Acoustics, Speech, and Signal
                  Processing, {ICASSP} '97, Munich, Germany, April 21-24, 1997},
  pages        = {599--602},
  publisher    = {{IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ICASSP.1997.599839},
  doi          = {10.1109/ICASSP.1997.599839},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icassp/OoiOYKMYTHT97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/limaMHY96,
  author       = {Tomofumi lima and
                  Masayuki Mizuno and
                  Tadahiko Horiuchi and
                  Masakazu Yamashina},
  title        = {Capacitance coupling immune, transient sensitive accelerator for resistive
                  interconnect signals of subquarter micron {ULSI}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {31},
  number       = {4},
  pages        = {531--536},
  year         = {1996},
  url          = {https://doi.org/10.1109/4.499729},
  doi          = {10.1109/4.499729},
  timestamp    = {Mon, 18 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/limaMHY96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/MizunoYFIAOOY96,
  author       = {Masayuki Mizuno and
                  Masakazu Yamashina and
                  Koichiro Furuta and
                  Hiroyuki Igura and
                  Hitoshi Abiko and
                  Kazuhiro Okabe and
                  Atsuki Ono and
                  Hachiro Yamada},
  title        = {A GHz {MOS} adaptive pipeline technique using {MOS} current-mode logic},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {31},
  number       = {6},
  pages        = {784--791},
  year         = {1996},
  url          = {https://doi.org/10.1109/4.509864},
  doi          = {10.1109/4.509864},
  timestamp    = {Mon, 18 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/MizunoYFIAOOY96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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