BibTeX records: Yoshiyasu Ogasawara

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@inproceedings{DBLP:conf/cdes/OgasawaraWMN09,
  author       = {Yoshiyasu Ogasawara and
                  Pulung Waskito and
                  Shinobu Miwa and
                  Hironori Nakajo},
  editor       = {Hamid R. Arabnia and
                  Ashu M. G. Solo},
  title        = {Dynamic Switching Techniques of Accessing {L1/L2} Cache on an {SMT}
                  Processor},
  booktitle    = {Proceedings of the 2009 International Conference on Computer Design,
                  {CDES} 2009, July 13-16, 2009, Las Vegas Nevada, {USA}},
  pages        = {171--177},
  publisher    = {{CSREA} Press},
  year         = {2009},
  timestamp    = {Fri, 30 Oct 2009 13:41:31 +0100},
  biburl       = {https://dblp.org/rec/conf/cdes/OgasawaraWMN09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/OgasawaraN09,
  author       = {Yoshiyasu Ogasawara and
                  Hironori Nakajo},
  editor       = {Antonio N{\'{u}}{\~{n}}ez and
                  Pedro P. Carballo},
  title        = {An Effective Replacement Strategy of Cache Memory for an {SMT} Processor},
  booktitle    = {12th Euromicro Conference on Digital System Design, Architectures,
                  Methods and Tools, {DSD} 2009, 27-29 August 2009, Patras, Greece},
  pages        = {19--25},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/DSD.2009.219},
  doi          = {10.1109/DSD.2009.219},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dsd/OgasawaraN09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ais/XuHTNOTHON07,
  author       = {Yong Xu and
                  Tatsuya Hiramatsu and
                  Kateryna Tarasenko and
                  Toyoaki Nishida and
                  Yoshiyasu Ogasawara and
                  Takashi Tajima and
                  Makoto Hatakeyama and
                  Masashi Okamoto and
                  Yukiko I. Nakano},
  title        = {A two-layered approach to communicative artifacts},
  journal      = {{AI} Soc.},
  volume       = {22},
  number       = {2},
  pages        = {185--196},
  year         = {2007},
  url          = {https://doi.org/10.1007/s00146-007-0131-4},
  doi          = {10.1007/S00146-007-0131-4},
  timestamp    = {Sat, 27 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ais/XuHTNOTHON07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdpta/WatanabeOTYN07,
  author       = {Satoshi Watanabe and
                  Yoshiyasu Ogasawara and
                  Ippei Tate and
                  Hirofumi Yano and
                  Hironori Nakajo},
  editor       = {Hamid R. Arabnia},
  title        = {Toward Parallel and Distributed Processing on High-Density Network
                  with Mobile Devices},
  booktitle    = {Proceedings of the International Conference on Parallel and Distributed
                  Processing Techniques and Applications, {PDPTA} 2007, Las Vegas, Nevada,
                  USA, June 25-28, 2007, Volume 2},
  pages        = {794--800},
  publisher    = {{CSREA} Press},
  year         = {2007},
  timestamp    = {Wed, 12 Dec 2007 09:04:34 +0100},
  biburl       = {https://dblp.org/rec/conf/pdpta/WatanabeOTYN07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/NishidaTTHOSXMTOH06,
  author       = {Toyoaki Nishida and
                  Kazunori Terada and
                  Takashi Tajima and
                  Makoto Hatakeyama and
                  Yoshiyasu Ogasawara and
                  Yasuyuki Sumi and
                  Yong Xu and
                  Yasser F. O. Mohammad and
                  Kateryna Tarasenko and
                  Taku Ohya and
                  Tatsuya Hiramatsu},
  title        = {Toward Robots as Embodied Knowledge Media},
  journal      = {{IEICE} Trans. Inf. Syst.},
  volume       = {89-D},
  number       = {6},
  pages        = {1768--1780},
  year         = {2006},
  url          = {https://doi.org/10.1093/ietisy/e89-d.6.1768},
  doi          = {10.1093/IETISY/E89-D.6.1768},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/NishidaTTHOSXMTOH06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdpta/TateOSSUAWNN06,
  author       = {Ippei Tate and
                  Yoshiyasu Ogasawara and
                  Mikiko Sato and
                  Koichi Sasada and
                  Kaname Uchikura and
                  Kazunari Asano and
                  Satoshi Watanabe and
                  Mitaro Namiki and
                  Hironori Nakajo},
  editor       = {Hamid R. Arabnia},
  title        = {A Model of Implementable {SMT} Processor on {FPGA}},
  booktitle    = {Proceedings of the International Conference on Parallel and Distributed
                  Processing Techniques and Applications {\&} Conference on Real-Time
                  Computing Systems and Applications, {PDPTA} 2006, Las Vegas, Nevada,
                  USA, June 26-29, 2006, Volume 2},
  pages        = {909--915},
  publisher    = {{CSREA} Press},
  year         = {2006},
  timestamp    = {Tue, 28 Nov 2006 14:38:48 +0100},
  biburl       = {https://dblp.org/rec/conf/pdpta/TateOSSUAWNN06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdpta/OgasawaraTWSSUANN06,
  author       = {Yoshiyasu Ogasawara and
                  Ippei Tate and
                  Satoshi Watanabe and
                  Mikiko Sato and
                  Koichi Sasada and
                  Kaname Uchikura and
                  Kazunari Asano and
                  Mitaro Namiki and
                  Hironori Nakajo},
  editor       = {Hamid R. Arabnia},
  title        = {Towards Reconfigurable Cache Memory for a Multithreaded Processor},
  booktitle    = {Proceedings of the International Conference on Parallel and Distributed
                  Processing Techniques and Applications {\&} Conference on Real-Time
                  Computing Systems and Applications, {PDPTA} 2006, Las Vegas, Nevada,
                  USA, June 26-29, 2006, Volume 2},
  pages        = {916--924},
  publisher    = {{CSREA} Press},
  year         = {2006},
  timestamp    = {Tue, 28 Nov 2006 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/pdpta/OgasawaraTWSSUANN06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/kes/OgasawaraONXN05,
  author       = {Yoshiyasu Ogasawara and
                  Masashi Okamoto and
                  Yukiko I. Nakano and
                  Yong Xu and
                  Toyoaki Nishida},
  editor       = {Rajiv Khosla and
                  Robert J. Howlett and
                  Lakhmi C. Jain},
  title        = {How to Make Robot a Robust and Interactive Communicator},
  booktitle    = {Knowledge-Based Intelligent Information and Engineering Systems, 9th
                  International Conference, {KES} 2005, Melbourne, Australia, September
                  14-16, 2005, Proceedings, Part {III}},
  series       = {Lecture Notes in Computer Science},
  volume       = {3683},
  pages        = {289--295},
  publisher    = {Springer},
  year         = {2005},
  url          = {https://doi.org/10.1007/11553939\_42},
  doi          = {10.1007/11553939\_42},
  timestamp    = {Tue, 14 May 2019 10:00:51 +0200},
  biburl       = {https://dblp.org/rec/conf/kes/OgasawaraONXN05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdpta/OgasawaraKYSSUNN05,
  author       = {Yoshiyasu Ogasawara and
                  Norito Kato and
                  Masanori Yamato and
                  Mikiko Sato and
                  Koichi Sasada and
                  Kaname Uchikura and
                  Mitaro Namiki and
                  Hironori Nakajo},
  editor       = {Hamid R. Arabnia},
  title        = {A New Model of Reconfigurable Cache for an {SMT} Processor and its
                  {FPGA} Implementation},
  booktitle    = {Proceedings of the International Conference on Parallel and Distributed
                  Processing Techniques and Applications, {PDPTA} 2005, Las Vegas, Nevada,
                  USA, June 27-30, 2005, Volume 2},
  pages        = {447--453},
  publisher    = {{CSREA} Press},
  year         = {2005},
  timestamp    = {Wed, 25 Jan 2006 09:50:17 +0100},
  biburl       = {https://dblp.org/rec/conf/pdpta/OgasawaraKYSSUNN05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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