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ORCIDBibTeX records: Pascal Sainrat
@article{DBLP:journals/tc/GruinCRCS23,
author = {Alban Gruin and
Thomas Carle and
Christine Rochange and
Hugues Cass{\'{e}} and
Pascal Sainrat},
title = {MINOTAuR: {A} Timing Predictable {RISC-V} Core Featuring Speculative
Execution},
journal = {{IEEE} Trans. Computers},
volume = {72},
number = {1},
pages = {183--195},
year = {2023},
url = {https://doi.org/10.1109/TC.2022.3200000},
doi = {10.1109/TC.2022.3200000},
timestamp = {Sun, 12 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/GruinCRCS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtns/GruinCRS23,
author = {Alban Gruin and
Thomas Carle and
Christine Rochange and
Pascal Sainrat},
title = {Enabling timing predictability in the presence of store buffers},
booktitle = {Proceedings of the 31st International Conference on Real-Time Networks
and Systems, {RTNS} 2023, Dortmund, Germany, June 7-8, 2023},
pages = {1--10},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3575757.3593653},
doi = {10.1145/3575757.3593653},
timestamp = {Fri, 02 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rtns/GruinCRS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wcet/GruinCRS23,
author = {Alban Gruin and
Thomas Carle and
Christine Rochange and
Pascal Sainrat},
editor = {Peter W{\"{a}}gemann},
title = {Validation of Processor Timing Models Using Cycle-Accurate Timing
Simulators},
booktitle = {21th International Workshop on Worst-Case Execution Time Analysis,
{WCET} 2023, July 11, 2023, Vienna, Austria},
series = {OASIcs},
volume = {114},
pages = {2:1--2:12},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik},
year = {2023},
url = {https://doi.org/10.4230/OASIcs.WCET.2023.2},
doi = {10.4230/OASICS.WCET.2023.2},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/wcet/GruinCRS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/UngererBFKMSJGZ16,
author = {Theo Ungerer and
Christian Bradatsch and
Martin Frieb and
Florian Kluge and
J{\"{o}}rg Mische and
Alexander Stegmeier and
Ralf Jahr and
Mike Gerdes and
Pavel G. Zaykov and
Lucie Matusova and
Zai Jian Jia Li and
Zlatko Petrov and
Bert B{\"{o}}ddeker and
Sebastian Kehr and
Hans Regler and
Andreas Hugl and
Christine Rochange and
Haluk Ozaktas and
Hugues Cass{\'{e}} and
Armelle Bonenfant and
Pascal Sainrat and
Nick Lay and
David George and
Ian Broster and
Eduardo Qui{\~{n}}ones and
Milos Panic and
Jaume Abella and
Carles Hern{\'{a}}ndez and
Francisco J. Cazorla and
Sascha Uhrig and
Mathias Rohde and
Arthur Pyka},
title = {Parallelizing Industrial Hard Real-Time Applications for the parMERASA
Multicore},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {15},
number = {3},
pages = {53:1--53:27},
year = {2016},
url = {https://doi.org/10.1145/2910589},
doi = {10.1145/2910589},
timestamp = {Fri, 14 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/UngererBFKMSJGZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtas/PerretMNPST16,
author = {Quentin Perret and
Pascal Maur{\`{e}}re and
Eric Noulard and
Claire Pagetti and
Pascal Sainrat and
Benoit Triquet},
title = {Temporal Isolation of Hard Real-Time Applications on Many-Core Processors},
booktitle = {2016 {IEEE} Real-Time and Embedded Technology and Applications Symposium
(RTAS), Vienna, Austria, April 11-14, 2016},
pages = {37--47},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/RTAS.2016.7461363},
doi = {10.1109/RTAS.2016.7461363},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtas/PerretMNPST16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtns/PerretMNPST16,
author = {Quentin Perret and
Pascal Maur{\`{e}}re and
{\'{E}}ric Noulard and
Claire Pagetti and
Pascal Sainrat and
Beno{\^{\i}}t Triquet},
editor = {Alain Plantec and
Frank Singhoff and
S{\'{e}}bastien Faucou and
Lu{\'{\i}}s Miguel Pinho},
title = {Mapping hard real-time applications on many-core processors},
booktitle = {Proceedings of the 24th International Conference on Real-Time Networks
and Systems, {RTNS} 2016, Brest, France, October 19-21, 2016},
pages = {235--244},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2997465.2997496},
doi = {10.1145/2997465.2997496},
timestamp = {Tue, 29 Dec 2020 18:28:06 +0100},
biburl = {https://dblp.org/rec/conf/rtns/PerretMNPST16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/daglib/0034808,
author = {Christine Rochange and
Sascha Uhrig and
Pascal Sainrat},
title = {Time-Predictable Architectures},
series = {{FOCUS} - Computer Engineering Series},
publisher = {iSTE / Wiley},
year = {2014},
url = {http://eu.wiley.com/WileyCDA/WileyTitle/productCd-1848215932.html},
isbn = {978-1-84821-593-1},
timestamp = {Wed, 04 Mar 2015 00:00:00 +0100},
biburl = {https://dblp.org/rec/books/daglib/0034808.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scopes/OzaktasRS14,
author = {Haluk Ozaktas and
Christine Rochange and
Pascal Sainrat},
editor = {Henk Corporaal and
Sander Stuijk},
title = {Minimizing the cost of synchronisations in the {WCET} of real-time
parallel programs},
booktitle = {17th International Workshop on Software and Compilers for Embedded
Systems, {SCOPES} '14, Sankt Goar, Germany, June 10-11, 2014},
pages = {98--107},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2609248.2609261},
doi = {10.1145/2609248.2609261},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/scopes/OzaktasRS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/BourgadeRS13,
author = {Roman Bourgade and
Christine Rochange and
Pascal Sainrat},
editor = {Hana Kub{\'{a}}tov{\'{a}} and
Christian Hochberger and
Martin Danek and
Bernhard Sick},
title = {Predictable Two-Level Bus Arbitration for Heterogeneous Task Sets},
booktitle = {Architecture of Computing Systems - {ARCS} 2013 - 26th International
Conference, Prague, Czech Republic, February 19-22, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7767},
pages = {341--351},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-36424-2\_29},
doi = {10.1007/978-3-642-36424-2\_29},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/arcs/BourgadeRS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/UngererBGKJMFZPBKRHROCBSBLGQPACURP13,
author = {Theo Ungerer and
Christian Bradatsch and
Mike Gerdes and
Florian Kluge and
Ralf Jahr and
J{\"{o}}rg Mische and
Jo{\~{a}}o Fernandes and
Pavel G. Zaykov and
Zlatko Petrov and
Bert B{\"{o}}ddeker and
Sebastian Kehr and
Hans Regler and
Andreas Hugl and
Christine Rochange and
Haluk Ozaktas and
Hugues Cass{\'{e}} and
Armelle Bonenfant and
Pascal Sainrat and
Ian Broster and
Nick Lay and
David George and
Eduardo Qui{\~{n}}ones and
Milos Panic and
Jaume Abella and
Francisco J. Cazorla and
Sascha Uhrig and
Mathias Rohde and
Arthur Pyka},
title = {parMERASA - Multi-core Execution of Parallelised Hard Real-Time Applications
Supporting Analysability},
booktitle = {2013 Euromicro Conference on Digital System Design, {DSD} 2013, Los
Alamitos, CA, USA, September 4-6, 2013},
pages = {363--370},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/DSD.2013.46},
doi = {10.1109/DSD.2013.46},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/UngererBGKJMFZPBKRHROCBSBLGQPACURP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wcet/OzaktasRS13,
author = {Haluk Ozaktas and
Christine Rochange and
Pascal Sainrat},
editor = {Claire Maiza},
title = {Automatic {WCET} Analysis of Real-Time Parallel Applications},
booktitle = {13th International Workshop on Worst-Case Execution Time Analysis,
{WCET} 2013, July 9, 2013, Paris, France},
series = {OASIcs},
volume = {30},
pages = {11--20},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik},
year = {2013},
url = {https://doi.org/10.4230/OASIcs.WCET.2013.11},
doi = {10.4230/OASICS.WCET.2013.11},
timestamp = {Tue, 15 Feb 2022 09:40:04 +0100},
biburl = {https://dblp.org/rec/conf/wcet/OzaktasRS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wcet/CasseBS13,
author = {Hugues Cass{\'{e}} and
Florian Bir{\'{e}}e and
Pascal Sainrat},
editor = {Claire Maiza},
title = {Multi-architecture Value Analysis for Machine Code},
booktitle = {13th International Workshop on Worst-Case Execution Time Analysis,
{WCET} 2013, July 9, 2013, Paris, France},
series = {OASIcs},
volume = {30},
pages = {42--52},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik},
year = {2013},
url = {https://doi.org/10.4230/OASIcs.WCET.2013.42},
doi = {10.4230/OASICS.WCET.2013.42},
timestamp = {Thu, 23 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/wcet/CasseBS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GerdesKURS12,
author = {Mike Gerdes and
Florian Kluge and
Theo Ungerer and
Christine Rochange and
Pascal Sainrat},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {Time analysable synchronisation techniques for parallelised hard real-time
applications},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {671--676},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176555},
doi = {10.1109/DATE.2012.6176555},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/GerdesKURS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/csse/WolfGKUMMRCSU11,
author = {Julian Wolf and
Mike Gerdes and
Florian Kluge and
Sascha Uhrig and
J{\"{o}}rg Mische and
Stefan Metzlaff and
Christine Rochange and
Hugues Cass{\'{e}} and
Pascal Sainrat and
Theo Ungerer},
title = {{RTOS} support for execution of parallelized hard real-time tasks
on the {MERASA} multi-core processor},
journal = {Comput. Syst. Sci. Eng.},
volume = {26},
number = {6},
year = {2011},
timestamp = {Tue, 28 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/csse/WolfGKUMMRCSU11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tsi/Sainrat11,
author = {Pascal Sainrat},
title = {{\'{E}}ditorial},
journal = {Tech. Sci. Informatiques},
volume = {30},
number = {9},
pages = {1033--1034},
year = {2011},
url = {http://tsi.revuesonline.com/article.jsp?articleId=16825},
timestamp = {Wed, 24 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tsi/Sainrat11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/etfa/BourgadeRS11,
author = {Roman Bourgade and
Christine Rochange and
Pascal Sainrat},
editor = {Zoubir Mammeri},
title = {Predictable bus arbitration schemes for heterogeneous time-critical
workloads running on multicore processors},
booktitle = {{IEEE} 16th Conference on Emerging Technologies {\&} Factory Automation,
{ETFA} 2011, Toulouse, France, September 5-9, 2011},
pages = {1--4},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ETFA.2011.6059179},
doi = {10.1109/ETFA.2011.6059179},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/etfa/BourgadeRS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/UngererCSBPRQGPWCUGHKMM10,
author = {Theo Ungerer and
Francisco J. Cazorla and
Pascal Sainrat and
Guillem Bernat and
Zlatko Petrov and
Christine Rochange and
Eduardo Qui{\~{n}}ones and
Mike Gerdes and
Marco Paolieri and
Julian Wolf and
Hugues Cass{\'{e}} and
Sascha Uhrig and
Irakli Guliashvili and
Michael Houston and
Florian Kluge and
Stefan Metzlaff and
J{\"{o}}rg Mische},
title = {Merasa: Multicore Execution of Hard Real-Time Applications Supporting
Analyzability},
journal = {{IEEE} Micro},
volume = {30},
number = {5},
pages = {66--75},
year = {2010},
url = {https://doi.org/10.1109/MM.2010.78},
doi = {10.1109/MM.2010.78},
timestamp = {Tue, 28 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/UngererCSBPRQGPWCUGHKMM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tsi/BarreRS10,
author = {Jonathan Barre and
Christine Rochange and
Pascal Sainrat},
title = {Architecture d'un processeur multiflot orient{\'{e}} temps-r{\'{e}}el},
journal = {Tech. Sci. Informatiques},
volume = {29},
number = {2},
pages = {157--178},
year = {2010},
url = {https://doi.org/10.3166/tsi.29.157-178},
doi = {10.3166/TSI.29.157-178},
timestamp = {Wed, 24 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tsi/BarreRS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/edcc/CasseSBM10,
author = {Hugues Cass{\'{e}} and
Pascal Sainrat and
Cl{\'{e}}ment Ballabriga and
Marianne De Michiel},
editor = {Jean{-}Charles Fabre and
Olivier Guetta and
Mario Trapp},
title = {Experimentation of {WCET} computation on both ends of automotive processor
range},
booktitle = {1st Workshop on Critical Automotive Applications: Robustness {\&}
Safety, {CARS} 2010 {(EDCC} Workshop), Valencia, Spain, 27 April 2010},
series = {{ACM} International Conference Proceeding Series},
pages = {67--70},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1772643.1772663},
doi = {10.1145/1772643.1772663},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/edcc/CasseSBM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isorc/WolfGKUMMRCSU10,
author = {Julian Wolf and
Mike Gerdes and
Florian Kluge and
Sascha Uhrig and
J{\"{o}}rg Mische and
Stefan Metzlaff and
Christine Rochange and
Hugues Cass{\'{e}} and
Pascal Sainrat and
Theo Ungerer},
title = {{RTOS} Support for Parallel Execution of Hard Real-Time Applications
on the {MERASA} Multi-core Processor},
booktitle = {13th {IEEE} International Symposium on Object/Component/Service-Oriented
Real-Time Distributed Computing, {ISORC} 2010, Carmona, Sevilla, Spain,
5-6 May 2010},
pages = {193--201},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ISORC.2010.31},
doi = {10.1109/ISORC.2010.31},
timestamp = {Tue, 28 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isorc/WolfGKUMMRCSU10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/seus/BallabrigaCRS10,
author = {Cl{\'{e}}ment Ballabriga and
Hugues Cass{\'{e}} and
Christine Rochange and
Pascal Sainrat},
editor = {Sang Lyul Min and
Robert G. Pettit IV and
Peter P. Puschner and
Theo Ungerer},
title = {{OTAWA:} An Open Toolbox for Adaptive {WCET} Analysis},
booktitle = {Software Technologies for Embedded and Ubiquitous Systems - 8th {IFIP}
{WG} 10.2 International Workshop, {SEUS} 2010, Waidhofen/Ybbs, Austria,
October 13-15, 2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6399},
pages = {35--46},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-16256-5\_6},
doi = {10.1007/978-3-642-16256-5\_6},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/seus/BallabrigaCRS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wcet/RochangeBSGWUPM10,
author = {Christine Rochange and
Armelle Bonenfant and
Pascal Sainrat and
Mike Gerdes and
Julian Wolf and
Theo Ungerer and
Zlatko Petrov and
Frantisek Mikulu},
editor = {Bj{\"{o}}rn Lisper},
title = {{WCET} Analysis of a Parallel 3D Multigrid Solver Executed on the
{MERASA} Multi-Core},
booktitle = {10th International Workshop on Worst-Case Execution Time Analysis,
{WCET} 2010, July 6, 2010, Brussels, Belgium},
series = {OASIcs},
volume = {15},
pages = {90--100},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany},
year = {2010},
url = {https://doi.org/10.4230/OASIcs.WCET.2010.90},
doi = {10.4230/OASICS.WCET.2010.90},
timestamp = {Tue, 28 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/wcet/RochangeBSGWUPM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/thipeac/RochangeS09,
author = {Christine Rochange and
Pascal Sainrat},
title = {A Context-Parameterized Model for Static Analysis of Execution Times},
journal = {Trans. High Perform. Embed. Archit. Compil.},
volume = {2},
pages = {222--241},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-00904-4\_12},
doi = {10.1007/978-3-642-00904-4\_12},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/thipeac/RochangeS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/BarreRS08,
author = {Jonathan Barre and
Christine Rochange and
Pascal Sainrat},
editor = {Uwe Brinkschulte and
Theo Ungerer and
Christian Hochberger and
Rainer G. Spallek},
title = {A Predictable Simultaneous Multithreading Scheme for Hard Real-Time},
booktitle = {Architecture of Computing Systems - {ARCS} 2008, 21st International
Conference, Dresden, Germany, February 25-28, 2008, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4934},
pages = {161--172},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-78153-0\_13},
doi = {10.1007/978-3-540-78153-0\_13},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/arcs/BarreRS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtcsa/MichielBCS08,
author = {Marianne De Michiel and
Armelle Bonenfant and
Hugues Cass{\'{e}} and
Pascal Sainrat},
title = {Static Loop Bound Analysis of {C} Programs Based on Flow Analysis
and Abstract Interpretation},
booktitle = {The Fourteenth {IEEE} Internationl Conference on Embedded and Real-Time
Computing Systems and Applications, {RTCSA} 2008, Kaohisung, Taiwan,
25-27 August 2008, Proceedings},
pages = {161--166},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RTCSA.2008.53},
doi = {10.1109/RTCSA.2008.53},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtcsa/MichielBCS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sac/BallabrigaCS08,
author = {Cl{\'{e}}ment Ballabriga and
Hugues Cass{\'{e}} and
Pascal Sainrat},
editor = {Roger L. Wainwright and
Hisham Haddad},
title = {An improved approach for set-associative instruction cache partial
analysis},
booktitle = {Proceedings of the 2008 {ACM} Symposium on Applied Computing (SAC),
Fortaleza, Ceara, Brazil, March 16-20, 2008},
pages = {360--367},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1363686.1363778},
doi = {10.1145/1363686.1363778},
timestamp = {Tue, 06 Nov 2018 11:06:48 +0100},
biburl = {https://dblp.org/rec/conf/sac/BallabrigaCS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/BarreRS08,
author = {Jonathan Barre and
Christine Rochange and
Pascal Sainrat},
editor = {Walid A. Najjar and
Holger Blume},
title = {An architecture for the simultaneous execution of hard real-time threads},
booktitle = {Proceedings of the 2008 International Conference on Embedded Computer
Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2008),
Samos, Greece, July 21-24, 2008},
pages = {18--24},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICSAMOS.2008.4664842},
doi = {10.1109/ICSAMOS.2008.4664842},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/BarreRS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sies/NemerCSB08,
author = {Fadia Nemer and
Hugues Cass{\'{e}} and
Pascal Sainrat and
Jean Paul Bahsoun},
title = {Inter-task {WCET} computation for a-way instruction caches},
booktitle = {{IEEE} Third International Symposium on Industrial Embedded Systems,
{SIES} 2008, Montpellier / La Grande Motte, France, June 11-13, 2008},
pages = {169--176},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/SIES.2008.4577696},
doi = {10.1109/SIES.2008.4577696},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/sies/NemerCSB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wcet/HolstiGBBBBCCKKKLMMPRRSS08,
author = {Niklas Holsti and
Jan Gustafsson and
Guillem Bernat and
Cl{\'{e}}ment Ballabriga and
Armelle Bonenfant and
Roman Bourgade and
Hugues Cass{\'{e}} and
Daniel Cordes and
Albrecht Kadlec and
Raimund Kirner and
Jens Knoop and
Paul Lokuciejewski and
Nicholas Merriam and
Marianne De Michiel and
Adrian Prantl and
Bernhard Rieder and
Christine Rochange and
Pascal Sainrat and
Markus Schordan},
editor = {Raimund Kirner},
title = {{WCET} 2008 - Report from the Tool Challenge 2008 -- 8th Intl. Workshop
on Worst-Case Execution Time {(WCET)} Analysis},
booktitle = {8th Intl. Workshop on Worst-Case Execution Time {(WCET)} Analysis,
Prague, Czech Republic, July 1, 2008},
series = {OASIcs},
volume = {8},
publisher = {Internationales Begegnungs- und Forschungszentrum fuer Informatik
(IBFI), Schloss Dagstuhl, Germany},
year = {2008},
url = {http://drops.dagstuhl.de/opus/volltexte/2008/1663},
timestamp = {Tue, 15 Feb 2022 09:40:04 +0100},
biburl = {https://dblp.org/rec/conf/wcet/HolstiGBBBBCCKKKLMMPRRSS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/thipeac/BosschereLMNOPRSSST07,
author = {Koen De Bosschere and
Wayne Luk and
Xavier Martorell and
Nacho Navarro and
Michael F. P. O'Boyle and
Dionisios N. Pnevmatikatos and
Alex Ram{\'{\i}}rez and
Pascal Sainrat and
Andr{\'{e}} Seznec and
Per Stenstr{\"{o}}m and
Olivier Temam},
title = {High-Performance Embedded Architecture and Compilation Roadmap},
journal = {Trans. High Perform. Embed. Archit. Compil.},
volume = {1},
pages = {5--29},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-71528-3\_2},
doi = {10.1007/978-3-540-71528-3\_2},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/thipeac/BosschereLMNOPRSSST07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sies/NemerCSA07,
author = {Fadia Nemer and
Hugues Cass{\'{e}} and
Pascal Sainrat and
Ali Awada},
title = {Improving the Worst-Case Execution Time Accuracy by Inter-Task Instruction
Cache Analysis},
booktitle = {{IEEE} Second International Symposium on Industrial Embedded Systems,
{SIES} 2007, Hotel Costa da Caparica, Lisbon, Portugal, July 4-6,
2007},
pages = {25--32},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/SIES.2007.4297313},
doi = {10.1109/SIES.2007.4297313},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/sies/NemerCSA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2007,
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
publisher = {{ACM}},
year = {2007},
timestamp = {Fri, 23 Nov 2007 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2007.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtcsa/BarreLRS06,
author = {Jonathan Barre and
C{\'{e}}dric Landet and
Christine Rochange and
Pascal Sainrat},
title = {Modeling Instruction-Level Parallelism for {WCET} Evaluation},
booktitle = {12th {IEEE} Conference on Embedded and Real-Time Computing Systems
and Applications {(RTCSA} 2006), 16-18 August 2006, Sydney, Australia},
pages = {61--67},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RTCSA.2006.44},
doi = {10.1109/RTCSA.2006.44},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtcsa/BarreLRS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wcet/KebbalS06,
author = {Djemai Kebbal and
Pascal Sainrat},
editor = {Frank Mueller},
title = {Combining Symbolic Execution and Path Enumeration in Worst-Case Execution
Time Analysis},
booktitle = {6th Intl. Workshop on Worst-Case Execution Time {(WCET)} Analysis,
July 4, 2006, Dresden, Germany},
series = {OASIcs},
volume = {4},
publisher = {Internationales Begegnungs- und Forschungszentrum fuer Informatik
(IBFI), Schloss Dagstuhl, Germany},
year = {2006},
url = {http://drops.dagstuhl.de/opus/volltexte/2006/675},
timestamp = {Tue, 15 Feb 2022 09:40:04 +0100},
biburl = {https://dblp.org/rec/conf/wcet/KebbalS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wcet/NemerCSBM06,
author = {Fadia Nemer and
Hugues Cass{\'{e}} and
Pascal Sainrat and
Jean Paul Bahsoun and
Marianne De Michiel},
editor = {Frank Mueller},
title = {PapaBench: a Free Real-Time Benchmark},
booktitle = {6th Intl. Workshop on Worst-Case Execution Time {(WCET)} Analysis,
July 4, 2006, Dresden, Germany},
series = {OASIcs},
volume = {4},
publisher = {Internationales Begegnungs- und Forschungszentrum fuer Informatik
(IBFI), Schloss Dagstuhl, Germany},
year = {2006},
url = {http://drops.dagstuhl.de/opus/volltexte/2006/678},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/wcet/NemerCSBM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tsi/RochangeS05,
author = {Christine Rochange and
Pascal Sainrat},
title = {R{\'{e}}gulation du flot d'instructions pour des processeurs
orient{\'{e}}s temps r{\'{e}}el},
journal = {Tech. Sci. Informatiques},
volume = {24},
number = {8},
pages = {963--989},
year = {2005},
url = {https://doi.org/10.3166/tsi.24.963-989},
doi = {10.3166/TSI.24.963-989},
timestamp = {Wed, 24 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tsi/RochangeS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/RochangeS05,
author = {Christine Rochange and
Pascal Sainrat},
editor = {Nader Bagherzadeh and
Mateo Valero and
Alex Ram{\'{\i}}rez},
title = {A time-predictable execution mode for superscalar pipelines with instruction
prescheduling},
booktitle = {Proceedings of the Second Conference on Computing Frontiers, 2005,
Ischia, Italy, May 4-6, 2005},
pages = {307--314},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1062261.1062312},
doi = {10.1145/1062261.1062312},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cf/RochangeS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtcsa/BurguiereRS05,
author = {Claire Burgui{\`{e}}re and
Christine Rochange and
Pascal Sainrat},
title = {A Case for Static Branch Prediction in Real-Time Systems},
booktitle = {11th {IEEE} International Conference on Embedded and Real-Time Computing
Systems and Applications {(RTCSA} 2005), 17-19 August 2005, Hong Kong,
China},
pages = {33--38},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RTCSA.2005.5},
doi = {10.1109/RTCSA.2005.5},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtcsa/BurguiereRS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tsi/ColinPRS03,
author = {Antoine Colin and
Isabelle Puaut and
Christine Rochange and
Pascal Sainrat},
title = {Calcul de majorants de pire temps d'ex{\'{e}}cution : {\'{e}}tat
de l'art},
journal = {Tech. Sci. Informatiques},
volume = {22},
number = {5},
pages = {651--677},
year = {2003},
url = {https://doi.org/10.3166/tsi.22.651-677},
doi = {10.3166/TSI.22.651-677},
timestamp = {Wed, 24 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tsi/ColinPRS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tsi/HaquinRRS03,
author = {Thierry Haquin and
Philippe Reynes and
Christine Rochange and
Pascal Sainrat},
title = {Optimisations du chargement des instructions},
journal = {Tech. Sci. Informatiques},
volume = {22},
number = {6},
pages = {689--711},
year = {2003},
url = {https://doi.org/10.3166/tsi.22.689-711},
doi = {10.3166/TSI.22.689-711},
timestamp = {Wed, 24 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tsi/HaquinRRS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wcet/RochangeS03,
author = {Christine Rochange and
Pascal Sainrat},
editor = {Jan Gustafsson},
title = {Towards Designing WCET-Predictable Processors},
booktitle = {Proceedings of the 3rd International Workshop on Worst-Case Execution
Time Analysis, {WCET} 2003 - a Satellite Event to {ECRTS} 2003, Polytechnic
Institute of Porto, Portugal, July 1, 2003},
volume = {{MDH-MRTC-116/2003-1-SE}},
pages = {87--90},
publisher = {Department of Computer Science and Engineering, M{\"{a}}lardalen
University, Box 883, 721 23 V{\"{a}}ster{\aa}s, Sweden},
year = {2003},
timestamp = {Tue, 19 Apr 2005 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/wcet/RochangeS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tsi/CasseFRS02,
author = {Hugues Cass{\'{e}} and
Louis F{\'{e}}raud and
Christine Rochange and
Pascal Sainrat},
title = {Une approche pour r{\'{e}}duire la complexit{\'{e}} du flot
de contr{\^{o}}le dans les programmes {C}},
journal = {Tech. Sci. Informatiques},
volume = {21},
number = {7},
pages = {1009--1032},
year = {2002},
url = {http://tsi.revuesonline.com/article.jsp?articleId=3831},
timestamp = {Tue, 03 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tsi/CasseFRS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/sp/00/LitaizeMRS00,
author = {Daniel Litaize and
Abdelaziz Mzoughi and
Christine Rochange and
Pascal Sainrat},
editor = {Jacek Blazewicz and
Klaus Ecker and
Brigitte Plateau and
Denis Trystram},
title = {Architecture of Parallel and Distributed Systems},
booktitle = {Handbook on Parallel and Distributed Processing},
series = {International Handbooks on Information Systems},
pages = {166--227},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/978-3-662-04303-5\_4},
doi = {10.1007/978-3-662-04303-5\_4},
timestamp = {Mon, 24 Oct 2022 16:55:02 +0200},
biburl = {https://dblp.org/rec/books/sp/00/LitaizeMRS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/CasseFRS99,
author = {Hugues Cass{\'{e}} and
Louis F{\'{e}}raud and
Christine Rochange and
Pascal Sainrat},
title = {Using the abstract interpretation technique for static pointer analysis},
journal = {{SIGARCH} Comput. Archit. News},
volume = {27},
number = {1},
pages = {47--50},
year = {1999},
url = {https://doi.org/10.1145/309758.309780},
doi = {10.1145/309758.309780},
timestamp = {Tue, 03 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/CasseFRS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/SainratV99,
author = {Pascal Sainrat and
Mateo Valero},
editor = {Patrick Amestoy and
Philippe Berger and
Michel J. Dayd{\'{e}} and
Iain S. Duff and
Val{\'{e}}rie Frayss{\'{e}} and
Luc Giraud and
Daniel Ruiz},
title = {Instruction-Level Parallelism and Uniprocessor Architecture - Introduction},
booktitle = {Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference,
Toulouse, France, August 31 - September 3, 1999, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1685},
pages = {1241--1242},
publisher = {Springer},
year = {1999},
url = {https://doi.org/10.1007/3-540-48311-X\_175},
doi = {10.1007/3-540-48311-X\_175},
timestamp = {Tue, 04 Jun 2019 14:36:07 +0200},
biburl = {https://dblp.org/rec/conf/europar/SainratV99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/SeznecJSM96,
author = {Andr{\'{e}} Seznec and
St{\'{e}}phan Jourdan and
Pascal Sainrat and
Pierre Michaud},
editor = {Bill Dally and
Susan J. Eggers},
title = {Multiple-Block Ahead Branch Predictors},
booktitle = {{ASPLOS-VII} Proceedings - Seventh International Conference on Architectural
Support for Programming Languages and Operating Systems, Cambridge,
Massachusetts, USA, October 1-5, 1996},
pages = {116--127},
publisher = {{ACM} Press},
year = {1996},
url = {https://doi.org/10.1145/237090.237169},
doi = {10.1145/237090.237169},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/SeznecJSM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/JourdanSL95,
author = {St{\'{e}}phan Jourdan and
Pascal Sainrat and
Daniel Litaize},
editor = {David A. Patterson},
title = {Exploring Configurations of Functional Units in an Out-of-Order Superscalar
Processor},
booktitle = {Proceedings of the 22nd Annual International Symposium on Computer
Architecture, {ISCA} '95, Santa Margherita Ligure, Italy, June 22-24,
1995},
pages = {117--125},
publisher = {{ACM}},
year = {1995},
url = {https://doi.org/10.1145/223982.224366},
doi = {10.1145/223982.224366},
timestamp = {Thu, 13 Apr 2023 19:55:42 +0200},
biburl = {https://dblp.org/rec/conf/isca/JourdanSL95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/JourdanSL95,
author = {St{\'{e}}phan Jourdan and
Pascal Sainrat and
Daniel Litaize},
editor = {Trevor N. Mudge and
Kemal Ebcioglu},
title = {An investigation of the performance of various instruction-issue buffer
topologies},
booktitle = {Proceedings of the 28th Annual International Symposium on Microarchitecture,
Ann Arbor, Michigan, USA, November 29 - December 1, 1995},
pages = {279--284},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/MICRO.1995.476837},
doi = {10.1109/MICRO.1995.476837},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/JourdanSL95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/parle/RochangeSL93,
author = {Christine Rochange and
Pascal Sainrat and
Daniel Litaize},
editor = {Arndt Bode and
Mike Reeve and
Gottfried Wolf},
title = {Performance of {M3S} for the {SOR} algorithm},
booktitle = {{PARLE} '93, Parallel Architectures and Languages Europe, 5th International
{PARLE} Conference, Munich, Germany, June 14-17, 1993, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {694},
pages = {676--679},
publisher = {Springer},
year = {1993},
url = {https://doi.org/10.1007/3-540-56891-3\_57},
doi = {10.1007/3-540-56891-3\_57},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/parle/RochangeSL93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LitaizeMRS92,
author = {Daniel Litaize and
Abdelaziz Mzoughi and
Christine Rochange and
Pascal Sainrat},
editor = {Allan Gottlieb},
title = {Towards a Shared-Memory Massively Parallel Multiprocessor},
booktitle = {Proceedings of the 19th Annual International Symposium on Computer
Architecture. Gold Coast, Australia, May 1992},
pages = {70--79},
publisher = {{ACM}},
year = {1992},
url = {https://doi.org/10.1145/139669.139704},
doi = {10.1145/139669.139704},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/LitaizeMRS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/SainratMRL92,
author = {Pascal Sainrat and
Abdelaziz Mzoughi and
Christine Rochange and
Daniel Litaize},
editor = {Robert Werner},
title = {The Design of the {M3S:} {A} Multiported Shared-Memory Multiprocessor},
booktitle = {Proceedings Supercomputing '92, Minneapolis, MN, USA, November 16-20,
1992},
pages = {326--335},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/SUPERC.1992.236670},
doi = {10.1109/SUPERC.1992.236670},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/SainratMRL92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/LitaizeHLMS89,
author = {Daniel Litaize and
Omar Hammami and
Mustapha Lalam and
Abdelaziz Mzoughi and
Pascal Sainrat},
title = {Multiprocessors with a serial multiport memory and a pseudo crossbar
of serial links used s a processor-memeory switch},
journal = {{SIGARCH} Comput. Archit. News},
volume = {17},
number = {6},
pages = {8--21},
year = {1989},
url = {https://doi.org/10.1145/77254.77255},
doi = {10.1145/77254.77255},
timestamp = {Thu, 08 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/LitaizeHLMS89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/parle/LitaizeEHLMSS89,
author = {Daniel Litaize and
Fatimazhra Elkhlifi and
Omar Hammami and
Mustapha Lalam and
Abdelaziz Mzoughi and
Pascal Sainrat and
Jean{-}Claude Salinier},
editor = {Eddy Odijk and
Martin Rem and
Jean{-}Claude Syre},
title = {Serial Multiport Memory Multiprocessors},
booktitle = {{PARLE} '89: Parallel Architectures and Languages Europe, Volume {I:}
Parallel Architectures, Eindhoven, The Netherlands, June 12-16, 1989,
Proceedings},
series = {Lecture Notes in Computer Science},
volume = {365},
pages = {34--51},
publisher = {Springer},
year = {1989},
url = {https://doi.org/10.1007/3540512845\_31},
doi = {10.1007/3540512845\_31},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/parle/LitaizeEHLMSS89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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