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ORCIDBibTeX records: Andreas Steininger
@article{DBLP:journals/tcasI/MaierSN23,
author = {J{\"{u}}rgen Maier and
Andreas Steininger and
Robert Najvirt},
title = {The Hidden Behavior of a D-Latch},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {70},
number = {4},
pages = {1660--1670},
year = {2023},
url = {https://doi.org/10.1109/TCSI.2023.3237283},
doi = {10.1109/TCSI.2023.3237283},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasI/MaierSN23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/TabassamSNH23,
author = {Zaheer Tabassam and
Andreas Steininger and
Robert Najvirt and
Florian Huemer},
title = {{\(\zeta\)}: {A} Novel Approach for Mitigating Single Event Transient
Effects in Quasi Delay Insensitive Logic},
booktitle = {28th {IEEE} International Symposium on Asynchronous Circuits and Systems,
{ASYNC} 2023, Beijing, China, July 16-19, 2023},
pages = {48--57},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASYNC58294.2023.10239589},
doi = {10.1109/ASYNC58294.2023.10239589},
timestamp = {Fri, 15 Sep 2023 10:05:30 +0200},
biburl = {https://dblp.org/rec/conf/async/TabassamSNH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/TabassamS23,
author = {Zaheer Tabassam and
Andreas Steininger},
title = {Towards Resilient Quasi Delay Insensitive Conditional Control Elements},
booktitle = {26th Euromicro Conference on Digital System Design, {DSD} 2023, Golem,
Albania, September 6-8, 2023},
pages = {206--213},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DSD60849.2023.00038},
doi = {10.1109/DSD60849.2023.00038},
timestamp = {Tue, 02 Apr 2024 21:06:08 +0200},
biburl = {https://dblp.org/rec/conf/dsd/TabassamS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/TabassamS23,
author = {Zaheer Tabassam and
Andreas Steininger},
title = {{SET} Effects on Quasi Delay Insensitive and Synchronous Circuits},
booktitle = {{IEEE} European Test Symposium, {ETS} 2023, Venezia, Italy, May 22-26,
2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ETS56758.2023.10173866},
doi = {10.1109/ETS56758.2023.10173866},
timestamp = {Fri, 14 Jul 2023 22:01:39 +0200},
biburl = {https://dblp.org/rec/conf/ets/TabassamS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/formats/ShehabyFS23,
author = {Raghda El Shehaby and
Matthias F{\"{u}}gger and
Andreas Steininger},
editor = {Laure Petrucci and
Jeremy Sproston},
title = {On the Susceptibility of {QDI} Circuits to Transient Faults},
booktitle = {Formal Modeling and Analysis of Timed Systems - 21st International
Conference, {FORMATS} 2023, Antwerp, Belgium, September 19-21, 2023,
Proceedings},
series = {Lecture Notes in Computer Science},
volume = {14138},
pages = {69--85},
publisher = {Springer},
year = {2023},
url = {https://doi.org/10.1007/978-3-031-42626-1\_5},
doi = {10.1007/978-3-031-42626-1\_5},
timestamp = {Sun, 24 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/formats/ShehabyFS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2303-06486,
author = {Mahya Morid Ahmadi and
Faiq Khalid and
Radha Vaidya and
Florian Kriebel and
Andreas Steininger and
Muhammad Shafique},
title = {{SHIELD:} An Adaptive and Lightweight Defense against the Remote Power
Side-Channel Attacks on Multi-tenant FPGAs},
journal = {CoRR},
volume = {abs/2303.06486},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2303.06486},
doi = {10.48550/ARXIV.2303.06486},
eprinttype = {arXiv},
eprint = {2303.06486},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2303-06486.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2303-08035,
author = {Alessio Colucci and
Andreas Steininger and
Muhammad Shafique},
title = {ISimDL: Importance Sampling-Driven Acceleration of Fault Injection
Simulations for Evaluating the Robustness of Deep Learning},
journal = {CoRR},
volume = {abs/2303.08035},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2303.08035},
doi = {10.48550/ARXIV.2303.08035},
eprinttype = {arXiv},
eprint = {2303.08035},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2303-08035.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2303-14106,
author = {Raghda El Shehaby and
Matthias F{\"{u}}gger and
Andreas Steininger},
title = {On the Susceptibility of {QDI} Circuits to Transient Faults},
journal = {CoRR},
volume = {abs/2303.14106},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2303.14106},
doi = {10.48550/ARXIV.2303.14106},
eprinttype = {arXiv},
eprint = {2303.14106},
timestamp = {Fri, 14 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2303-14106.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/MaierHS22,
author = {J{\"{u}}rgen Maier and
Christian Hartl{-}Nesic and
Andreas Steininger},
title = {Simulation-Based Approaches for Comprehensive Schmitt-Trigger Analyses},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {69},
number = {3},
pages = {1013--1026},
year = {2022},
url = {https://doi.org/10.1109/TCSI.2021.3130349},
doi = {10.1109/TCSI.2021.3130349},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasI/MaierHS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/TabassamNS22,
author = {Zaheer Tabassam and
Syed Rameez Naqvi and
Andreas Steininger},
title = {A{\(\mathrm{\mu}\)}FLIPS: An Asynchronous Microprocessor With FLexIbly-timed
Pipeline Stages},
booktitle = {25th International Symposium on Design and Diagnostics of Electronic
Circuits and Systems, {DDECS} 2022, Prague, Czech Republic, April
6-8, 2022},
pages = {32--37},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DDECS54261.2022.9770113},
doi = {10.1109/DDECS54261.2022.9770113},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/TabassamNS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/HuemerNS22,
author = {Florian Huemer and
Robert Najvirt and
Andreas Steininger},
title = {On SAT-Based Model Checking of Speed-Independent Circuits},
booktitle = {25th International Symposium on Design and Diagnostics of Electronic
Circuits and Systems, {DDECS} 2022, Prague, Czech Republic, April
6-8, 2022},
pages = {100--105},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DDECS54261.2022.9770165},
doi = {10.1109/DDECS54261.2022.9770165},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/HuemerNS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/ShehabyS22,
author = {Raghda El Shehaby and
Andreas Steininger},
editor = {Luca Cassano and
Sreejit Chakravarty and
Alberto Bosio},
title = {Study and Comparison of {QDI} Pipeline Components' Sensitivity to
Permanent Faults},
booktitle = {{IEEE} International Symposium on Defect and Fault Tolerance in {VLSI}
and Nanotechnology Systems, {DFT} 2022, Austin, TX, USA, October 19-21,
2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DFT56152.2022.9962353},
doi = {10.1109/DFT56152.2022.9962353},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dft/ShehabyS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/TabassamS22,
author = {Zaheer Tabassam and
Andreas Steininger},
editor = {Luca Cassano and
Sreejit Chakravarty and
Alberto Bosio},
title = {{SET} Hardened Derivatives of {QDI} Buffer Template},
booktitle = {{IEEE} International Symposium on Defect and Fault Tolerance in {VLSI}
and Nanotechnology Systems, {DFT} 2022, Austin, TX, USA, October 19-21,
2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DFT56152.2022.9962344},
doi = {10.1109/DFT56152.2022.9962344},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dft/TabassamS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/TabassamS22,
author = {Zaheer Tabassam and
Andreas Steininger},
title = {Towards Resilient {QDI} Pipeline Implementations},
booktitle = {25th Euromicro Conference on Digital System Design, {DSD} 2022, Maspalomas,
Spain, August 31 - Sept. 2, 2022},
pages = {657--664},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DSD57027.2022.00093},
doi = {10.1109/DSD57027.2022.00093},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/TabassamS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iros/ColucciS022,
author = {Alessio Colucci and
Andreas Steininger and
Muhammad Shafique},
title = {enpheeph: {A} Fault Injection Framework for Spiking and Compressed
Deep Neural Networks},
booktitle = {{IEEE/RSJ} International Conference on Intelligent Robots and Systems,
{IROS} 2022, Kyoto, Japan, October 23-27, 2022},
pages = {5155--5162},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/IROS47612.2022.9982181},
doi = {10.1109/IROS47612.2022.9982181},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iros/ColucciS022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2208-00328,
author = {Alessio Colucci and
Andreas Steininger and
Muhammad Shafique},
title = {enpheeph: {A} Fault Injection Framework for Spiking and Compressed
Deep Neural Networks},
journal = {CoRR},
volume = {abs/2208.00328},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2208.00328},
doi = {10.48550/ARXIV.2208.00328},
eprinttype = {arXiv},
eprint = {2208.00328},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2208-00328.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2212-10289,
author = {Bharath Srinivas Prabakaran and
Felix Fasching and
Juri Schreib and
Andreas Steininger and
Muhammad Shafique},
title = {{ATLAS:} An IoT Architecture and Secure Open-source Networking Stack
for Anonymous Localization and Tracking Using Smartphones and Bluetooth
Beacons},
journal = {CoRR},
volume = {abs/2212.10289},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2212.10289},
doi = {10.48550/ARXIV.2212.10289},
eprinttype = {arXiv},
eprint = {2212.10289},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2212-10289.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/BehalHNST21,
author = {Patrick Behal and
Florian Huemer and
Robert Najvirt and
Andreas Steininger and
Zaheer Tabassam},
title = {Towards Explaining the Fault Sensitivity of Different {QDI} Pipeline
Styles},
booktitle = {27th {IEEE} International Symposium on Asynchronous Circuits and Systems,
{ASYNC} 2021, Beijing, China, September 7-10, 2021},
pages = {25--33},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASYNC48570.2021.00012},
doi = {10.1109/ASYNC48570.2021.00012},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/async/BehalHNST21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/ShehabyS21,
author = {Raghda El Shehaby and
Andreas Steininger},
editor = {Muhammad Shafique and
Andreas Steininger and
Luk{\'{a}}s Sekanina and
Milos Krstic and
Goran Stojanovic and
Vojtech Mrazek},
title = {Analysis of State Corruption caused by Permanent Faults in WCHB-based
Quasi Delay-Insensitive Pipelines},
booktitle = {24th International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2021, Vienna, Austria, April 7-9,
2021},
pages = {63--68},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DDECS52668.2021.9417024},
doi = {10.1109/DDECS52668.2021.9417024},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/ShehabyS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/BehalHNS21,
author = {Patrick Behal and
Florian Huemer and
Robert Najvirt and
Andreas Steininger},
editor = {Francesco Leporati and
Salvatore Vitabile and
Amund Skavhaug},
title = {An Automated Setup for Large-Scale Simulation-Based Fault-Injection
Experiments on Asynchronous Digital Circuits},
booktitle = {24th Euromicro Conference on Digital System Design, {DSD} 2021, Virtual
Event / Palermo, Sicily, Italy, September 1-3, 2021},
pages = {541--548},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DSD53832.2021.00087},
doi = {10.1109/DSD53832.2021.00087},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/BehalHNS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ddecs/2021,
editor = {Muhammad Shafique and
Andreas Steininger and
Luk{\'{a}}s Sekanina and
Milos Krstic and
Goran Stojanovic and
Vojtech Mrazek},
title = {24th International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2021, Vienna, Austria, April 7-9,
2021},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DDECS52668.2021},
doi = {10.1109/DDECS52668.2021},
isbn = {978-1-6654-3595-6},
timestamp = {Tue, 04 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/2021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/HuemerS20,
author = {Florian Huemer and
Andreas Steininger},
title = {Timing Domain Crossing using Muller Pipelines},
booktitle = {26th {IEEE} International Symposium on Asynchronous Circuits and Systems,
{ASYNC} 2020, Salt Lake City, UT, USA, May 17-20, 2020},
pages = {44--53},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASYNC49171.2020.00014},
doi = {10.1109/ASYNC49171.2020.00014},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/async/HuemerS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/DuerS20,
author = {Wolfgang Duer and
Andreas Steininger},
title = {Merging Redundant Crystal Oscillators into a Fault-Tolerant Clock},
booktitle = {23rd International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2020, Novi Sad, Serbia, April 22-24,
2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DDECS50862.2020.9095577},
doi = {10.1109/DDECS50862.2020.9095577},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/DuerS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ShehabyS20,
author = {Raghda El Shehaby and
Andreas Steininger},
title = {On the Effects of Permanent Faults in {QDI} Circuits - {A} Quantitative
Perspective},
booktitle = {38th {IEEE} International Conference on Computer Design, {ICCD} 2020,
Hartford, CT, USA, October 18-21, 2020},
pages = {441--444},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ICCD50377.2020.00080},
doi = {10.1109/ICCD50377.2020.00080},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccd/ShehabyS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2006-04577,
author = {J{\"{u}}rgen Maier and
Andreas Steininger},
title = {Online Test Vector Insertion: {A} Concurrent Built-In Self-Testing
{(CBIST)} Approach for Asynchronous Logic},
journal = {CoRR},
volume = {abs/2006.04577},
year = {2020},
url = {https://arxiv.org/abs/2006.04577},
eprinttype = {arXiv},
eprint = {2006.04577},
timestamp = {Fri, 12 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2006-04577.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2006-08319,
author = {Andreas Steininger and
J{\"{u}}rgen Maier and
Robert Najvirt},
title = {The Metastable Behavior of a Schmitt-Trigger},
journal = {CoRR},
volume = {abs/2006.08319},
year = {2020},
url = {https://arxiv.org/abs/2006.08319},
eprinttype = {arXiv},
eprint = {2006.08319},
timestamp = {Wed, 17 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2006-08319.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2006-08415,
author = {Andreas Steininger and
Robert Najvirt and
J{\"{u}}rgen Maier},
title = {Does Cascading Schmitt-Trigger Stages Improve the Metastable Behavior?},
journal = {CoRR},
volume = {abs/2006.08415},
year = {2020},
url = {https://arxiv.org/abs/2006.08415},
eprinttype = {arXiv},
eprint = {2006.08415},
timestamp = {Wed, 17 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2006-08415.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2006-14001,
author = {J{\"{u}}rgen Maier and
Andreas Steininger},
title = {Efficient Metastability Characterization for Schmitt-Triggers},
journal = {CoRR},
volume = {abs/2006.14001},
year = {2020},
url = {https://arxiv.org/abs/2006.14001},
eprinttype = {arXiv},
eprint = {2006.14001},
timestamp = {Wed, 01 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2006-14001.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/PolzerHS19,
author = {Thomas Polzer and
Florian Huemer and
Andreas Steininger},
title = {An Experimental Study of Metastability-Induced Glitching Behavior},
journal = {J. Circuits Syst. Comput.},
volume = {28},
number = {Supplement-1},
pages = {1940006:1--1940006:21},
year = {2019},
url = {https://doi.org/10.1142/S0218126619400061},
doi = {10.1142/S0218126619400061},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jcsc/PolzerHS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/0002S19,
author = {J{\"{u}}rgen Maier and
Andreas Steininger},
title = {Efficient Metastability Characterization for Schmitt-Triggers},
booktitle = {25th {IEEE} International Symposium on Asynchronous Circuits and Systems,
{ASYNC} 2019, Hirosaki, Japan, May 12-15, 2019},
pages = {124--133},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASYNC.2019.00024},
doi = {10.1109/ASYNC.2019.00024},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/async/0002S19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecrts/PaverdVBSASVSH19,
author = {Andrew Paverd and
Marcus V{\"{o}}lp and
Ferdinand Brasser and
Matthias Schunter and
N. Asokan and
Ahmad{-}Reza Sadeghi and
Paulo Jorge Esteves Ver{\'{\i}}ssimo and
Andreas Steininger and
Thorsten Holz},
editor = {Mikael Asplund and
Michael Paulitsch},
title = {Sustainable Security {\&} Safety: Challenges and Opportunities},
booktitle = {4th International Workshop on Security and Dependability of Critical
Embedded Real-Time Systems, CERTS@ECRTS 2019, July 9, 2019, Stuttgart,
Germany},
series = {OASIcs},
volume = {73},
pages = {4:1--4:13},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik},
year = {2019},
url = {https://doi.org/10.4230/OASIcs.CERTS.2019.4},
doi = {10.4230/OASICS.CERTS.2019.4},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ecrts/PaverdVBSASVSH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/StamenkovicBCNP19,
author = {Zoran Stamenkovic and
Alberto Bosio and
Gy{\"{o}}rgy Cserey and
Ondrej Nov{\'{a}}k and
Witold A. Pleskacz and
Luk{\'{a}}s Sekanina and
Andreas Steininger and
Goran Stojanovic and
Viera Stopjakov{\'{a}}},
title = {International Symposium on Design and Diagnostics of Electronic Circuits
and Systems},
booktitle = {{IEEE} International Test Conference, {ITC} 2019, Washington, DC,
USA, November 9-15, 2019},
pages = {1--4},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ITC44170.2019.9000137},
doi = {10.1109/ITC44170.2019.9000137},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/StamenkovicBCNP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mr/PolzerHS18,
author = {Thomas Polzer and
Florian Huemer and
Andreas Steininger},
title = {Refined metastability characterization using a time-to-digital converter},
journal = {Microelectron. Reliab.},
volume = {80},
pages = {91--99},
year = {2018},
url = {https://doi.org/10.1016/j.microrel.2017.11.017},
doi = {10.1016/J.MICROREL.2017.11.017},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mr/PolzerHS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/HuemerS18,
author = {Florian Huemer and
Andreas Steininger},
title = {Partially Systematic Constant-Weight Codes for Delay-Insensitive Communication},
booktitle = {24th {IEEE} International Symposium on Asynchronous Circuits and Systems,
{ASYNC} 2018, Vienna, Austria, May 13-16, 2018},
pages = {17--25},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASYNC.2018.00014},
doi = {10.1109/ASYNC.2018.00014},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/async/HuemerS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/HuemerPS18,
author = {Florian Huemer and
Thomas Polzer and
Andreas Steininger},
title = {Using a Duplex Time-to-Digital Converter for Metastability Characterization
of an {FPGA}},
booktitle = {21st {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2018, Budapest, Hungary, April
25-27, 2018},
pages = {141--146},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DDECS.2018.00032},
doi = {10.1109/DDECS.2018.00032},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/HuemerPS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/SchutzSHL18,
author = {Markus Sch{\"{u}}tz and
Andreas Steininger and
Florian Huemer and
Jakob Lechner},
title = {State Recovery for Coarse-Grain {TMR} Designs in FPGAs Using Partial
Reconfiguration},
booktitle = {2018 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFT} 2018, Chicago, IL, USA,
October 8-10, 2018},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/DFT.2018.8602984},
doi = {10.1109/DFT.2018.8602984},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/SchutzSHL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/SteiningerPS17,
author = {Andreas Steininger and
Adam Pawlak and
Viera Stopjakov{\'{a}}},
title = {Foreword},
journal = {J. Circuits Syst. Comput.},
volume = {26},
number = {8},
pages = {1702001:1--1702001:1},
year = {2017},
url = {https://doi.org/10.1142/S0218126617020017},
doi = {10.1142/S0218126617020017},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcsc/SteiningerPS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/PolzerS17,
author = {Thomas Polzer and
Andreas Steininger},
title = {A Model for the Metastability Delay of Sequential Elements},
journal = {J. Circuits Syst. Comput.},
volume = {26},
number = {8},
pages = {1740010:1--1740010:22},
year = {2017},
url = {https://doi.org/10.1142/S0218126617400102},
doi = {10.1142/S0218126617400102},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcsc/PolzerS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/VeeravalliSS17,
author = {Varadan Savulimedu Veeravalli and
Andreas Steininger and
Ulrich Schmid},
title = {A versatile architecture for long-term monitoring of single-event
transient durations},
journal = {Microprocess. Microsystems},
volume = {53},
pages = {130--144},
year = {2017},
url = {https://doi.org/10.1016/j.micpro.2017.07.007},
doi = {10.1016/J.MICPRO.2017.07.007},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/VeeravalliSS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/NajvirtPS17,
author = {Robert Najvirt and
Thomas Polzer and
Andreas Steininger},
title = {Measuring Metastability with Free-Running Clocks},
booktitle = {23rd {IEEE} International Symposium on Asynchronous Circuits and Systems,
{ASYNC} 2017, San Diego, CA, USA, May 21-24, 2017},
pages = {18--24},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASYNC.2017.18},
doi = {10.1109/ASYNC.2017.18},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/async/NajvirtPS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/AndjelkovicKKVS17,
author = {Marko S. Andjelkovic and
Milos Krstic and
Rolf Kraemer and
Varadan Savulimedu Veeravalli and
Andreas Steininger},
title = {A Critical Charge Model for Estimating the {SET} and {SEU} Sensitivity:
{A} Muller C-Element Case Study},
booktitle = {26th {IEEE} Asian Test Symposium, {ATS} 2017, Taipei City, Taiwan,
November 27-30, 2017},
pages = {82--87},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ATS.2017.27},
doi = {10.1109/ATS.2017.27},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/AndjelkovicKKVS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/PolzerHS17,
author = {Thomas Polzer and
Florian Huemer and
Andreas Steininger},
editor = {Manfred Dietrich and
Ondrej Nov{\'{a}}k},
title = {Measuring metastability using a time-to-digital converter},
booktitle = {20th {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2017, Dresden, Germany, April 19-21,
2017},
pages = {116--121},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/DDECS.2017.7934582},
doi = {10.1109/DDECS.2017.7934582},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/PolzerHS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/FritzSSV17,
author = {Bernhard Fritz and
Andreas Steininger and
V{\'{a}}clav Simek and
Varadan Savulimedu Veeravalli},
editor = {Hana Kub{\'{a}}tov{\'{a}} and
Martin Novotn{\'{y}} and
Amund Skavhaug},
title = {Setup for an Experimental Study of Radiation Effects in 65nm {CMOS}},
booktitle = {Euromicro Conference on Digital System Design, {DSD} 2017, Vienna,
Austria, August 30 - Sept. 1, 2017},
pages = {329--336},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/DSD.2017.60},
doi = {10.1109/DSD.2017.60},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/FritzSSV17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/PolzerNBS16,
author = {Thomas Polzer and
Robert Najvirt and
Florian Beck and
Andreas Steininger},
title = {On the Appropriate Handling of Metastable Voltages in FPGAs},
journal = {J. Circuits Syst. Comput.},
volume = {25},
number = {3},
pages = {1640020:1--1640020:25},
year = {2016},
url = {https://doi.org/10.1142/S021812661640020X},
doi = {10.1142/S021812661640020X},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcsc/PolzerNBS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/SteiningerMN16,
author = {Andreas Steininger and
J{\"{u}}rgen Maier and
Robert Najvirt},
title = {The Metastable Behavior of a Schmitt-Trigger},
booktitle = {22nd {IEEE} International Symposium on Asynchronous Circuits and Systems,
{ASYNC} 2016, Porto Alegre, Brazil, May 8-11, 2016},
pages = {57--64},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASYNC.2016.19},
doi = {10.1109/ASYNC.2016.19},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/async/SteiningerMN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/PolzerS16,
author = {Thomas Polzer and
Andreas Steininger},
title = {A general approach for comparing metastable behavior of digital {CMOS}
gates},
booktitle = {2016 {IEEE} 19th International Symposium on Design and Diagnostics
of Electronic Circuits {\&} Systems (DDECS), Kosice, Slovakia,
April 20-22, 2016},
pages = {56--61},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/DDECS.2016.7482456},
doi = {10.1109/DDECS.2016.7482456},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/PolzerS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/SteiningerNM16,
author = {Andreas Steininger and
Robert Najvirt and
J{\"{u}}rgen Maier},
editor = {Paris Kitsos},
title = {Does Cascading Schmitt-Trigger Stages Improve the Metastable Behavior?},
booktitle = {2016 Euromicro Conference on Digital System Design, {DSD} 2016, Limassol,
Cyprus, August 31 - September 2, 2016},
pages = {372--379},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/DSD.2016.56},
doi = {10.1109/DSD.2016.56},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/SteiningerNM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/VeeravalliS16,
author = {Varadan Savulimedu Veeravalli and
Andreas Steininger},
editor = {Paris Kitsos},
title = {Design and Physical Implementation of a Target {ASIC} for {SET} Experiments},
booktitle = {2016 Euromicro Conference on Digital System Design, {DSD} 2016, Limassol,
Cyprus, August 31 - September 2, 2016},
pages = {694--697},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/DSD.2016.82},
doi = {10.1109/DSD.2016.82},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/VeeravalliS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/VeeravalliS16,
author = {Varadan Savulimedu Veeravalli and
Andreas Steininger},
title = {Study of a delayed single-event effect in the Muller C-element},
booktitle = {21th {IEEE} European Test Symposium, {ETS} 2016, Amsterdam, Netherlands,
May 23-27, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ETS.2016.7519287},
doi = {10.1109/ETS.2016.7519287},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/VeeravalliS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HuemerLS16,
author = {Florian Huemer and
Jakob Lechner and
Andreas Steininger},
title = {A new coding scheme for fault tolerant 4-phase delay-insensitive codes},
booktitle = {34th {IEEE} International Conference on Computer Design, {ICCD} 2016,
Scottsdale, AZ, USA, October 2-5, 2016},
pages = {392--395},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ICCD.2016.7753311},
doi = {10.1109/ICCD.2016.7753311},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HuemerLS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/eatcs/DolevFLSS15,
author = {Danny Dolev and
Matthias F{\"{u}}gger and
Christoph Lenzen and
Ulrich Schmid and
Andreas Steininger},
title = {Fault-tolerant Distributed Systems in Hardware},
journal = {Bull. {EATCS}},
volume = {116},
year = {2015},
url = {http://eatcs.org/beatcs/index.php/beatcs/article/view/348},
timestamp = {Thu, 24 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/eatcs/DolevFLSS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ei/RosslerS15,
author = {Peter R{\"{o}}ssler and
Andreas Steininger},
title = {Digitale Mikroelektronik in {\"{O}}sterreich},
journal = {Elektrotech. Informationstechnik},
volume = {132},
number = {6},
pages = {257--258},
year = {2015},
url = {https://doi.org/10.1007/s00502-015-0320-7},
doi = {10.1007/S00502-015-0320-7},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ei/RosslerS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ei/SteiningerZJHSS15,
author = {Andreas Steininger and
Horst Zimmermann and
Axel Jantsch and
Michael Hofbauer and
Ulrich Schmid and
Kurt Schweiger and
Varadan Savulimedu Veeravalli},
title = {Building reliable systems-on-chip in nanoscale technologies},
journal = {Elektrotech. Informationstechnik},
volume = {132},
number = {6},
pages = {301--306},
year = {2015},
url = {https://doi.org/10.1007/s00502-015-0319-0},
doi = {10.1007/S00502-015-0319-0},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ei/SteiningerZJHSS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/ReschSS15,
author = {Stefan Resch and
Andreas Steininger and
Christoph Scherrer},
title = {A composable real-time architecture for replicated railway applications},
journal = {J. Syst. Archit.},
volume = {61},
number = {9},
pages = {472--485},
year = {2015},
url = {https://doi.org/10.1016/j.sysarc.2015.04.003},
doi = {10.1016/J.SYSARC.2015.04.003},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/ReschSS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/NajvirtS15,
author = {Robert Najvirt and
Andreas Steininger},
title = {How to Synchronize a Pausible Clock to a Reference},
booktitle = {21st {IEEE} International Symposium on Asynchronous Circuits and Systems,
{ASYNC} 2015, Mountain View, CA, USA, May 4-6, 2015},
pages = {9--16},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASYNC.2015.10},
doi = {10.1109/ASYNC.2015.10},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/async/NajvirtS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/NajvirtPBS15,
author = {Robert Najvirt and
Thomas Polzer and
Florian Beck and
Andreas Steininger},
editor = {Zoran Stamenkovic and
Witold A. Pleskacz and
Jaan Raik and
Heinrich Theodor Vierhaus},
title = {Containment of Metastable Voltages in FPGAs},
booktitle = {18th {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2015, Belgrade, Serbia, April 22-24,
2015},
pages = {197--202},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/DDECS.2015.72},
doi = {10.1109/DDECS.2015.72},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/NajvirtPBS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/VeeravalliS15,
author = {Varadan Savulimedu Veeravalli and
Andreas Steininger},
title = {Reliable and Continuous Measurement of {SET} Pulse Widths},
booktitle = {2015 Euromicro Conference on Digital System Design, {DSD} 2015, Madeira,
Portugal, August 26-28, 2015},
pages = {181--188},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/DSD.2015.94},
doi = {10.1109/DSD.2015.94},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/VeeravalliS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/PolzerS15,
author = {Thomas Polzer and
Andreas Steininger},
title = {Measuring the Distribution of Metastable Upsets over Time},
booktitle = {2015 Euromicro Conference on Digital System Design, {DSD} 2015, Madeira,
Portugal, August 26-28, 2015},
pages = {189--196},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/DSD.2015.91},
doi = {10.1109/DSD.2015.91},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/PolzerS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/PolzerS15a,
author = {Thomas Polzer and
Andreas Steininger},
title = {Enhanced Metastability Characterization Based on {AC} Analysis},
booktitle = {2015 Euromicro Conference on Digital System Design, {DSD} 2015, Madeira,
Portugal, August 26-28, 2015},
pages = {722--729},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/DSD.2015.93},
doi = {10.1109/DSD.2015.93},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/PolzerS15a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecctd/NajvirtS15,
author = {Robert Najvirt and
Andreas Steininger},
title = {A pausible clock with crystal oscillator accuracy},
booktitle = {European Conference on Circuit Theory and Design, {ECCTD} 2015, Trondheim,
Norway, August 24-26, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ECCTD.2015.7300051},
doi = {10.1109/ECCTD.2015.7300051},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ecctd/NajvirtS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LechnerSH15,
author = {Jakob Lechner and
Andreas Steininger and
Florian Huemer},
title = {Methods for analysing and improving the fault resilience of delay-insensitive
codes},
booktitle = {33rd {IEEE} International Conference on Computer Design, {ICCD} 2015,
New York City, NY, USA, October 18-21, 2015},
pages = {519--526},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ICCD.2015.7357160},
doi = {10.1109/ICCD.2015.7357160},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccd/LechnerSH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/NajvirtS15,
author = {Robert Najvirt and
Andreas Steininger},
title = {A versatile and reliable glitch filter for clocks},
booktitle = {25th International Workshop on Power and Timing Modeling, Optimization
and Simulation, {PATMOS} 2015, Salvador, Brazil, September 1-4, 2015},
pages = {140--147},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/PATMOS.2015.7347599},
doi = {10.1109/PATMOS.2015.7347599},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/NajvirtS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcss/DolevFPSSL14,
author = {Danny Dolev and
Matthias F{\"{u}}gger and
Markus Posch and
Ulrich Schmid and
Andreas Steininger and
Christoph Lenzen},
title = {Rigorously modeling self-stabilizing fault-tolerant circuits: An ultra-robust
clocking scheme for systems-on-chip},
journal = {J. Comput. Syst. Sci.},
volume = {80},
number = {4},
pages = {860--900},
year = {2014},
url = {https://doi.org/10.1016/j.jcss.2014.01.001},
doi = {10.1016/J.JCSS.2014.01.001},
timestamp = {Thu, 24 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jcss/DolevFPSSL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/scp/ReinbacherBHSK14,
author = {Thomas Reinbacher and
J{\"{o}}rg Brauer and
Martin Horauer and
Andreas Steininger and
Stefan Kowalewski},
title = {Runtime verification of microcontroller binary code},
journal = {Sci. Comput. Program.},
volume = {80},
pages = {109--129},
year = {2014},
url = {https://doi.org/10.1016/j.scico.2012.10.015},
doi = {10.1016/J.SCICO.2012.10.015},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/scp/ReinbacherBHSK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/NaqviS14,
author = {Syed Rameez Naqvi and
Andreas Steininger},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {A tree arbiter cell for high speed resource sharing in asynchronous
environments},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--6},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.308},
doi = {10.7873/DATE.2014.308},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/NaqviS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/MaierS14,
author = {J{\"{u}}rgen Maier and
Andreas Steininger},
title = {Online test vector insertion: {A} concurrent built-in self-testing
{(CBIST)} approach for asynchronous logic},
booktitle = {17th International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2014, Warsaw, Poland, 23-25 April,
2014},
pages = {33--38},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/DDECS.2014.6868759},
doi = {10.1109/DDECS.2014.6868759},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/MaierS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SteiningerVACA14,
author = {Andreas Steininger and
Varadan Savulimedu Veeravalli and
Dan Alexandrescu and
Enrico Costenaro and
Lorena Anghel},
title = {Exploring the state dependent {SET} sensitivity of asynchronous logic
- The muller-pipeline example},
booktitle = {32nd {IEEE} International Conference on Computer Design, {ICCD} 2014,
Seoul, South Korea, October 19-22, 2014},
pages = {61--67},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ICCD.2014.6974663},
doi = {10.1109/ICCD.2014.6974663},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccd/SteiningerVACA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/NaqviLS14,
author = {Syed Rameez Naqvi and
Jakob Lechner and
Andreas Steininger},
title = {Protection of Muller-Pipelines from transient faults},
booktitle = {Fifteenth International Symposium on Quality Electronic Design, {ISQED}
2014, Santa Clara, CA, USA, March 3-5, 2014},
pages = {123--131},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISQED.2014.6783315},
doi = {10.1109/ISQED.2014.6783315},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/NaqviLS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/VeeravalliSS14,
author = {Varadan Savulimedu Veeravalli and
Andreas Steininger and
Ulrich Schmid},
title = {Measuring {SET} pulsewidths in logic gates using digital infrastructure},
booktitle = {Fifteenth International Symposium on Quality Electronic Design, {ISQED}
2014, Santa Clara, CA, USA, March 3-5, 2014},
pages = {236--242},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISQED.2014.6783331},
doi = {10.1109/ISQED.2014.6783331},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/VeeravalliSS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/VeeravalliS14,
author = {Varadan Savulimedu Veeravalli and
Andreas Steininger},
title = {Architecture for monitoring {SET} propagation in 16-bit Sklansky adder},
booktitle = {Fifteenth International Symposium on Quality Electronic Design, {ISQED}
2014, Santa Clara, CA, USA, March 3-5, 2014},
pages = {412--419},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISQED.2014.6783354},
doi = {10.1109/ISQED.2014.6783354},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/VeeravalliS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/NajvirtS14,
author = {Robert Najvirt and
Andreas Steininger},
title = {Equivalence of clock gating and synchronization with applicability
to {GALS} communication},
booktitle = {24th International Workshop on Power and Timing Modeling, Optimization
and Simulation, PATMOS), Palma de Mallorca, Spain, September 29 -
Oct. 1, 2014},
pages = {1--8},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/PATMOS.2014.6951873},
doi = {10.1109/PATMOS.2014.6951873},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/NajvirtS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/VeeravalliPSSHSDSZVMH13,
author = {Varadan Savulimedu Veeravalli and
Thomas Polzer and
Ulrich Schmid and
Andreas Steininger and
Michael Hofbauer and
Kurt Schweiger and
Horst Dietrich and
Kerstin Schneider{-}Hornstein and
Horst Zimmermann and
Kay{-}Obbe Voss and
Bruno Merk and
Michael Hajek},
title = {An infrastructure for accurate characterization of single-event transients
in digital circuits},
journal = {Microprocess. Microsystems},
volume = {37},
number = {8-A},
pages = {772--791},
year = {2013},
url = {https://doi.org/10.1016/j.micpro.2013.04.011},
doi = {10.1016/J.MICPRO.2013.04.011},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/VeeravalliPSSHSDSZVMH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/NaqviSL13,
author = {Syed Rameez Naqvi and
Andreas Steininger and
Jakob Lechner},
title = {An {SET} Tolerant Tree Arbiter Cell},
booktitle = {19th {IEEE} International Symposium on Asynchronous Circuits and Systems,
{ASYNC} 2013, Santa Monica, CA, USA, May 19-22, 2013},
pages = {31--39},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASYNC.2013.22},
doi = {10.1109/ASYNC.2013.22},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/async/NaqviSL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/NajvirtNS13,
author = {Robert Najvirt and
Syed Rameez Naqvi and
Andreas Steininger},
title = {Classifying Virtual Channel Access Control Schemes for Asynchronous
NoCs},
booktitle = {19th {IEEE} International Symposium on Asynchronous Circuits and Systems,
{ASYNC} 2013, Santa Monica, CA, USA, May 19-22, 2013},
pages = {115--123},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASYNC.2013.25},
doi = {10.1109/ASYNC.2013.25},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/async/NajvirtNS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/PolzerS13,
author = {Thomas Polzer and
Andreas Steininger},
title = {An Approach for Efficient Metastability Characterization of FPGAs
through the Designer},
booktitle = {19th {IEEE} International Symposium on Asynchronous Circuits and Systems,
{ASYNC} 2013, Santa Monica, CA, USA, May 19-22, 2013},
pages = {174--182},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASYNC.2013.14},
doi = {10.1109/ASYNC.2013.14},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/async/PolzerS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/NaqviNS13,
author = {Syed Rameez Naqvi and
Robert Najvirt and
Andreas Steininger},
editor = {Luk{\'{a}}s Sekanina and
G{\"{o}}rschwin Fey and
Jaan Raik and
Snorre Aunet and
Richard Ruzicka},
title = {A Multi-Credit Flow Control scheme for asynchronous NoCs},
booktitle = {16th {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2013, Karlovy Vary, Czech Republic,
April 8-10, 2013},
pages = {153--158},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/DDECS.2013.6549808},
doi = {10.1109/DDECS.2013.6549808},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/NaqviNS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/PolzerS13,
author = {Thomas Polzer and
Andreas Steininger},
title = {Digital Late-Transition Metastability Simulation Model},
booktitle = {2013 Euromicro Conference on Digital System Design, {DSD} 2013, Los
Alamitos, CA, USA, September 4-6, 2013},
pages = {121--128},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/DSD.2013.21},
doi = {10.1109/DSD.2013.21},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/PolzerS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/PolzerS13,
author = {Thomas Polzer and
Andreas Steininger},
title = {{SET} propagation in micropipelines},
booktitle = {2013 23rd International Workshop on Power and Timing Modeling, Optimization
and Simulation (PATMOS), Karlsruhe, Germany, September 9-11, 2013},
pages = {126--133},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/PATMOS.2013.6662165},
doi = {10.1109/PATMOS.2013.6662165},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/PolzerS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/PolzerS13a,
author = {Thomas Polzer and
Andreas Steininger},
title = {Metastability characterization for muller C-elements},
booktitle = {2013 23rd International Workshop on Power and Timing Modeling, Optimization
and Simulation (PATMOS), Karlsruhe, Germany, September 9-11, 2013},
pages = {164--171},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/PATMOS.2013.6662170},
doi = {10.1109/PATMOS.2013.6662170},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/PolzerS13a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/safecomp/ReschSS13,
author = {Stefan Resch and
Andreas Steininger and
Christoph Scherrer},
editor = {Alejandra Ruiz and
Tim Kelly and
Jos{\'{e}} Luis de la Vara},
title = {Software Composability and Mixed Criticality for Triple Modular Redundant
Architectures},
booktitle = {{SAFECOMP} 2013 - Workshop {SASSUR} (Next Generation of System Assurance
Approaches for Safety-Critical Systems) of the 32nd International
Conference on Computer Safety, Reliability and Security, Toulouse,
France, 2013},
publisher = {{HAL}},
year = {2013},
url = {http://hal.archives-ouvertes.fr/SAFECOMP2013-SASSUR/hal-00848493},
timestamp = {Tue, 21 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/safecomp/ReschSS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MilbredtGLST12,
author = {Paul Milbredt and
Michael Gla{\ss} and
Martin Lukasiewycz and
Andreas Steininger and
J{\"{u}}rgen Teich},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {Designing FlexRay-based automotive architectures: {A} holistic {OEM}
approach},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {276--279},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176477},
doi = {10.1109/DATE.2012.6176477},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/MilbredtGLST12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/VeeravalliS12,
author = {Varadan Savulimedu Veeravalli and
Andreas Steininger},
editor = {Jaan Raik and
Viera Stopjakov{\'{a}} and
Heinrich Theodor Vierhaus and
Witold A. Pleskacz and
Raimund Ubar and
Helena Kruus and
Maksim Jenihhin},
title = {Radiation-tolerant combinational gates - an implementation based comparison},
booktitle = {{IEEE} 15th International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2012, Tallinn, Estonia, April 18-20,
2012},
pages = {115--120},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DDECS.2012.6219036},
doi = {10.1109/DDECS.2012.6219036},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/VeeravalliS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/VeeravalliPSS12,
author = {Varadan Savulimedu Veeravalli and
Thomas Polzer and
Andreas Steininger and
Ulrich Schmid},
title = {Architecture and Design Analysis of a Digital Single-Event Transient/Upset
Measurement Chip},
booktitle = {15th Euromicro Conference on Digital System Design, {DSD} 2012, Cesme,
Izmir, Turkey, September 5-8, 2012},
pages = {8--17},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/DSD.2012.26},
doi = {10.1109/DSD.2012.26},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/VeeravalliPSS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/NaqviVS12,
author = {Syed Rameez Naqvi and
Varadan Savulimedu Veeravalli and
Andreas Steininger},
title = {Protecting an Asynchronous NoC against Transient Channel Faults},
booktitle = {15th Euromicro Conference on Digital System Design, {DSD} 2012, Cesme,
Izmir, Turkey, September 5-8, 2012},
pages = {264--271},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/DSD.2012.108},
doi = {10.1109/DSD.2012.108},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/NaqviVS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/PolzerSL12,
author = {Thomas Polzer and
Andreas Steininger and
Jakob Lechner},
editor = {Jos{\'{e}} L. Ayala and
Delong Shang and
Alex Yakovlev},
title = {Muller C-Element Metastability Containment},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
and Simulation, 22nd International Workshop, {PATMOS} 2012, Newcastle
upon Tyne, UK, September 4-6, 2012, Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {7606},
pages = {103--112},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-36157-9\_11},
doi = {10.1007/978-3-642-36157-9\_11},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/PolzerSL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1202-1925,
author = {Danny Dolev and
Matthias F{\"{u}}gger and
Christoph Lenzen and
Markus Posch and
Ulrich Schmid and
Andreas Steininger},
title = {{FATAL+:} {A} Self-Stabilizing Byzantine Fault-tolerant Clocking Scheme
for SoCs},
journal = {CoRR},
volume = {abs/1202.1925},
year = {2012},
url = {http://arxiv.org/abs/1202.1925},
eprinttype = {arXiv},
eprint = {1202.1925},
timestamp = {Thu, 24 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1202-1925.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ei/TummeltshammerS11,
author = {Peter Tummeltshammer and
Andreas Steininger},
title = {Replicated processors on a single die - How independently do they
fail?},
journal = {Elektrotech. Informationstechnik},
volume = {128},
number = {6},
pages = {245--250},
year = {2011},
url = {https://doi.org/10.1007/s00502-011-0005-9},
doi = {10.1007/S00502-011-0005-9},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ei/TummeltshammerS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jece/FuchsS11,
author = {Gottfried Fuchs and
Andreas Steininger},
title = {{VLSI} Implementation of a Distributed Algorithm for Fault-Tolerant
Clock Generation},
journal = {J. Electr. Comput. Eng.},
volume = {2011},
pages = {936712:1--936712:23},
year = {2011},
url = {https://doi.org/10.1155/2011/936712},
doi = {10.1155/2011/936712},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jece/FuchsS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fmics/ReinbacherBHSK11,
author = {Thomas Reinbacher and
J{\"{o}}rg Brauer and
Martin Horauer and
Andreas Steininger and
Stefan Kowalewski},
editor = {Gwen Sala{\"{u}}n and
Bernhard Sch{\"{a}}tz},
title = {Past Time {LTL} Runtime Verification for Microcontroller Binary Code},
booktitle = {Formal Methods for Industrial Critical Systems - 16th International
Workshop, {FMICS} 2011, Trento, Italy, August 29-30, 2011. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6959},
pages = {37--51},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-24431-5\_5},
doi = {10.1007/978-3-642-24431-5\_5},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fmics/ReinbacherBHSK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rv/ReinbacherBSSK11,
author = {Thomas Reinbacher and
J{\"{o}}rg Brauer and
Daniel Schachinger and
Andreas Steininger and
Stefan Kowalewski},
editor = {Sarfraz Khurshid and
Koushik Sen},
title = {Automated Test-Trace Inspection for Microcontroller Binary Code},
booktitle = {Runtime Verification - Second International Conference, {RV} 2011,
San Francisco, CA, USA, September 27-30, 2011, Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {7186},
pages = {239--244},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-29860-8\_18},
doi = {10.1007/978-3-642-29860-8\_18},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rv/ReinbacherBSSK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ddecs/2011,
editor = {Rolf Kraemer and
Adam Pawlak and
Andreas Steininger and
Mario Sch{\"{o}}lzel and
Jaan Raik and
Heinrich Theodor Vierhaus},
title = {14th {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2011, Cottbus, Germany, April 13-15,
2011},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://ieeexplore.ieee.org/xpl/conhome/5771301/proceeding},
isbn = {978-1-4244-9755-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/2011.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ahs/PanhoferFS10,
author = {Thomas Panhofer and
Werner Friesenbichler and
Andreas Steininger},
editor = {Tughrul Arslan and
Didier Keymeulen and
David Merodio and
Khaled Benkrid and
Ahmet T. Erdogan and
Umeshkumar D. Patel},
title = {Reliability estimation and experimental results of a self-healing
asynchronous circuit: {A} case study},
booktitle = {2010 {NASA/ESA} Conference on Adaptive Hardware and Systems, {AHS}
2010, Anaheim, California, USA, June 15-18, 2010},
pages = {91--98},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/AHS.2010.5546277},
doi = {10.1109/AHS.2010.5546277},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ahs/PanhoferFS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/JeitlerLS10,
author = {Marcus Jeitler and
Jakob Lechner and
Andreas Steininger},
editor = {Elena Gramatov{\'{a}} and
Zdenek Kot{\'{a}}sek and
Andreas Steininger and
Heinrich Theodor Vierhaus and
Horst Zimmermann},
title = {Enhancing pipelined processor architectures with fast autonomous recovery
of transient faults},
booktitle = {13th {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits and Systems, {DDECS} 2010, Vienna, Austria, April 14-16,
2010},
pages = {233--236},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DDECS.2010.5491776},
doi = {10.1109/DDECS.2010.5491776},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/JeitlerLS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/FriesenbichlerPS10,
author = {Werner Friesenbichler and
Thomas Panhofer and
Andreas Steininger},
editor = {Elena Gramatov{\'{a}} and
Zdenek Kot{\'{a}}sek and
Andreas Steininger and
Heinrich Theodor Vierhaus and
Horst Zimmermann},
title = {A deterministic approach for hardware fault injection in asynchronous
{QDI} logic},
booktitle = {13th {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits and Systems, {DDECS} 2010, Vienna, Austria, April 14-16,
2010},
pages = {317--322},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DDECS.2010.5491758},
doi = {10.1109/DDECS.2010.5491758},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/FriesenbichlerPS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsn/PanhoferFS10,
author = {Thomas Panhofer and
Werner Friesenbichler and
Andreas Steininger},
title = {Implementation of self-healing asynchronous circuits at the example
of a video-processing algorithm},
booktitle = {{IEEE/IFIP} International Conference on Dependable Systems and Networks
Workshops {(DSN-W} 2010), Chicago, Illinois, USA, June 28 - July 1,
2010},
pages = {125--130},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DSNW.2010.5542609},
doi = {10.1109/DSNW.2010.5542609},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsn/PanhoferFS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memics/ReinbacherBHSK10,
author = {Thomas Reinbacher and
J{\"{o}}rg Brauer and
Martin Horauer and
Andreas Steininger and
Stefan Kowalewski},
editor = {Ludek Matyska and
Michal Kozubek and
Tom{\'{a}}s Vojnar and
Pavel Zemc{\'{\i}}k and
David Antos},
title = {Test-Case Generation for Embedded Binary Code Using Abstract Interpretation},
booktitle = {Sixth Doctoral Workshop on Mathematical and Engineering Methods in
Computer Science, {MEMICS} 2010, Selected Papers, October 22-24, 2010,
Mikulov, Czech Republic},
series = {OASIcs},
volume = {16},
pages = {101--108},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany},
year = {2010},
url = {https://doi.org/10.4230/OASIcs.MEMICS.2010.101},
doi = {10.4230/OASICS.MEMICS.2010.101},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memics/ReinbacherBHSK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ddecs/2010,
editor = {Elena Gramatov{\'{a}} and
Zdenek Kot{\'{a}}sek and
Andreas Steininger and
Heinrich Theodor Vierhaus and
Horst Zimmermann},
title = {13th {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits and Systems, {DDECS} 2010, Vienna, Austria, April 14-16,
2010},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://ieeexplore.ieee.org/xpl/conhome/5484099/proceeding},
isbn = {978-1-4244-6612-2},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/2010.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tdsc/RahbaranS09,
author = {Babak Rahbaran and
Andreas Steininger},
title = {Is Asynchronous Logic More Robust Than Synchronous Logic?},
journal = {{IEEE} Trans. Dependable Secur. Comput.},
volume = {6},
number = {4},
pages = {282--294},
year = {2009},
url = {https://doi.org/10.1109/TDSC.2008.37},
doi = {10.1109/TDSC.2008.37},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tdsc/RahbaranS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tii/FueggeAS09,
author = {Matthias F{\"{u}}gger and
Eric Armengaud and
Andreas Steininger},
title = {Safely Stimulating the Clock Synchronization Algorithm in Time-Triggered
Systems - a Combined Formal {\&} Experimental Approach},
journal = {{IEEE} Trans. Ind. Informatics},
volume = {5},
number = {2},
pages = {132--146},
year = {2009},
url = {https://doi.org/10.1109/TII.2009.2017526},
doi = {10.1109/TII.2009.2017526},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tii/FueggeAS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/FuchsFS09,
author = {Gottfried Fuchs and
Matthias F{\"{u}}gger and
Andreas Steininger},
title = {On the Threat of Metastability in an Asynchronous Fault-Tolerant Clock
Generation Scheme},
booktitle = {15th {IEEE} Symposium on Asynchronous Circuits and Systems, {ASYNC}
2009, Chapel Hill, NC, USA, May 17-20, 2009},
pages = {127--136},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASYNC.2009.15},
doi = {10.1109/ASYNC.2009.15},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/async/FuchsFS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ArmengaudS09,
author = {Eric Armengaud and
Andreas Steininger},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Remote measurement of local oscillator drifts in FlexRay networks},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {1082--1087},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090825},
doi = {10.1109/DATE.2009.5090825},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ArmengaudS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/TummeltshammerS09,
author = {Peter Tummeltshammer and
Andreas Steininger},
title = {On the role of the power supply as an entry for common cause faults
- An experimental analysis},
booktitle = {Proceedings of the 2009 {IEEE} Symposium on Design and Diagnostics
of Electronic Circuits and Systems, {DDECS} 2009, April 15-17, 2009,
Liberec, Czech Republic},
pages = {152--157},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/DDECS.2009.5012118},
doi = {10.1109/DDECS.2009.5012118},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/TummeltshammerS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/FriesenbichlerS09,
author = {Werner Friesenbichler and
Andreas Steininger},
editor = {Antonio N{\'{u}}{\~{n}}ez and
Pedro P. Carballo},
title = {Soft Error Tolerant Asynchronous Circuits Based on Dual Redundant
Four State Logic},
booktitle = {12th Euromicro Conference on Digital System Design, Architectures,
Methods and Tools, {DSD} 2009, 27-29 August 2009, Patras, Greece},
pages = {100--107},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/DSD.2009.142},
doi = {10.1109/DSD.2009.142},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/FriesenbichlerS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/TummeltshammerS09,
author = {Peter Tummeltshammer and
Andreas Steininger},
editor = {Antonio N{\'{u}}{\~{n}}ez and
Pedro P. Carballo},
title = {On the Risk of Fault Coupling over the Chip Substrate},
booktitle = {12th Euromicro Conference on Digital System Design, Architectures,
Methods and Tools, {DSD} 2009, 27-29 August 2009, Patras, Greece},
pages = {325--332},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/DSD.2009.185},
doi = {10.1109/DSD.2009.185},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/TummeltshammerS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsn/TummeltshammerS09,
author = {Peter Tummeltshammer and
Andreas Steininger},
title = {Power supply induced common cause faults-experimental assessment of
potential countermeasures},
booktitle = {Proceedings of the 2009 {IEEE/IFIP} International Conference on Dependable
Systems and Networks, {DSN} 2009, Estoril, Lisbon, Portugal, June
29 - July 2, 2009},
pages = {449--457},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/DSN.2009.5270308},
doi = {10.1109/DSN.2009.5270308},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsn/TummeltshammerS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sss/PolzerHS09,
author = {Thomas Polzer and
Thomas Handl and
Andreas Steininger},
editor = {Rachid Guerraoui and
Franck Petit},
title = {A Metastability-Free Multi-synchronous Communication Scheme for SoCs},
booktitle = {Stabilization, Safety, and Security of Distributed Systems, 11th International
Symposium, {SSS} 2009, Lyon, France, November 3-6, 2009. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5873},
pages = {578--592},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-05118-0\_40},
doi = {10.1007/978-3-642-05118-0\_40},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sss/PolzerHS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ejes/AmbroschKHS08,
author = {Kristian Ambrosch and
Wilfried Kubinger and
Martin Humenberger and
Andreas Steininger},
title = {Flexible Hardware-Based Stereo Matching},
journal = {{EURASIP} J. Embed. Syst.},
volume = {2008},
year = {2008},
url = {https://doi.org/10.1155/2008/386059},
doi = {10.1155/2008/386059},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ejes/AmbroschKHS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tii/ArmengaudSH08,
author = {Eric Armengaud and
Andreas Steininger and
Martin Horauer},
title = {Towards a Systematic Test for Embedded Automotive Communication Systems},
journal = {{IEEE} Trans. Ind. Informatics},
volume = {4},
number = {3},
pages = {146--155},
year = {2008},
url = {https://doi.org/10.1109/TII.2008.2002704},
doi = {10.1109/TII.2008.2002704},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tii/ArmengaudSH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cvpr/AmbroschHKS08,
author = {Kristian Ambrosch and
Martin Humenberger and
Wilfried Kubinger and
Andreas Steininger},
title = {Extending two non-parametric transforms for {FPGA} based stereo matching
using bayer filtered cameras},
booktitle = {{IEEE} Conference on Computer Vision and Pattern Recognition, {CVPR}
Workshops 2008, Anchorage, AK, USA, 23-28 June, 2008},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/CVPRW.2008.4563146},
doi = {10.1109/CVPRW.2008.4563146},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cvpr/AmbroschHKS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/delta/MilbredtSH08,
author = {Paul Milbredt and
Andreas Steininger and
Martin Horauer},
title = {Automated Testing of FlexRay Clusters for System Inconsistencies in
Automotive Networks},
booktitle = {4th {IEEE} International Symposium on Electronic Design, Test and
Applications, {DELTA} 2008, Hong Kong, January 23-25, 2008},
pages = {533--538},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/DELTA.2008.74},
doi = {10.1109/DELTA.2008.74},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/delta/MilbredtSH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/FuchsFSS08,
author = {Gottfried Fuchs and
Matthias F{\"{u}}gger and
Ulrich Schmid and
Andreas Steininger},
editor = {Luca Fanucci},
title = {Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip},
booktitle = {11th Euromicro Conference on Digital System Design: Architectures,
Methods and Tools, {DSD} 2008, Parma, Italy, September 3-5, 2008},
pages = {242--249},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/DSD.2008.65},
doi = {10.1109/DSD.2008.65},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/FuchsFSS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/ForsterKSG08,
author = {Wolfgang Forster and
Christof Kutschera and
Andreas Steininger and
Karl M. G{\"{o}}schka},
title = {Automated generation of explicit connectors for component based hardware/software
interaction in embedded real-time systems},
booktitle = {22nd {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2008, Miami, Florida USA, April 14-18, 2008},
pages = {1--8},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/IPDPS.2008.4536569},
doi = {10.1109/IPDPS.2008.4536569},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/ForsterKSG08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sies/MilbredtHS08,
author = {Paul Milbredt and
Martin Horauer and
Andreas Steininger},
title = {An investigation of the clique problem in FlexRay},
booktitle = {{IEEE} Third International Symposium on Industrial Embedded Systems,
{SIES} 2008, Montpellier / La Grande Motte, France, June 11-13, 2008},
pages = {200--207},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/SIES.2008.4577700},
doi = {10.1109/SIES.2008.4577700},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sies/MilbredtHS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dagstuhl/Steininger08,
author = {Andreas Steininger},
editor = {Bernadette Charron{-}Bost and
Shlomi Dolev and
Jo C. Ebergen and
Ulrich Schmid},
title = {Error Containment in the Presence of Metastability},
booktitle = {Fault-Tolerant Distributed Algorithms on {VLSI} Chips, 07.09. - 10.09.2008},
series = {Dagstuhl Seminar Proceedings},
volume = {08371},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik, Germany},
year = {2008},
url = {http://drops.dagstuhl.de/opus/volltexte/2009/1923/},
timestamp = {Thu, 10 Jun 2021 13:02:08 +0200},
biburl = {https://dblp.org/rec/conf/dagstuhl/Steininger08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ei/SchmidSS07,
author = {Ulrich Schmid and
Andreas Steininger and
Manfred Sust},
title = {FIT-IT-Projekt {DARTS:} dezentrale fehlertolerante Taktgenerierung},
journal = {Elektrotech. Informationstechnik},
volume = {124},
number = {1-2},
pages = {3--8},
year = {2007},
url = {https://doi.org/10.1007/s00502-006-0409-0},
doi = {10.1007/S00502-006-0409-0},
timestamp = {Thu, 19 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ei/SchmidSS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cvpr/AmbroschKHS07,
author = {Kristian Ambrosch and
Wilfried Kubinger and
Martin Humenberger and
Andreas Steininger},
title = {Hardware implementation of an {SAD} based stereo vision algorithm},
booktitle = {2007 {IEEE} Computer Society Conference on Computer Vision and Pattern
Recognition {(CVPR} 2007), 18-23 June 2007, Minneapolis, Minnesota,
{USA}},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/CVPR.2007.383417},
doi = {10.1109/CVPR.2007.383417},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cvpr/AmbroschKHS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/etfa/ArmengaudSH07,
author = {Eric Armengaud and
Andreas Steininger and
Alexander Hanzlik},
title = {The effect of quartz drift on convergence-average based clock synchronization},
booktitle = {Proceedings of 12th {IEEE} International Conference on Emerging Technologies
and Factory Automation, {ETFA} 2007, September 25-28, 2007, Patras,
Greece},
pages = {1123--1130},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/EFTA.2007.4416908},
doi = {10.1109/EFTA.2007.4416908},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/etfa/ArmengaudSH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/prdc/KottkeS07,
author = {Thomas Kottke and
Andreas Steininger},
title = {A Fail-Silent Reconfigurable Superscalar Processor},
booktitle = {13th {IEEE} Pacific Rim International Symposium on Dependable Computing
{(PRDC} 2007), 17-19 December, 2007, Melbourne, Victoria, Australia},
pages = {232--239},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/PRDC.2007.16},
doi = {10.1109/PRDC.2007.16},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/prdc/KottkeS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/SalloumSTH06,
author = {Christian El Salloum and
Andreas Steininger and
Peter Tummeltshammer and
Werner Harter},
title = {Recovery Mechanisms for Dual Core Architectures},
booktitle = {21th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2006), 4-6 October 2006, Arlington, Virginia,
{USA}},
pages = {380--388},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/DFT.2006.52},
doi = {10.1109/DFT.2006.52},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/SalloumSTH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/FerringerFSK06,
author = {Markus Ferringer and
Gottfried Fuchs and
Andreas Steininger and
Gerald Kempf},
title = {{VLSI} Implementation of a Fault-Tolerant Distributed Clock Generation},
booktitle = {21th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2006), 4-6 October 2006, Arlington, Virginia,
{USA}},
pages = {563--571},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/DFT.2006.67},
doi = {10.1109/DFT.2006.67},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/FerringerFSK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/DelvaiS06,
author = {Martin Delvai and
Andreas Steininger},
title = {Solving the Fundamental Problem of Digital Design - {A} Systematic
Review of Design Methods},
booktitle = {Ninth Euromicro Conference on Digital System Design: Architectures,
Methods and Tools {(DSD} 2006), 30 August - 1 September 2006, Dubrovnik,
Croatia},
pages = {131--138},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/DSD.2006.84},
doi = {10.1109/DSD.2006.84},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/DelvaiS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsn/KottkeS06,
author = {Thomas Kottke and
Andreas Steininger},
title = {A Reconfigurable Generic Dual-Core Architecture},
booktitle = {2006 International Conference on Dependable Systems and Networks {(DSN}
2006), 25-28 June 2006, Philadelphia, Pennsylvania, USA, Proceedings},
pages = {45--54},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/DSN.2006.8},
doi = {10.1109/DSN.2006.8},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsn/KottkeS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/etfa/ArmengaudSH06,
author = {Eric Armengaud and
Andreas Steininger and
Martin Horauer},
title = {Automatic Parameter Identi cation in FlexRay based Automotive Communication
Networks},
booktitle = {Proceedings of 11th {IEEE} International Conference on Emerging Technologies
and Factory Automation, {ETFA} 2006, September 20-22, 2006, Diplomat
Hotel Prague, Czech Republic},
pages = {897--904},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ETFA.2006.355404},
doi = {10.1109/ETFA.2006.355404},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/etfa/ArmengaudSH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/etfa/ArmengaudSH05,
author = {Eric Armengaud and
Andreas Steininger and
Martin Horauer},
title = {Efficient stimulus generation for testing embedded distributed systems
the FlexRay example},
booktitle = {Proceedings of 10th {IEEE} International Conference on Emerging Technologies
and Factory Automation, {ETFA} 2005, September 19-22, 2005, Catania,
Italy},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ETFA.2005.1612602},
doi = {10.1109/ETFA.2005.1612602},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/etfa/ArmengaudSH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ArmengaudRSPHZ05,
author = {Eric Armengaud and
Florian Rothensteiner and
Andreas Steininger and
Roman Pallierer and
Martin Horauer and
Martin Zauner},
title = {A structured approach for the systematic test of embedded automotive
communication systems},
booktitle = {Proceedings 2005 {IEEE} International Test Conference, {ITC} 2005,
Austin, TX, USA, November 8-10, 2005},
pages = {8},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/TEST.2005.1583956},
doi = {10.1109/TEST.2005.1583956},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/ArmengaudRSPHZ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cai/KottkeS04,
author = {Thomas Kottke and
Andreas Steininger},
title = {A Generic Dual Core Architecture with Error Containment},
journal = {Comput. Artif. Intell.},
volume = {23},
number = {5},
pages = {517--535},
year = {2004},
url = {http://www.cai.sk/ojs/index.php/cai/article/view/443},
timestamp = {Mon, 14 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cai/KottkeS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/delta/RahbaranSH04,
author = {Babak Rahbaran and
Andreas Steininger and
Thomas Handl},
title = {Built-in Fault Injection in Hardware - The {FIDYCO} Example},
booktitle = {2nd {IEEE} International Workshop on Electronic Design, Test and Applications
{(DELTA} 2004), 28-30 January 2004, Perth, Australia},
pages = {327--332},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DELTA.2004.10070},
doi = {10.1109/DELTA.2004.10070},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/delta/RahbaranSH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wises/RahbaranFS04,
author = {Babak Rahbaran and
Matthias F{\"{u}}gger and
Andreas Steininger},
editor = {Bernhard Rinner and
Wilfried Elmenreich},
title = {Embedded Real-Time-Tracer - An Approach with {IDE}},
booktitle = {Proceedings of the Second Workshop on Intelligent Solutions in Embedded
Systems, {WISES} 2004, Graz University of Technology, Graz, Austria,
2004, June 25},
pages = {25--35},
publisher = {Graz University of Technology},
year = {2004},
timestamp = {Mon, 14 Sep 2009 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/wises/RahbaranFS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tr/ThallerS03,
author = {Karl Thaller and
Andreas Steininger},
title = {A transparent online memory test for simultaneous detection of functional
faults and soft errors in memories},
journal = {{IEEE} Trans. Reliab.},
volume = {52},
number = {4},
pages = {413--422},
year = {2003},
url = {https://doi.org/10.1109/TR.2003.821927},
doi = {10.1109/TR.2003.821927},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tr/ThallerS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tr/ScherrerS03,
author = {Christoph Scherrer and
Andreas Steininger},
title = {Dealing with dormant faults in an embedded fault-tolerant computer
system},
journal = {{IEEE} Trans. Reliab.},
volume = {52},
number = {4},
pages = {512--522},
year = {2003},
url = {https://doi.org/10.1109/TR.2003.821943},
doi = {10.1109/TR.2003.821943},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tr/ScherrerS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecrts/DelvaiHPS03,
author = {Martin Delvai and
Wolfgang Huber and
Peter P. Puschner and
Andreas Steininger},
title = {Processor Support for Temporal Predictability - The {SPEAR} Design
Example},
booktitle = {15th Euromicro Conference on Real-Time Systems {(ECRTS} 2003), 2-4
July 2003, Porto, Portugal, Proceedings},
pages = {169--176},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/EMRTS.2003.1212740},
doi = {10.1109/EMRTS.2003.1212740},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ecrts/DelvaiHPS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wises/SteiningerRH03,
author = {Andreas Steininger and
Babak Rahbaran and
Thomas Handl},
editor = {Wilfried Elmenreich},
title = {Built-In Fault Injectors - The Logical Continuation of BIST?},
booktitle = {Proceedings of the First Workshop on Intelligent Solutions in Embedded
Systems, {WISES} 2003, Vienna University of Technology, Vienna, Austria,
2003, June 27},
pages = {187--196},
publisher = {Vienna University of Technology},
year = {2003},
timestamp = {Tue, 31 Jan 2006 13:50:53 +0100},
biburl = {https://dblp.org/rec/conf/wises/SteiningerRH03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/SteiningerS02,
author = {Andreas Steininger and
Christoph Scherrer},
title = {Identifying Efficient Combinations of Error Detection Mechanisms Based
on Results of Fault Injection Experiments},
journal = {{IEEE} Trans. Computers},
volume = {51},
number = {2},
pages = {235--239},
year = {2002},
url = {https://doi.org/10.1109/12.980011},
doi = {10.1109/12.980011},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/SteiningerS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SteiningerV02,
author = {Andreas Steininger and
Johann Vilanek},
title = {Using Offline and Online {BIST} to Improve System Dependability -
The {TTPC-C} Example},
booktitle = {20th International Conference on Computer Design {(ICCD} 2002), {VLSI}
in Computers and Processors, 16-18 September 2002, Freiburg, Germany,
Proceedings},
pages = {277},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ICCD.2002.1106782},
doi = {10.1109/ICCD.2002.1106782},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SteiningerV02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/SteiningerS01,
author = {Andreas Steininger and
Christoph Scherrer},
title = {How to Tune the {MTTF} of a Fail-Silent System},
booktitle = {16th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2001), 24-26 October 2001, San Francisco,
CA, USA, Proceedings},
pages = {418},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.ieeecomputersociety.org/10.1109/DFT.2001.10000},
doi = {10.1109/DFT.2001.10000},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/SteiningerS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Steininger00,
author = {Andreas Steininger},
title = {Testing and built-in self-test - {A} survey},
journal = {J. Syst. Archit.},
volume = {46},
number = {9},
pages = {721--747},
year = {2000},
url = {https://doi.org/10.1016/S1383-7621(99)00041-7},
doi = {10.1016/S1383-7621(99)00041-7},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/Steininger00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/SteiningerS00,
author = {Andreas Steininger and
Christoph Scherrer},
title = {How Does Resource Utilization Affect Fault Tolerance?},
booktitle = {15th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2000), 25-27 October 2000, Yamanashi, Japan,
Proceedings},
pages = {251--256},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/DFTVS.2000.887163},
doi = {10.1109/DFTVS.2000.887163},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/SteiningerS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/SteiningerT99,
author = {Andreas Steininger and
Christopher Temple},
title = {Economic Online Self-Test in the Time-Triggered Architecture},
journal = {{IEEE} Des. Test Comput.},
volume = {16},
number = {3},
pages = {81--89},
year = {1999},
url = {https://doi.org/10.1109/54.785840},
doi = {10.1109/54.785840},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/SteiningerT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tim/MittermayerS99,
author = {Christoph Mittermayer and
Andreas Steininger},
title = {On the determination of dynamic errors for rise time measurement with
an oscilloscope},
journal = {{IEEE} Trans. Instrum. Meas.},
volume = {48},
number = {6},
pages = {1103--1107},
year = {1999},
url = {https://doi.org/10.1109/19.816121},
doi = {10.1109/19.816121},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tim/MittermayerS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/SteiningerS99,
author = {Andreas Steininger and
Christoph Scherrer},
title = {On the Necessity of On-Line-BIST in Safety-Critical Applications -
{A} Case Study},
booktitle = {Digest of Papers: FTCS-29, The Twenty-Ninth Annual International Symposium
on Fault-Tolerant Computing, Madison, Wisconsin, USA, June 15-18,
1999},
pages = {208--215},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/FTCS.1999.781052},
doi = {10.1109/FTCS.1999.781052},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ftcs/SteiningerS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/SteiningerS97,
author = {Andreas Steininger and
Christoph Scherrer},
title = {On Finding an Optimal Combination of Error Detection Mechanisms Based
on Results of Fault Injection Experiments},
booktitle = {Digest of Papers: FTCS-27, The Twenty-Seventh Annual International
Symposium on Fault-Tolerant Computing, Seattle, Washington, USA, June
24-27, 1997},
pages = {238--247},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/FTCS.1997.614096},
doi = {10.1109/FTCS.1997.614096},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ftcs/SteiningerS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/SteiningerS95,
author = {Andreas Steininger and
Herbert Schweinzer},
title = {A Model for the Analysis of the Fault Injection Process},
booktitle = {Digest of Papers: FTCS-25, The Twenty-Fifth International Symposium
on Fault-Tolerant Computing, Pasadena, California, USA, June 27-30,
1995},
pages = {186--195},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/FTCS.1995.466984},
doi = {10.1109/FTCS.1995.466984},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ftcs/SteiningerS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dse/ReisingerS93,
author = {Johannes Reisinger and
Andreas Steininger},
title = {The design of a fail-silent processing node for the predictable hard
real-time system {MARS}},
journal = {Distributed Syst. Eng.},
volume = {1},
number = {2},
pages = {104--111},
year = {1993},
url = {https://doi.org/10.1088/0967-1846/1/2/005},
doi = {10.1088/0967-1846/1/2/005},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dse/ReisingerS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/SteiningerS91,
author = {Andreas Steininger and
Herbert Schweinzer},
title = {Towards an optimal combination of error detection mechanisms},
journal = {Microprocessing and Microprogramming},
volume = {32},
number = {1-5},
pages = {253--259},
year = {1991},
url = {https://doi.org/10.1016/0165-6074(91)90355-W},
doi = {10.1016/0165-6074(91)90355-W},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/SteiningerS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecrts/SteiningerS91,
author = {Andreas Steininger and
Herbert Schweinzer},
title = {Can the advantages of {RISC} be utilized in real time systems?},
booktitle = {Euromicro '91 Workshop on Real Time Systems, {RTS} 1991, Universit{\'{e}}
Paris XI, Paris-Orsay, France, June 12-14, 1991, Proceedings},
pages = {30--35},
publisher = {{IEEE}},
year = {1991},
url = {https://doi.org/10.1109/EMWRT.1991.144076},
doi = {10.1109/EMWRT.1991.144076},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ecrts/SteiningerS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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