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ORCIDBibTeX records: Naoya Tokiwa
@inproceedings{DBLP:conf/isscc/HiguchiKKFTATSM21,
author = {Tsutomu Higuchi and
Takuyo Kodama and
Koji Kato and
Ryo Fukuda and
Naoya Tokiwa and
Mitsuhiro Abe and
Teruo Takagiwa and
Yuki Shimizu and
Junji Musha and
Katsuaki Sakurai and
Jumpei Sato and
Tetsuaki Utsumi and
Kazuhide Yoneya and
Yasuhiro Suematsu and
Toshifumi Hashimoto and
Takeshi Hioka and
Kosuke Yanagidaira and
Masatsugu Kojima and
Junya Matsuno and
Kei Shiraishi and
Kensuke Yamamoto and
Shintaro Hayashi and
Tomoharu Hashiguchi and
Kazuko Inuzuka and
Akio Sugahara and
Mitsuaki Honma and
Keiji Tsunoda and
Kazumasa Yamamoto and
Takahiro Sugimoto and
Tomofumi Fujimura and
Mizuki Kaneko and
Hiroki Date and
Osamu Kobayashi and
Takatoshi Minamoto and
Ryoichi Tachibana and
Itaru Yamaguchi and
Juan Lee and
Venky Ramachandra and
Srinivas Rajendra and
Tianyu Tang and
Siddhesh Darne and
Jiwang Lee and
Jason Li and
Toru Miwa and
Ryuji Yamashita and
Hiroshi Sugawara and
Naoki Ookuma and
Masahiro Kano and
Hiroyuki Mizukoshi and
Yuki Kuniyoshi and
Mitsuyuki Watanabe and
Kei Akiyama and
Hirotoshi Mori and
Akira Arimizu and
Yoshito Katano and
Masakazu Ehama and
Hiroshi Maejima and
Koji Hosono and
Masahiro Yoshihara},
title = {30.4 {A} 1Tb 3b/Cell 3D-Flash Memory in a 170+ Word-Line-Layer Technology},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
San Francisco, CA, USA, February 13-22, 2021},
pages = {428--430},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISSCC42613.2021.9366003},
doi = {10.1109/ISSCC42613.2021.9366003},
timestamp = {Sat, 13 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/HiguchiKKFTATSM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SiauKLISVA0YANK19,
author = {Chang Hua Siau and
Kwang{-}Ho Kim and
Seungpil Lee and
Katsuaki Isobe and
Noboru Shibata and
Kapil Verma and
Takuya Ariki and
Jason Li and
Jong Yuh and
Anirudh Amarnath and
Qui Nguyen and
Ohwon Kwon and
Stanley Jeong and
Heguang Li and
Hua{-}Ling Hsu and
Taiyuan Tseng and
Steve Choi and
Siddhesh Darne and
Pradeep Anantula and
Alex Yap and
Hardwell Chibvongodze and
Hitoshi Miwa and
Minoru Yamashita and
Mitsuyuki Watanabe and
Koichiro Hayashi and
Yosuke Kato and
Toru Miwa and
Jang Yong Kang and
Masatoshi Okumura and
Naoki Ookuma and
Muralikrishna Balaga and
Venky Ramachandra and
Aki Matsuda and
Swaroop Kulkarni and
Raghavendra Rachineni and
Pai K. Manjunath and
Masahito Takehara and
Anil Pai and
Srinivas Rajendra and
Toshiki Hisada and
Ryo Fukuda and
Naoya Tokiwa and
Kazuaki Kawaguchi and
Masashi Yamaoka and
Hiromitsu Komai and
Takatoshi Minamoto and
Masaki Unno and
Susumu Ozawa and
Hiroshi Nakamura and
Tomoo Hishida and
Yasuyuki Kajitani and
Lei Lin},
title = {A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s
Write Performance Featuring Circuit-Under-Array Technology},
booktitle = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2019,
San Francisco, CA, USA, February 17-21, 2019},
pages = {218--220},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISSCC.2019.8662445},
doi = {10.1109/ISSCC.2019.8662445},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/SiauKLISVA0YANK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/FukudaWMKSTKSTSOEINMMFYSNHTKMSYSSDWKMMNHLHMLMNH12,
author = {Koichi Fukuda and
Yoshihisa Watanabe and
Eiichi Makino and
Koichi Kawakami and
Jumpei Sato and
Teruo Takagiwa and
Naoaki Kanagawa and
Hitoshi Shiga and
Naoya Tokiwa and
Yoshihiko Shindo and
Takeshi Ogawa and
Toshiaki Edahiro and
Makoto Iwai and
Osamu Nagao and
Junji Musha and
Takatoshi Minamoto and
Yuka Furuta and
Kosuke Yanagidaira and
Yuya Suzuki and
Dai Nakamura and
Yoshikazu Hosomura and
Rieko Tanaka and
Hiromitsu Komai and
Mai Muramoto and
Go Shikata and
Ayako Yuminaka and
Kiyofumi Sakurai and
Manabu Sakai and
Hong Ding and
Mitsuyuki Watanabe and
Yosuke Kato and
Toru Miwa and
Alex Mak and
Masaru Nakamichi and
Gertjan Hemink and
Dana Lee and
Masaaki Higashitani and
Brian Murphy and
Bo Lei and
Yasuhiko Matsunaga and
Kiyomi Naruke and
Takahiko Hara},
title = {A 151-mm\({}^{\mbox{2}}\) 64-Gb 2 Bit/Cell {NAND} Flash Memory in
24-nm {CMOS} Technology},
journal = {{IEEE} J. Solid State Circuits},
volume = {47},
number = {1},
pages = {75--84},
year = {2012},
url = {https://doi.org/10.1109/JSSC.2011.2164711},
doi = {10.1109/JSSC.2011.2164711},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/FukudaWMKSTKSTSOEINMMFYSNHTKMSYSSDWKMMNHLHMLMNH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/FukudaWMKSTKSTSEOINMMYSNHKFMTSYSSDWKMMNHLHMLMNH11,
author = {Koichi Fukuda and
Yoshihisa Watanabe and
Eiichi Makino and
Koichi Kawakami and
Jumpei Sato and
Teruo Takagiwa and
Naoaki Kanagawa and
Hitoshi Shiga and
Naoya Tokiwa and
Yoshihiko Shindo and
Toshiaki Edahiro and
Takeshi Ogawa and
Makoto Iwai and
Osamu Nagao and
Junji Musha and
Takatoshi Minamoto and
Kosuke Yanagidaira and
Yuya Suzuki and
Dai Nakamura and
Yoshikazu Hosomura and
Hiromitsu Komai and
Yuka Furuta and
Mai Muramoto and
Rieko Tanaka and
Go Shikata and
Ayako Yuminaka and
Kiyofumi Sakurai and
Manabu Sakai and
Hong Ding and
Mitsuyuki Watanabe and
Yosuke Kato and
Toru Miwa and
Alex Mak and
Masaru Nakamichi and
Gertjan Hemink and
Dana Lee and
Masaaki Higashitani and
Brian Murphy and
Bo Lei and
Yasuhiko Matsunaga and
Kiyomi Naruke and
Takahiko Hara},
title = {A 151mm\({}^{\mbox{2}}\) 64Gb {MLC} {NAND} flash memory in 24nm {CMOS}
technology},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2011,
Digest of Technical Papers, San Francisco, CA, USA, 20-24 February,
2011},
pages = {198--199},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISSCC.2011.5746280},
doi = {10.1109/ISSCC.2011.5746280},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/FukudaWMKSTKSTSEOINMMYSNHKFMTSYSSDWKMMNHLHMLMNH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/FutatsuyamaFTSEKNIKFKAMHHLCHSDTSKKSYSNFMNLMLMWHO09,
author = {Takuya Futatsuyama and
Norihiro Fujita and
Naoya Tokiwa and
Yoshihiko Shindo and
Toshiaki Edahiro and
Teruhiko Kamei and
Hiroaki Nasu and
Makoto Iwai and
Koji Kato and
Yasuyuki Fukuda and
Naoaki Kanagawa and
Naofumi Abiko and
Masahide Matsumoto and
Toshihiko Himeno and
Toshifumi Hashimoto and
Yi{-}Ching Liu and
Hardwell Chibvongodze and
Takamitsu Hori and
Manabu Sakai and
Hong Ding and
Yoshiharu Takeuchi and
Hitoshi Shiga and
Norifumi Kajimura and
Yasuyuki Kajitani and
Kiyofumi Sakurai and
Kosuke Yanagidaira and
Toshihiro Suzuki and
Yuko Namiki and
Tomofumi Fujimura and
Man Mui and
Hao Nguyen and
Seungpil Lee and
Alex Mak and
Jeffery Lutze and
Tooru Maruyama and
Toshiharu Watanabe and
Takahiko Hara and
Shigeo Ohshima},
title = {A 113mm2 32Gb 3b/cell {NAND} flash memory},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2009,
Digest of Technical Papers, San Francisco, CA, USA, 8-12 February,
2009},
pages = {242--243},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ISSCC.2009.4977398},
doi = {10.1109/ISSCC.2009.4977398},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/FutatsuyamaFTSEKNIKFKAMHHLCHSDTSKKSYSNFMNLMLMWHO09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/TakeuchiKFOHSWF07,
author = {Ken Takeuchi and
Yasushi Kameda and
Susumu Fujimura and
Hiroyuki Otake and
Koji Hosono and
Hitoshi Shiga and
Yoshihisa Watanabe and
Takuya Futatsuyama and
Yoshihiko Shindo and
Masatsugu Kojima and
Makoto Iwai and
Masanobu Shirakawa and
Masayuki Ichige and
Kazuo Hatakeyama and
Shinichi Tanaka and
Teruhiko Kamei and
Jia{-}Yi Fu and
Adi Cernea and
Yan Li and
Masaaki Higashitani and
Gertjan Hemink and
Shinji Sato and
Ken Oowada and
Shih{-}Chung Lee and
Naoki Hayashida and
Jun Wan and
Jeffrey Lutze and
Shouchang Tsao and
Mehrdad Mofidi and
Kiyofumi Sakurai and
Naoya Tokiwa and
Hiroko Waki and
Yasumitsu Nozawa and
Kazuhisa Kanazawa and
Shigeo Ohshima},
title = {A 56-nm {CMOS} 99-mm\({}^{\mbox{2}}\) 8-Gb Multi-Level {NAND} Flash
Memory With 10-MB/s Program Throughput},
journal = {{IEEE} J. Solid State Circuits},
volume = {42},
number = {1},
pages = {219--232},
year = {2007},
url = {https://doi.org/10.1109/JSSC.2006.888299},
doi = {10.1109/JSSC.2006.888299},
timestamp = {Thu, 14 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/TakeuchiKFOHSWF07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HaraFKSHMNAKFTA06,
author = {Takahiko Hara and
Koichi Fukuda and
Kazuhisa Kanazawa and
Noboru Shibata and
Koji Hosono and
Hiroshi Maejima and
Michio Nakagawa and
Takumi Abe and
Masatsugu Kojima and
Masaki Fujiu and
Yoshiaki Takeuchi and
Kazumi Amemiya and
Midori Morooka and
Teruhiko Kamei and
Hiroaki Nasu and
Chi{-}Ming Wang and
Kiyofumi Sakurai and
Naoya Tokiwa and
Hiroko Waki and
Tohru Maruyama and
Susumu Yoshikawa and
Masaaki Higashitani and
Tuan D. Pham and
Yupin Fong and
Toshiharu Watanabe},
title = {A 146-mm\({}^{\mbox{2}}\) 8-gb multi-level {NAND} flash memory with
70-nm {CMOS} technology},
journal = {{IEEE} J. Solid State Circuits},
volume = {41},
number = {1},
pages = {161--169},
year = {2006},
url = {https://doi.org/10.1109/JSSC.2005.859027},
doi = {10.1109/JSSC.2005.859027},
timestamp = {Fri, 22 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/HaraFKSHMNAKFTA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/TakeuchiKFOHSWF06,
author = {Ken Takeuchi and
Yasushi Kameda and
Susumu Fujimura and
Hiroyuki Otake and
Koji Hosono and
Hitoshi Shiga and
Yoshihisa Watanabe and
Takuya Futatsuyama and
Yoshihiko Shindo and
Masatsugu Kojima and
Makoto Iwai and
Masanobu Shirakawa and
Masayuki Ichige and
Kazuo Hatakeyama and
Shinichi Tanaka and
Teruhiko Kamei and
Jia{-}Yi Fu and
Adi Cernea and
Yan Li and
Masaaki Higashitani and
Gertjan Hemink and
Shinji Sato and
Ken Oowada and
Shih{-}Chung Lee and
Naoki Hayashida and
Jun Wan and
Jeffrey Lutze and
Shouchang Tsao and
Mehrdad Mofidi and
Kiyofumi Sakurai and
Naoya Tokiwa and
Hiroko Waki and
Yasumitsu Nozawa and
Kazuhisa Kanazawa and
Shigeo Ohshima},
title = {A 56nm {CMOS} 99mm2 8Gb Multi-level {NAND} Flash Memory with 10MB/s
Program Throughput},
booktitle = {2006 {IEEE} International Solid State Circuits Conference, {ISSCC}
2006, Digest of Technical Papers, an Francisco, CA, USA, February
6-9, 2006},
pages = {507--516},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISSCC.2006.1696083},
doi = {10.1109/ISSCC.2006.1696083},
timestamp = {Thu, 14 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/TakeuchiKFOHSWF06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/TanzawaUTSHTMTW02,
author = {Toru Tanzawa and
Akira Umezawa and
Tadayuki Taura and
Hitoshi Shiga and
Tokumasa Hara and
Yoshinori Takano and
Takeshi Miyaba and
Naoya Tokiwa and
Kentaro Watanabe and
Hiroshi Watanabe and
Kazunori Masuda and
Kiyomi Naruke and
Hideo Kato and
Shigeru Atsumi},
title = {A 44-mm\({}^{\mbox{2}}\) four-bank eight-word page-read 64-Mb flash
memory with flexible block redundancy and fast accurate word-line
voltage controller},
journal = {{IEEE} J. Solid State Circuits},
volume = {37},
number = {11},
pages = {1485--1492},
year = {2002},
url = {https://doi.org/10.1109/JSSC.2002.802356},
doi = {10.1109/JSSC.2002.802356},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/TanzawaUTSHTMTW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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