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ORCIDBibTeX records: Lionel Torres
@inproceedings{DBLP:conf/dac/HuppertCTN22,
author = {Quentin Huppert and
Francky Catthoor and
Lionel Torres and
David Novo},
editor = {Rob Oshana},
title = {Pref-X: a framework to reveal data prefetching in commercial in-order
cores},
booktitle = {{DAC} '22: 59th {ACM/IEEE} Design Automation Conference, San Francisco,
California, USA, July 10 - 14, 2022},
pages = {1051--1056},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3489517.3530569},
doi = {10.1145/3489517.3530569},
timestamp = {Thu, 25 Aug 2022 14:23:32 +0200},
biburl = {https://dblp.org/rec/conf/dac/HuppertCTN22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/DelestracTN22,
author = {Paul Delestrac and
Lionel Torres and
David Novo},
title = {Demystifying the TensorFlow Eager Execution of Deep Learning Inference
on a {CPU-GPU} Tandem},
booktitle = {25th Euromicro Conference on Digital System Design, {DSD} 2022, Maspalomas,
Spain, August 31 - Sept. 2, 2022},
pages = {446--455},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DSD57027.2022.00066},
doi = {10.1109/DSD57027.2022.00066},
timestamp = {Mon, 09 Jan 2023 17:07:14 +0100},
biburl = {https://dblp.org/rec/conf/dsd/DelestracTN22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HuppertEPCTN21,
author = {Quentin Huppert and
Timon Evenblij and
Manu Perumkunnil and
Francky Catthoor and
Lionel Torres and
David Novo},
title = {Memory Hierarchy Calibration Based on Real Hardware In-order Cores
for Accurate Simulation},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2021, Grenoble, France, February 1-5, 2021},
pages = {707--710},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.23919/DATE51398.2021.9474108},
doi = {10.23919/DATE51398.2021.9474108},
timestamp = {Wed, 21 Jul 2021 10:04:34 +0200},
biburl = {https://dblp.org/rec/conf/date/HuppertEPCTN21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/NejatOMCMT20,
author = {Arash Nejat and
Frederic Ouattara and
Mohammad Mohammadinodoushan and
Bertrand Cambou and
Ken Mackay and
Lionel Torres},
title = {Practical Experiments to Evaluate Quality Metrics of MRAM-Based Physical
Unclonable Functions},
journal = {{IEEE} Access},
volume = {8},
pages = {176042--176049},
year = {2020},
url = {https://doi.org/10.1109/ACCESS.2020.3024598},
doi = {10.1109/ACCESS.2020.3024598},
timestamp = {Thu, 16 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/NejatOMCMT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/TahooriNBTSPBPP20,
author = {Mehdi Baradaran Tahoori and
Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Lionel Torres and
Sophiane Senni and
Guillaume Patrigeon and
Pascal Benoit and
Gregory di Pendina and
Guillaume Prenat},
title = {A Universal Spintronic Technology based on Multifunctional Standardized
Stack},
booktitle = {2020 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020},
pages = {394--399},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.23919/DATE48585.2020.9116321},
doi = {10.23919/DATE48585.2020.9116321},
timestamp = {Fri, 26 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/TahooriNBTSPBPP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rev/BruguierLPDBT20,
author = {Florent Bruguier and
Emmanuelle Lecointre and
Beatrice Pradarelli and
Loic Dalmasso and
Pascal Benoit and
Lionel Torres},
editor = {Michael E. Auer and
Dominik May},
title = {Teaching Hardware Security: Earnings of an Introduction Proposed as
an Escape Game},
booktitle = {Cross Reality and Data Science in Engineering - Proceedings of the
17th International Conference on Remote Engineering and Virtual Instrumentation,
{REV} 2020, Athens, GA, USA, 26-28 February, 2020},
series = {Advances in Intelligent Systems and Computing},
volume = {1231},
pages = {729--741},
publisher = {Springer},
year = {2020},
url = {https://doi.org/10.1007/978-3-030-52575-0\_60},
doi = {10.1007/978-3-030-52575-0\_60},
timestamp = {Thu, 10 Dec 2020 13:31:19 +0100},
biburl = {https://dblp.org/rec/conf/rev/BruguierLPDBT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/DalmassoBBT19,
author = {Loic Dalmasso and
Florent Bruguier and
Pascal Benoit and
Lionel Torres},
title = {Evaluation of SPN-Based Lightweight Crypto-Ciphers},
journal = {{IEEE} Access},
volume = {7},
pages = {10559--10567},
year = {2019},
url = {https://doi.org/10.1109/ACCESS.2018.2889790},
doi = {10.1109/ACCESS.2018.2889790},
timestamp = {Sat, 21 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/DalmassoBBT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/PatrigeonBTSPP19,
author = {Guillaume Patrigeon and
Pascal Benoit and
Lionel Torres and
Sophiane Senni and
Guillaume Prenat and
Gregory di Pendina},
title = {Design and Evaluation of a 28-nm {FD-SOI} {STT-MRAM} for Ultra-Low
Power Microcontrollers},
journal = {{IEEE} Access},
volume = {7},
pages = {58085--58093},
year = {2019},
url = {https://doi.org/10.1109/ACCESS.2019.2906942},
doi = {10.1109/ACCESS.2019.2906942},
timestamp = {Tue, 21 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/PatrigeonBTSPP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/OuattaraNTM19,
author = {Frederic Ouattara and
Arash Nejat and
Lionel Torres and
Ken Mackay},
title = {Practical Experiments on Fabricated {TAS-MRAM} Dies to Evaluate the
Stochastic Behavior of Voltage-Controlled TRNGs},
journal = {{IEEE} Access},
volume = {7},
pages = {59271--59277},
year = {2019},
url = {https://doi.org/10.1109/ACCESS.2019.2907186},
doi = {10.1109/ACCESS.2019.2907186},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/OuattaraNTM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/BenoitDPGBT19,
author = {Pascal Benoit and
Loic Dalmasso and
Guillaume Patrigeon and
Thierry Gil and
Florent Bruguier and
Lionel Torres},
title = {Edge-Computing Perspectives with Reconfigurable Hardware},
booktitle = {14th International Symposium on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2019, York, United Kingdom, July 1-3, 2019},
pages = {51--58},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ReCoSoC48741.2019.9034961},
doi = {10.1109/RECOSOC48741.2019.9034961},
timestamp = {Mon, 23 Mar 2020 13:19:56 +0100},
biburl = {https://dblp.org/rec/conf/recosoc/BenoitDPGBT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sas2/PatrigeonLBT19,
author = {Guillaume Patrigeon and
Paul Leloup and
Pascal Benoit and
Lionel Torres},
title = {FlexNode: a reconfigurable Internet of Things node for design evaluation},
booktitle = {{IEEE} Sensors Applications Symposium, {SAS} 2019, Sophia Antipolis,
France, March 11-13, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/SAS.2019.8706095},
doi = {10.1109/SAS.2019.8706095},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sas2/PatrigeonLBT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/AhmadNBST18,
author = {Mohamad El Ahmad and
Mohamad Najem and
Pascal Benoit and
Gilles Sassatelli and
Lionel Torres},
title = {PoETE: {A} Method to Design Temperature-Aware Integrated Systems},
journal = {J. Low Power Electron.},
volume = {14},
number = {1},
pages = {1--7},
year = {2018},
url = {https://doi.org/10.1166/jolpe.2018.1545},
doi = {10.1166/JOLPE.2018.1545},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/AhmadNBST18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/ZhangDCWTTZ18,
author = {Liuyang Zhang and
Erya Deng and
Hao Cai and
You Wang and
Lionel Torres and
Aida Todri{-}Sanial and
Youguang Zhang},
title = {A high-reliability and low-power computing-in-memory implementation
within {STT-MRAM}},
journal = {Microelectron. J.},
volume = {81},
pages = {69--75},
year = {2018},
url = {https://doi.org/10.1016/j.mejo.2018.09.005},
doi = {10.1016/J.MEJO.2018.09.005},
timestamp = {Thu, 24 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mj/ZhangDCWTTZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/BarbareschiNTM18,
author = {Mario Barbareschi and
Giorgio Di Natale and
Lionel Torres and
Antonino Mazzeo},
title = {A Ring Oscillator-Based Identification Mechanism Immune to Aging and
External Working Conditions},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {65-I},
number = {2},
pages = {700--711},
year = {2018},
url = {https://doi.org/10.1109/TCSI.2017.2727546},
doi = {10.1109/TCSI.2017.2727546},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/BarbareschiNTM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/PeneauNBTSG18,
author = {Pierre{-}Yves P{\'{e}}neau and
David Novo and
Florent Bruguier and
Lionel Torres and
Gilles Sassatelli and
Abdoulaye Gamati{\'{e}}},
editor = {Mladen Berekovic and
Rainer Buchty and
Heiko Hamann and
Dirk Koch and
Thilo Pionteck},
title = {Improving the Performance of {STT-MRAM} {LLC} Through Enhanced Cache
Replacement Policy},
booktitle = {Architecture of Computing Systems - {ARCS} 2018 - 31st International
Conference, Braunschweig, Germany, April 9-12, 2018, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10793},
pages = {168--180},
publisher = {Springer},
year = {2018},
url = {https://doi.org/10.1007/978-3-319-77610-1\_13},
doi = {10.1007/978-3-319-77610-1\_13},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arcs/PeneauNBTSG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KomalanRHSTGKFC18,
author = {Manu Komalan and
Oh Hyung Rock and
Matthias Hartmann and
Sushil Sakhare and
Christian Tenllado and
Jos{\'{e}} Ignacio G{\'{o}}mez and
Gouri Sankar Kar and
Arnaud Furn{\'{e}}mont and
Francky Catthoor and
Sophiane Senni and
David Novo and
Abdoulaye Gamati{\'{e}} and
Lionel Torres},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {Main memory organization trade-offs with {DRAM} and {STT-MRAM} options
based on gem5-NVMain simulation frameworks},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {103--108},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8341987},
doi = {10.23919/DATE.2018.8341987},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/KomalanRHSTGKFC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/TahooriNBSMMTBG18,
author = {Mehdi Baradaran Tahoori and
Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Sophiane Senni and
Jad Mohdad and
Fr{\'{e}}d{\'{e}}rick Mailly and
Lionel Torres and
Pascal Benoit and
Abdoulaye Gamati{\'{e}} and
Pascal Nouet and
Frederic Ouattara and
Gilles Sassatelli and
Kotb Jabeur and
Pierre Vanhauwaert and
A. Atitoaie and
I. Firastrau and
Gregory di Pendina and
Guillaume Prenat},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {Using multifunctional standardized stack as universal spintronic technology
for IoT},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {931--936},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342143},
doi = {10.23919/DATE.2018.8342143},
timestamp = {Tue, 26 Feb 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/TahooriNBSMMTBG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/RougetBBT18,
author = {Peter Rouget and
Beno{\^{\i}}t Badrignans and
Pascal Benoit and
Lionel Torres},
title = {{FPGA} Implementation of Pattern Matching for Industrial Control Systems},
booktitle = {2018 {IEEE} International Parallel and Distributed Processing Symposium
Workshops, {IPDPS} Workshops 2018, Vancouver, BC, Canada, May 21-25,
2018},
pages = {210--213},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/IPDPSW.2018.00040},
doi = {10.1109/IPDPSW.2018.00040},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/RougetBBT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/ZhangKCOTZTZ18,
author = {Liuyang Zhang and
Wang Kang and
Hao Cai and
Peng Ouyang and
Lionel Torres and
Youguang Zhang and
Aida Todri{-}Sanial and
Weisheng Zhao},
title = {A Robust Dual Reference Computing-in-Memory Implementation and Design
Space Exploration Within {STT-MRAM}},
booktitle = {2018 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2018,
Hong Kong, China, July 8-11, 2018},
pages = {275--280},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ISVLSI.2018.00058},
doi = {10.1109/ISVLSI.2018.00058},
timestamp = {Mon, 02 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isvlsi/ZhangKCOTZTZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/PatrigeonBT18,
author = {Guillaume Patrigeon and
Pascal Benoit and
Lionel Torres},
title = {FPGA-Based Platform for Fast Accurate Evaluation of Ultra Low Power
SoC},
booktitle = {28th International Symposium on Power and Timing Modeling, Optimization
and Simulation, {PATMOS} 2018, Platja d'Aro, Spain, July 2-4, 2018},
pages = {123--128},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/PATMOS.2018.8464173},
doi = {10.1109/PATMOS.2018.8464173},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/PatrigeonBT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/SenniOMSPBNTDPP18,
author = {Sophiane Senni and
Frederic Ouattara and
Jad Mohdad and
Kaan Sevin and
Guillaume Patrigeon and
Pascal Benoit and
Pascal Nouet and
Lionel Torres and
Fran{\c{c}}ois Duhem and
Gregory di Pendina and
Guillaume Prenat},
title = {From Spintronic Devices to Hybrid CMOS/Magnetic System On Chip},
booktitle = {{IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2018, Verona, Italy, October 8-10, 2018},
pages = {188--191},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/VLSI-SoC.2018.8644875},
doi = {10.1109/VLSI-SOC.2018.8644875},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/SenniOMSPBNTDPP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/NajemABST17,
author = {Mohamad Najem and
Mohamad El Ahmad and
Pascal Benoit and
Gilles Sassatelli and
Lionel Torres},
title = {Fine-grained monitoring for self-aware embedded systems},
journal = {Microprocess. Microsystems},
volume = {48},
pages = {3--10},
year = {2017},
url = {https://doi.org/10.1016/j.micpro.2016.09.004},
doi = {10.1016/J.MICPRO.2016.09.004},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/NajemABST17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/KooliKNBBT17,
author = {Maha Kooli and
Firas Kaddachi and
Giorgio Di Natale and
Alberto Bosio and
Pascal Benoit and
Lionel Torres},
title = {Computing reliability: On the differences between software testing
and software fault injection techniques},
journal = {Microprocess. Microsystems},
volume = {50},
pages = {102--112},
year = {2017},
url = {https://doi.org/10.1016/j.micpro.2017.02.007},
doi = {10.1016/J.MICPRO.2017.02.007},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/KooliKNBBT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NajemBAST17,
author = {Mohamad Najem and
Pascal Benoit and
Mohamad El Ahmad and
Gilles Sassatelli and
Lionel Torres},
title = {A Design-Time Method for Building Cost-Effective Run-Time Power Monitoring},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {36},
number = {7},
pages = {1153--1166},
year = {2017},
url = {https://doi.org/10.1109/TCAD.2016.2614347},
doi = {10.1109/TCAD.2016.2614347},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NajemBAST17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SenniDCPTGBS17,
author = {Sophiane Senni and
Thibaud Delobelle and
Odilia Coi and
Pierre{-}Yves Peneau and
Lionel Torres and
Abdoulaye Gamati{\'{e}} and
Pascal Benoit and
Gilles Sassatelli},
editor = {David Atienza and
Giorgio Di Natale},
title = {Embedded systems to high performance computing using {STT-MRAM}},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {536--541},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7927046},
doi = {10.23919/DATE.2017.7927046},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SenniDCPTGBS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/TahooriNBSMMTBN17,
author = {Mehdi Baradaran Tahoori and
Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Sophiane Senni and
Jad Mohdad and
Fr{\'{e}}d{\'{e}}rick Mailly and
Lionel Torres and
Pascal Benoit and
Pascal Nouet and
Rui Ma and
Martin Krei{\ss}ig and
Frank Ellinger and
Kotb Jabeur and
Pierre Vanhauwaert and
Gregory di Pendina and
Guillaume Prenat},
title = {{GREAT:} HeteroGeneous IntegRated Magnetic tEchnology Using Multifunctional
Standardized sTack},
booktitle = {2017 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2017,
Bochum, Germany, July 3-5, 2017},
pages = {344--349},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ISVLSI.2017.67},
doi = {10.1109/ISVLSI.2017.67},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/TahooriNBSMMTBN17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/CoiPSTB17,
author = {Odilia Coi and
Guillaume Patrigeon and
Sophiane Senni and
Lionel Torres and
Pascal Benoit},
title = {A novel {SRAM} - {STT-MRAM} hybrid cache implementation improving
cache performance},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {39--44},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053704},
doi = {10.1109/NANOARCH.2017.8053704},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/CoiPSTB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/RougetBBT17,
author = {Peter Rouget and
Beno{\^{\i}}t Badrignans and
Pascal Benoit and
Lionel Torres},
title = {SecBoot - lightweight secure boot mechanism for Linux-based embedded
systems on FPGAs},
booktitle = {12th International Symposium on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2017, Madrid, Spain, July 12-14, 2017},
pages = {1--5},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ReCoSoC.2017.8016144},
doi = {10.1109/RECOSOC.2017.8016144},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/RougetBBT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esticas/SenniTSGM16,
author = {Sophiane Senni and
Lionel Torres and
Gilles Sassatelli and
Abdoulaye Gamati{\'{e}} and
Bruno Mussard},
title = {Exploring {MRAM} Technologies for Energy Efficient Systems-On-Chip},
journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.},
volume = {6},
number = {3},
pages = {279--292},
year = {2016},
url = {https://doi.org/10.1109/JETCAS.2016.2547680},
doi = {10.1109/JETCAS.2016.2547680},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/esticas/SenniTSGM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/VatajeluNBTIP16,
author = {Elena Ioana Vatajelu and
Giorgio Di Natale and
Mario Barbareschi and
Lionel Torres and
Marco Indaco and
Paolo Prinetto},
title = {STT-MRAM-Based {PUF} Architecture Exploiting Magnetic Tunnel Junction
Fabrication-Induced Variability},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {13},
number = {1},
pages = {5:1--5:21},
year = {2016},
url = {https://doi.org/10.1145/2790302},
doi = {10.1145/2790302},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jetc/VatajeluNBTIP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/SenniTSG16,
author = {Sophiane Senni and
Lionel Torres and
Gilles Sassatelli and
Abdoulaye Gamati{\'{e}}},
title = {Non-Volatile Processor Based on {MRAM} for Ultra-Low-Power IoT Devices},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {13},
number = {2},
pages = {17:1--17:23},
year = {2016},
url = {https://doi.org/10.1145/3001936},
doi = {10.1145/3001936},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jetc/SenniTSG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/BarbareschiNT16,
author = {Mario Barbareschi and
Giorgio Di Natale and
Lionel Torres},
title = {Ring oscillators analysis for security purposes in Spartan-6 FPGAs},
journal = {Microprocess. Microsystems},
volume = {47},
pages = {3--10},
year = {2016},
url = {https://doi.org/10.1016/j.micpro.2016.06.005},
doi = {10.1016/J.MICPRO.2016.06.005},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/BarbareschiNT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tetc/BruguierBTBBL16,
author = {Florent Bruguier and
Pascal Benoit and
Lionel Torres and
Lyonel Barthe and
Morgan Bourree and
Victor Lomn{\'{e}}},
title = {Cost-Effective Design Strategies for Securing Embedded Processors},
journal = {{IEEE} Trans. Emerg. Top. Comput.},
volume = {4},
number = {1},
pages = {60--72},
year = {2016},
url = {https://doi.org/10.1109/TETC.2015.2407832},
doi = {10.1109/TETC.2015.2407832},
timestamp = {Fri, 15 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tetc/BruguierBTBBL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ewme/BruguierBTB16,
author = {Florent Bruguier and
Pascal Benoit and
Lionel Torres and
Lilian Bossuet},
title = {Hardware security: From concept to application},
booktitle = {11th European Workshop on Microelectronics Education, {EWME} 2016,
Southampton, UK, May 11-13, 2016},
pages = {1--6},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/EWME.2016.7496483},
doi = {10.1109/EWME.2016.7496483},
timestamp = {Wed, 16 Oct 2019 14:14:48 +0200},
biburl = {https://dblp.org/rec/conf/ewme/BruguierBTB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangTKZTCZ16,
author = {Liuyang Zhang and
Aida Todri{-}Sanial and
Wang Kang and
Youguang Zhang and
Lionel Torres and
Yuanqing Cheng and
Weisheng Zhao},
title = {Quantitative evaluation of reliability and performance for {STT-MRAM}},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2016,
Montr{\'{e}}al, QC, Canada, May 22-25, 2016},
pages = {1150--1153},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ISCAS.2016.7527449},
doi = {10.1109/ISCAS.2016.7527449},
timestamp = {Mon, 02 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ZhangTKZTCZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mcsoc/ButkoBGSNTR16,
author = {Anastasiia Butko and
Florent Bruguier and
Abdoulaye Gamati{\'{e}} and
Gilles Sassatelli and
David Novo and
Lionel Torres and
Michel Robert},
title = {Full-System Simulation of big.LITTLE Multicore Architecture for Performance
and Energy Exploration},
booktitle = {10th {IEEE} International Symposium on Embedded Multicore/Many-core
Systems-on-Chip, {MCSOC} 2016, Lyon, France, September 21-23, 2016},
pages = {201--208},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/MCSoC.2016.20},
doi = {10.1109/MCSOC.2016.20},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mcsoc/ButkoBGSNTR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/PeneauBGRBSTS16,
author = {Pierre{-}Yves Peneau and
Rabab Bouziane and
Abdoulaye Gamati{\'{e}} and
Erven Rohou and
Florent Bruguier and
Gilles Sassatelli and
Lionel Torres and
Sophiane Senni},
title = {Loop optimization in presence of {STT-MRAM} caches: {A} study of performance-energy
tradeoffs},
booktitle = {26th International Workshop on Power and Timing Modeling, Optimization
and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016},
pages = {162--169},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/PATMOS.2016.7833682},
doi = {10.1109/PATMOS.2016.7833682},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/PeneauBGRBSTS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jce/PerinIMT15,
author = {Guilherme Perin and
Laurent Imbert and
Philippe Maurine and
Lionel Torres},
title = {Vertical and horizontal correlation attacks on RNS-based exponentiations},
journal = {J. Cryptogr. Eng.},
volume = {5},
number = {3},
pages = {171--185},
year = {2015},
url = {https://doi.org/10.1007/s13389-015-0095-0},
doi = {10.1007/S13389-015-0095-0},
timestamp = {Thu, 09 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jce/PerinIMT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/BossuetFGTG15,
author = {Lilian Bossuet and
Viktor Fischer and
Lubos Gaspar and
Lionel Torres and
Guy Gogniat},
title = {Disposable configuration of remotely reconfigurable systems},
journal = {Microprocess. Microsystems},
volume = {39},
number = {6},
pages = {382--392},
year = {2015},
url = {https://doi.org/10.1016/j.micpro.2015.05.007},
doi = {10.1016/J.MICPRO.2015.05.007},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/BossuetFGTG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SenniBTSGM15,
author = {Sophiane Senni and
Raphael Martins Brum and
Lionel Torres and
Gilles Sassatelli and
Abdoulaye Gamati{\'{e}} and
Bruno Mussard},
editor = {Wolfgang Nebel and
David Atienza},
title = {Potential applications based on {NVM} emerging technologies},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {1012--1017},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2757049},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SenniBTSGM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dtis/KooliBBT15,
author = {Maha Kooli and
Alberto Bosio and
Pascal Benoit and
Lionel Torres},
title = {Software testing and software fault injection},
booktitle = {10th International Conference on Design {\&} Technology of Integrated
Systems in Nanoscale Era, {DTIS} 2015, Napoli, Italy, April 21-23,
2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/DTIS.2015.7127370},
doi = {10.1109/DTIS.2015.7127370},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/dtis/KooliBBT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/RamponPTBNB15,
author = {J{\'{e}}r{\^{o}}me Rampon and
Renaud Perillat and
Lionel Torres and
Pascal Benoit and
Giorgio Di Natale and
Mario Barbareschi},
title = {Digital Right Management for {IP} Protection},
booktitle = {2015 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2015,
Montpellier, France, July 8-10, 2015},
pages = {200--203},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVLSI.2015.127},
doi = {10.1109/ISVLSI.2015.127},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/RamponPTBNB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/LopesPZBT15,
author = {Jeremy Lopes and
Gregory di Pendina and
Eldar Zianbetov and
Edith Beign{\'{e}} and
Lionel Torres},
title = {Radiative Effects on MRAM-Based Non-Volatile Elementary Structures},
booktitle = {2015 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2015,
Montpellier, France, July 8-10, 2015},
pages = {321--326},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVLSI.2015.71},
doi = {10.1109/ISVLSI.2015.71},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/LopesPZBT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/ClementMNT15,
author = {J{\'{e}}r{\'{e}}mie Cl{\'{e}}ment and
Bruno Mussard and
David Naccache and
Lionel Torres},
title = {Implementation of {AES} Using {NVM} Memories Based on Comparison Function},
booktitle = {2015 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2015,
Montpellier, France, July 8-10, 2015},
pages = {356--361},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVLSI.2015.37},
doi = {10.1109/ISVLSI.2015.37},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/ClementMNT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/SenniTSGM15,
author = {Sophiane Senni and
Lionel Torres and
Gilles Sassatelli and
Abdoulaye Gamati{\'{e}} and
Bruno Mussard},
title = {Emerging Non-volatile Memory Technologies Exploration Flow for Processor
Architecture},
booktitle = {2015 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2015,
Montpellier, France, July 8-10, 2015},
pages = {460},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVLSI.2015.126},
doi = {10.1109/ISVLSI.2015.126},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/SenniTSGM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/VatajeluNTP15,
author = {Elena Ioana Vatajelu and
Giorgio Di Natale and
Lionel Torres and
Paolo Prinetto},
title = {STT-MRAM-Based Strong {PUF} Architecture},
booktitle = {2015 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2015,
Montpellier, France, July 8-10, 2015},
pages = {467--472},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVLSI.2015.128},
doi = {10.1109/ISVLSI.2015.128},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isvlsi/VatajeluNTP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/ButkoGSTR15,
author = {Anastasiia Butko and
Abdoulaye Gamati{\'{e}} and
Gilles Sassatelli and
Lionel Torres and
Michel Robert},
title = {Design Exploration for next Generation High-Performance Manycore On-chip
Systems: Application to big.LITTLE Architectures},
booktitle = {2015 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2015,
Montpellier, France, July 8-10, 2015},
pages = {551--556},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVLSI.2015.28},
doi = {10.1109/ISVLSI.2015.28},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/ButkoGSTR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WuCWTSTZ15,
author = {Bi Wu and
Yuanqing Cheng and
Ying Wang and
Aida Todri{-}Sanial and
Guangyu Sun and
Lionel Torres and
Weisheng Zhao},
title = {An architecture-level cache simulation framework supporting advanced
{PMA} {STT-MRAM}},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {7--12},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180576},
doi = {10.1109/NANOARCH.2015.7180576},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WuCWTSTZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/norchip/AhmadNBST15,
author = {Mohamad El Ahmad and
Mohamad Najem and
Pascal Benoit and
Gilles Sassatelli and
Lionel Torres},
title = {Adaptive Power monitoring for self-aware embedded systems},
booktitle = {Nordic Circuits and Systems Conference, {NORCAS} 2015: {NORCHIP} {\&}
International Symposium on System-on-Chip (SoC), Oslo, Norway, October
26-28, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/NORCHIP.2015.7364364},
doi = {10.1109/NORCHIP.2015.7364364},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/norchip/AhmadNBST15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/DruyerTBBL15,
author = {R{\'{e}}my Druyer and
Lionel Torres and
Pascal Benoit and
Paul{-}Vincent Bonzom and
Patrick Le{-}Qu{\'{e}}r{\'{e}}},
title = {A survey on security features in modern FPGAs},
booktitle = {10th International Symposium on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2015, Bremen, Germany, June 29 - July 1,
2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ReCoSoC.2015.7238102},
doi = {10.1109/RECOSOC.2015.7238102},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/DruyerTBBL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mr/KastensmidtTBRW14,
author = {Fernanda Lima Kastensmidt and
Jorge L. Tonfat and
Thiago Hanna Both and
Paolo Rech and
Gilson I. Wirth and
Ricardo Reis and
Florent Bruguier and
Pascal Benoit and
Lionel Torres and
Christopher Frost},
title = {Voltage scaling and aging effects on soft error rate in SRAM-based
FPGAs},
journal = {Microelectron. Reliab.},
volume = {54},
number = {9-10},
pages = {2344--2348},
year = {2014},
url = {https://doi.org/10.1016/j.microrel.2014.07.100},
doi = {10.1016/J.MICROREL.2014.07.100},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mr/KastensmidtTBRW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cosade/PerinITM14,
author = {Guilherme Perin and
Laurent Imbert and
Lionel Torres and
Philippe Maurine},
editor = {Emmanuel Prouff},
title = {Attacking Randomized Exponentiations Using Unsupervised Learning},
booktitle = {Constructive Side-Channel Analysis and Secure Design - 5th International
Workshop, {COSADE} 2014, Paris, France, April 13-15, 2014. Revised
Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {8622},
pages = {144--160},
publisher = {Springer},
year = {2014},
url = {https://doi.org/10.1007/978-3-319-10175-0\_11},
doi = {10.1007/978-3-319-10175-0\_11},
timestamp = {Tue, 14 May 2019 10:00:39 +0200},
biburl = {https://dblp.org/rec/conf/cosade/PerinITM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AkgulPLBPBT14,
author = {Yeter Akgul and
Diego Puschini and
Suzanne Lesecq and
Edith Beign{\'{e}} and
Ivan Miro Panades and
Pascal Benoit and
Lionel Torres},
title = {Power management through {DVFS} and dynamic body biasing in {FD-SOI}
circuits},
booktitle = {The 51st Annual Design Automation Conference 2014, {DAC} '14, San
Francisco, CA, USA, June 1-5, 2014},
pages = {183:1--183:6},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2593069.2593185},
doi = {10.1145/2593069.2593185},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/AkgulPLBPBT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/KastensmidtTBRWRBBTF14,
author = {Fernanda Lima Kastensmidt and
Jorge L. Tonfat and
Thiago Hanna Both and
Paolo Rech and
Gilson I. Wirth and
Ricardo Reis and
Florent Bruguier and
Pascal Benoit and
Lionel Torres and
Christopher Frost},
editor = {Giorgio Di Natale},
title = {Aging and voltage scaling impacts under neutron-induced soft error
rate in SRAM-based FPGAs},
booktitle = {19th {IEEE} European Test Symposium, {ETS} 2014, Paderborn, Germany,
May 26-30, 2014},
pages = {1--2},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ETS.2014.6847845},
doi = {10.1109/ETS.2014.6847845},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/KastensmidtTBRWRBBTF14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AmouriBKBTT14,
author = {Abdulazim Amouri and
Florent Bruguier and
Saman Kiamehr and
Pascal Benoit and
Lionel Torres and
Mehdi Baradaran Tahoori},
title = {Aging effects in FPGAs: an experimental analysis},
booktitle = {24th International Conference on Field Programmable Logic and Applications,
{FPL} 2014, Munich, Germany, 2-4 September, 2014},
pages = {1--4},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/FPL.2014.6927390},
doi = {10.1109/FPL.2014.6927390},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AmouriBKBTT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NajemBBST14,
author = {Mohamad Najem and
Pascal Benoit and
Florent Bruguier and
Gilles Sassatelli and
Lionel Torres},
title = {Method for dynamic power monitoring on FPGAs},
booktitle = {24th International Conference on Field Programmable Logic and Applications,
{FPL} 2014, Munich, Germany, 2-4 September, 2014},
pages = {1--6},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/FPL.2014.6927457},
doi = {10.1109/FPL.2014.6927457},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/NajemBBST14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/SenniTSBM14,
author = {Sophiane Senni and
Lionel Torres and
Gilles Sassatelli and
Anastasiia Butko and
Bruno Mussard},
title = {Exploration of Magnetic {RAM} Based Memory Hierarchy for Multicore
Architecture},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2014, Tampa,
FL, USA, July 9-11, 2014},
pages = {248--251},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISVLSI.2014.29},
doi = {10.1109/ISVLSI.2014.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/SenniTSBM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/KooliBNTS14,
author = {Maha Kooli and
Pascal Benoit and
Giorgio Di Natale and
Lionel Torres and
Volkmar Sieh},
title = {Fault injection tools based on Virtual Machines},
booktitle = {9th International Symposium on Reconfigurable and Communication-Centric
Systems-on-Chip, ReCoSoC 2014, Montpellier, France, May 26-28, 2014},
pages = {1--6},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ReCoSoC.2014.6861351},
doi = {10.1109/RECOSOC.2014.6861351},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/KooliBNTS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/SenniTSBM14,
author = {Sophiane Senni and
Lionel Torres and
Gilles Sassatelli and
Anastasiia Butko and
Bruno Mussard},
title = {Power efficient Thermally Assisted Switching Magnetic memory based
memory systems},
booktitle = {9th International Symposium on Reconfigurable and Communication-Centric
Systems-on-Chip, ReCoSoC 2014, Montpellier, France, May 26-28, 2014},
pages = {1--6},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ReCoSoC.2014.6861357},
doi = {10.1109/RECOSOC.2014.6861357},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/SenniTSBM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MansouriBTC13,
author = {Imen Mansouri and
Pascal Benoit and
Lionel Torres and
Fabien Clermidy},
title = {Fine-Grain Dynamic Energy Tracking for System on Chip},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {60-II},
number = {6},
pages = {356--360},
year = {2013},
url = {https://doi.org/10.1109/TCSII.2013.2258246},
doi = {10.1109/TCSII.2013.2258246},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MansouriBTC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cardis/PerinITM13,
author = {Guilherme Perin and
Laurent Imbert and
Lionel Torres and
Philippe Maurine},
editor = {Aur{\'{e}}lien Francillon and
Pankaj Rohatgi},
title = {Practical Analysis of {RSA} Countermeasures Against Side-Channel Electromagnetic
Attacks},
booktitle = {Smart Card Research and Advanced Applications - 12th International
Conference, {CARDIS} 2013, Berlin, Germany, November 27-29, 2013.
Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {8419},
pages = {200--215},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-319-08302-5\_14},
doi = {10.1007/978-3-319-08302-5\_14},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/cardis/PerinITM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/PerinITM13,
author = {Guilherme Perin and
Laurent Imbert and
Lionel Torres and
Philippe Maurine},
title = {Electromagnetic Analysis on {RSA} Algorithm Based on {RNS}},
booktitle = {2013 Euromicro Conference on Digital System Design, {DSD} 2013, Los
Alamitos, CA, USA, September 4-6, 2013},
pages = {345--352},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/DSD.2013.44},
doi = {10.1109/DSD.2013.44},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/PerinITM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TorresBCS13,
author = {Lionel Torres and
Raphael Martins Brum and
Luis Vit{\'{o}}rio Cargnini and
Gilles Sassatelli},
title = {Trends on the application of emerging nonvolatile memory to processors
and programmable devices},
booktitle = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013),
Beijing, China, May 19-23, 2013},
pages = {101--104},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISCAS.2013.6571792},
doi = {10.1109/ISCAS.2013.6571792},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TorresBCS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/TarrilloTKRBBBT13,
author = {Jimmy Tarrillo and
Jorge L. Tonfat and
Fernanda Lima Kastensmidt and
Ricardo Reis and
Florent Bruguier and
Morgan Bourree and
Pascal Benoit and
Lionel Torres},
title = {Using electromagnetic emanations for variability characterization
in Flash-based FPGAs},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2013, Natal,
Brazil, August 5-7, 2013},
pages = {109--114},
publisher = {{IEEE} Computer Socity},
year = {2013},
url = {https://doi.org/10.1109/ISVLSI.2013.6654631},
doi = {10.1109/ISVLSI.2013.6654631},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isvlsi/TarrilloTKRBBBT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/newcas/TorresBGSC13,
author = {Lionel Torres and
Raphael Martins Brum and
Yoann Guillemenet and
Gilles Sassatelli and
Luis Vit{\'{o}}rio Cargnini},
title = {Evaluation of hybrid {MRAM/CMOS} cells for reconfigurable computing},
booktitle = {{IEEE} 11th International New Circuits and Systems Conference, {NEWCAS}
2013, Paris, France, June 16-19, 2013},
pages = {1--6},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/NEWCAS.2013.6573676},
doi = {10.1109/NEWCAS.2013.6573676},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/newcas/TorresBGSC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/AkgulPLBBT13,
author = {Yeter Akgul and
Diego Puschini and
Suzanne Lesecq and
Edith Beign{\'{e}} and
Pascal Benoit and
Lionel Torres},
title = {Methodology for Power Mode selection in {FD-SOI} circuits with {DVFS}
and Dynamic Body Biasing},
booktitle = {2013 23rd International Workshop on Power and Timing Modeling, Optimization
and Simulation (PATMOS), Karlsruhe, Germany, September 9-11, 2013},
pages = {199--206},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/PATMOS.2013.6662174},
doi = {10.1109/PATMOS.2013.6662174},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/patmos/AkgulPLBBT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/DehbaouiLOTRM12,
author = {Amine Dehbaoui and
Victor Lomn{\'{e}} and
Thomas Ordas and
Lionel Torres and
Michel Robert and
Philippe Maurine},
title = {Enhancing Electromagnetic Analysis Using Magnitude Squared Incoherence},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {20},
number = {3},
pages = {573--577},
year = {2012},
url = {https://doi.org/10.1109/TVLSI.2011.2104984},
doi = {10.1109/TVLSI.2011.2104984},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/DehbaouiLOTRM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PerinTBM12,
author = {Guilherme Perin and
Lionel Torres and
Pascal Benoit and
Philippe Maurine},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {Amplitude demodulation-based {EM} analysis of different {RSA} implementations},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {1167--1172},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176670},
doi = {10.1109/DATE.2012.6176670},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/PerinTBM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DevicTCBB12,
author = {Florian Devic and
Lionel Torres and
J{\'{e}}r{\'{e}}mie Crenne and
Beno{\^{\i}}t Badrignans and
Pascal Benoit},
editor = {Dirk Koch and
Satnam Singh and
Jim T{\o}rresen},
title = {SecURe {DPR:} Secure update preventing replay attacks for dynamic
partial reconfiguration},
booktitle = {22nd International Conference on Field Programmable Logic and Applications
(FPL), Oslo, Norway, August 29-31, 2012},
pages = {57--62},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/FPL.2012.6339241},
doi = {10.1109/FPL.2012.6339241},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/DevicTCBB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/CotretDGBT12,
author = {Pascal Cotret and
Florian Devic and
Guy Gogniat and
Beno{\^{\i}}t Badrignans and
Lionel Torres},
editor = {Leandro Soares Indrusiak and
Guy Gogniat and
Nikolaos S. Voros},
title = {Security enhancements for FPGA-based MPSoCs: {A} boot-to-runtime protection
flow for an embedded Linux-based system},
booktitle = {7th International Workshop on Reconfigurable and Communication-Centric
Systems-on-Chip (ReCoSoC), York, United Kingdom, July 9-11, 2012},
pages = {1--8},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ReCoSoC.2012.6322896},
doi = {10.1109/RECOSOC.2012.6322896},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/CotretDGBT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/SoaresCMMT11,
author = {Rafael Iankowski Soares and
Ney Laert Vilar Calazans and
Fernando Gehm Moraes and
Philippe Maurine and
Lionel Torres},
title = {A Robust Architectural Approach for Cryptographic Algorithms Using
{GALS} Pipelines},
journal = {{IEEE} Des. Test Comput.},
volume = {28},
number = {5},
pages = {62--71},
year = {2011},
url = {https://doi.org/10.1109/MDT.2011.69},
doi = {10.1109/MDT.2011.69},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/SoaresCMMT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esl/AlmeidaBOBSBTR11,
author = {Gabriel Marchesan Almeida and
R{\'{e}}mi Busseuil and
Luciano Ost and
Florent Bruguier and
Gilles Sassatelli and
Pascal Benoit and
Lionel Torres and
Michel Robert},
title = {{PI} and {PID} Regulation Approaches for Performance-Constrained Adaptive
Multiprocessor System-on-Chip},
journal = {{IEEE} Embed. Syst. Lett.},
volume = {3},
number = {3},
pages = {77--80},
year = {2011},
url = {https://doi.org/10.1109/LES.2011.2166373},
doi = {10.1109/LES.2011.2166373},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/esl/AlmeidaBOBSBTR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BruguierBMT11,
author = {Florent Bruguier and
Pascal Benoit and
Philippe Maurine and
Lionel Torres},
title = {A New Process Characterization Method for FPGAs Based on Electromagnetic
Analysis},
booktitle = {International Conference on Field Programmable Logic and Applications,
{FPL} 2011, September 5-7, Chania, Crete, Greece},
pages = {20--23},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/FPL.2011.15},
doi = {10.1109/FPL.2011.15},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/BruguierBMT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BartheCBT11,
author = {Lyonel Barthe and
Luis Vit{\'{o}}rio Cargnini and
Pascal Benoit and
Lionel Torres},
title = {Optimizing an Open-Source Processor for FPGAs: {A} Case Study},
booktitle = {International Conference on Field Programmable Logic and Applications,
{FPL} 2011, September 5-7, Chania, Crete, Greece},
pages = {551--556},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/FPL.2011.107},
doi = {10.1109/FPL.2011.107},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/BartheCBT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TorresZ11,
author = {Lionel Torres and
Weisheng Zhao},
editor = {David Atienza and
Yuan Xie and
Jos{\'{e}} L. Ayala and
Ken S. Stevens},
title = {Magnetic memory (MRAM), a new area for 2D and 3D SoC/SiP design},
booktitle = {Proceedings of the 21st {ACM} Great Lakes Symposium on {VLSI} 2010,
Lausanne, Switzerland, May 2-6, 2011},
pages = {429--430},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/1973009.1973103},
doi = {10.1145/1973009.1973103},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/TorresZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhaoTGCLKRSC11,
author = {Weisheng Zhao and
Lionel Torres and
Yoann Guillemenet and
Luis Vit{\'{o}}rio Cargnini and
Yahya Lakys and
Jacques{-}Olivier Klein and
Dafine Ravelosona and
Gilles Sassatelli and
Claude Chappert},
editor = {David Atienza and
Yuan Xie and
Jos{\'{e}} L. Ayala and
Ken S. Stevens},
title = {Design of {MRAM} based logic circuits and its applications},
booktitle = {Proceedings of the 21st {ACM} Great Lakes Symposium on {VLSI} 2010,
Lausanne, Switzerland, May 2-6, 2011},
pages = {431--436},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/1973009.1973104},
doi = {10.1145/1973009.1973104},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhaoTGCLKRSC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/RothASOHSBTB11,
author = {Christoph Roth and
Gabriel Marchesan Almeida and
Oliver Sander and
Luciano Ost and
Nicolas Hebert and
Gilles Sassatelli and
Pascal Benoit and
Lionel Torres and
J{\"{u}}rgen Becker},
title = {Modular Framework for Multi-level Multi-device MPSoC Simulation},
booktitle = {25th {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2011, Anchorage, Alaska, USA, 16-20 May 2011 - Workshop Proceedings},
pages = {136--142},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/IPDPS.2011.134},
doi = {10.1109/IPDPS.2011.134},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/RothASOHSBTB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/DevicTB11,
author = {Florian Devic and
Lionel Torres and
Beno{\^{\i}}t Badrignans},
title = {Securing Boot of an Embedded Linux on {FPGA}},
booktitle = {25th {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2011, Anchorage, Alaska, USA, 16-20 May 2011 - Workshop Proceedings},
pages = {189--195},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/IPDPS.2011.141},
doi = {10.1109/IPDPS.2011.141},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/DevicTB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/BartheCBT11,
author = {Lyonel Barthe and
Luis Vit{\'{o}}rio Cargnini and
Pascal Benoit and
Lionel Torres},
title = {The SecretBlaze: {A} Configurable and Cost-Effective Open-Source Soft-Core
Processor},
booktitle = {25th {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2011, Anchorage, Alaska, USA, 16-20 May 2011 - Workshop Proceedings},
pages = {310--313},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/IPDPS.2011.154},
doi = {10.1109/IPDPS.2011.154},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/BartheCBT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AlmeidaBCHVSBTM11,
author = {Gabriel Marchesan Almeida and
R{\'{e}}mi Busseuil and
Everton Alceu Carara and
Nicolas Hebert and
Sameer Varyani and
Gilles Sassatelli and
Pascal Benoit and
Lionel Torres and
Fernando Gehm Moraes},
title = {Predictive Dynamic Frequency Scaling for Multi-Processor Systems-on-Chip},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
15-19 2011, Rio de Janeiro, Brazil},
pages = {1500--1503},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISCAS.2011.5937859},
doi = {10.1109/ISCAS.2011.5937859},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AlmeidaBCHVSBTM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HebertABST11,
author = {Nicolas Hebert and
Gabriel Marchesan Almeida and
Pascal Benoit and
Gilles Sassatelli and
Lionel Torres},
title = {Evaluation of a distributed fault handler method for MPSoC},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
15-19 2011, Rio de Janeiro, Brazil},
pages = {2329--2332},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISCAS.2011.5938069},
doi = {10.1109/ISCAS.2011.5938069},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HebertABST11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/PendinaTPGT11,
author = {Gregory di Pendina and
Kholdoun Torki and
Guillaume Prenat and
Yoann Guillemenet and
Lionel Torres},
editor = {Jos{\'{e}} L. Ayala and
Braulio Garc{\'{\i}}a{-}C{\'{a}}mara and
Manuel Prieto and
Martino Ruggiero and
Gilles Sicard},
title = {Ultra Compact Non-volatile Flip-Flop for Low Power Digital Circuits
Based on Hybrid CMOS/Magnetic Technology},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization,
and Simulation - 21st International Workshop, {PATMOS} 2011, Madrid,
Spain, September 26-29, 2011. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6951},
pages = {83--91},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-24154-3\_9},
doi = {10.1007/978-3-642-24154-3\_9},
timestamp = {Sun, 02 Oct 2022 16:13:24 +0200},
biburl = {https://dblp.org/rec/conf/patmos/PendinaTPGT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/BusseuilBAOBSBRT11,
author = {R{\'{e}}mi Busseuil and
Lyonel Barthe and
Gabriel Marchesan Almeida and
Luciano Ost and
Florent Bruguier and
Gilles Sassatelli and
Pascal Benoit and
Michel Robert and
Lionel Torres},
editor = {Peter M. Athanas and
J{\"{u}}rgen Becker and
Ren{\'{e}} Cumplido},
title = {Open-Scale: {A} Scalable, Open-Source NOC-based MPSoC for Design Space
Exploration},
booktitle = {2011 International Conference on Reconfigurable Computing and FPGAs,
ReConFig 2011, Cancun, Mexico, November 30 - December 2, 2011},
pages = {357--362},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ReConFig.2011.66},
doi = {10.1109/RECONFIG.2011.66},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/BusseuilBAOBSBRT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/ZhaoTCBZGSLKERC11,
author = {Weisheng Zhao and
Lionel Torres and
Luis Vit{\'{o}}rio Cargnini and
Raphael Martins Brum and
Yue Zhang and
Yoann Guillemenet and
Gilles Sassatelli and
Yahya Lakys and
Jacques{-}Olivier Klein and
Daniel Etiemble and
Dafine Ravelosona and
Claude Chappert},
editor = {Salvador Mir and
Chi{-}Ying Tsui and
Ricardo Reis and
Oliver C. S. Choy},
title = {High Performance SoC Design Using Magnetic Logic and Memory},
booktitle = {VLSI-SoC: Advanced Research for Systems on Chip - 19th {IFIP} {WG}
10.5/IEEE International Conference on Very Large Scale Integration,
VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected
Papers},
series = {{IFIP} Advances in Information and Communication Technology},
volume = {379},
pages = {10--33},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-32770-4\_2},
doi = {10.1007/978-3-642-32770-4\_2},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/ZhaoTCBZGSLKERC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/ZhaoZLKERCTCBGS11,
author = {Weisheng Zhao and
Yue Zhang and
Yahya Lakys and
Jacques{-}Olivier Klein and
Daniel Etiemble and
D. Revelosona and
Claude Chappert and
Lionel Torres and
Luis Vit{\'{o}}rio Cargnini and
Raphael Martins Brum and
Yoann Guillemenet and
Gilles Sassatelli},
title = {Embedded {MRAM} for high-speed computing},
booktitle = {{IEEE/IFIP} 19th International Conference on {VLSI} and System-on-Chip,
VLSI-SoC 2011, Kowloon, Hong Kong, China, October 3-5, 2011},
pages = {37--42},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/VLSISoC.2011.6081627},
doi = {10.1109/VLSISOC.2011.6081627},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/ZhaoZLKERCTCBGS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/sp/hubner2011/TorresBSRCP11,
author = {Lionel Torres and
Pascal Benoit and
Gilles Sassatelli and
Michel Robert and
Fabien Clermidy and
Diego Puschini},
editor = {Michael H{\"{u}}bner and
J{\"{u}}rgen Becker},
title = {An Introduction to Multi-Core System on Chip - Trends and Challenges},
booktitle = {Multiprocessor System-on-Chip - Hardware Design and Tool Integration},
pages = {1--21},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-1-4419-6460-1\_1},
doi = {10.1007/978-1-4419-6460-1\_1},
timestamp = {Wed, 28 Apr 2021 16:06:52 +0200},
biburl = {https://dblp.org/rec/books/sp/hubner2011/TorresBSRCP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/GuillemenetTS10,
author = {Yoann Guillemenet and
Lionel Torres and
Gilles Sassatelli},
title = {Non-volatile run-time field-programmable gate arrays structures using
thermally assisted switching magnetic random access memories},
journal = {{IET} Comput. Digit. Tech.},
volume = {4},
number = {3},
pages = {211--226},
year = {2010},
url = {https://doi.org/10.1049/iet-cdt.2009.0019},
doi = {10.1049/IET-CDT.2009.0019},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/GuillemenetTS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijes/BenoitTSRS10,
author = {Pascal Benoit and
Lionel Torres and
Gilles Sassatelli and
Michel Robert and
Nicolas Saint{-}Jean},
title = {Run-time mapping for dynamic reconfiguration management in embedded
systems},
journal = {Int. J. Embed. Syst.},
volume = {4},
number = {3/4},
pages = {276--291},
year = {2010},
url = {https://doi.org/10.1504/IJES.2010.039031},
doi = {10.1504/IJES.2010.039031},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijes/BenoitTSRS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijrc/TorresP10,
author = {Lionel Torres and
Viktor K. Prasanna},
title = {Selected Papers from ReconFig 2009 International Conference on Reconfigurable
Computing and FPGAs (ReconFig 2009)},
journal = {Int. J. Reconfigurable Comput.},
volume = {2010},
pages = {679484:1--679484:2},
year = {2010},
url = {https://doi.org/10.1155/2010/679484},
doi = {10.1155/2010/679484},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijrc/TorresP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/MansouriBPTCS10,
author = {Imen Mansouri and
Pascal Benoit and
Diego Puschini and
Lionel Torres and
Fabien Clermidy and
Gilles Sassatelli},
title = {Dynamic Energy Optimization in Network-on-Chip-Based System-on-Chips},
journal = {J. Low Power Electron.},
volume = {6},
number = {4},
pages = {564--577},
year = {2010},
url = {https://doi.org/10.1166/jolpe.2010.1106},
doi = {10.1166/JOLPE.2010.1106},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/MansouriBPTCS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcos/ElbazTSGBM10,
author = {Reouven Elbaz and
Lionel Torres and
Gilles Sassatelli and
Pierre Guillemin and
Michel Bardouillet and
Albert Martinez},
title = {Block-Level Added Redundancy Explicit Authentication for Parallelized
Encryption and Integrity Checking of Processor-Memory Transactions},
journal = {Trans. Comput. Sci.},
volume = {10},
pages = {231--260},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-17499-5\_10},
doi = {10.1007/978-3-642-17499-5\_10},
timestamp = {Fri, 06 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcos/ElbazTSGBM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/BadrignansCEGT10,
author = {Beno{\^{\i}}t Badrignans and
David Champagne and
Reouven Elbaz and
Catherine H. Gebotys and
Lionel Torres},
title = {{SARFUM:} Security Architecture for Remote {FPGA} Update and Monitoring},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {3},
number = {2},
pages = {8:1--8:29},
year = {2010},
url = {https://doi.org/10.1145/1754386.1754389},
doi = {10.1145/1754386.1754389},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/BadrignansCEGT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/HebertBST10,
author = {Nicolas Hebert and
Pascal Benoit and
Gilles Sassatelli and
Lionel Torres},
title = {D-Scale: {A} Scalable System-Level Dependable Method for MPSoCs},
booktitle = {Proceedings of the 19th {IEEE} Asian Test Symposium, {ATS} 2010, 1-4
December 2010, Shanghai, China},
pages = {198--205},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ATS.2010.43},
doi = {10.1109/ATS.2010.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/HebertBST10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ches/Di-BattistaCRTP10,
author = {Jerome Di{-}Battista and
Jean{-}Christophe Courr{\`{e}}ge and
Bruno Rouzeyre and
Lionel Torres and
Philippe Perdu},
editor = {Stefan Mangard and
Fran{\c{c}}ois{-}Xavier Standaert},
title = {When Failure Analysis Meets Side-Channel Attacks},
booktitle = {Cryptographic Hardware and Embedded Systems, {CHES} 2010, 12th International
Workshop, Santa Barbara, CA, USA, August 17-20, 2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6225},
pages = {188--202},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-15031-9\_13},
doi = {10.1007/978-3-642-15031-9\_13},
timestamp = {Tue, 14 May 2019 10:00:47 +0200},
biburl = {https://dblp.org/rec/conf/ches/Di-BattistaCRTP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dasip/FaureABBCPST10,
author = {Etienne Faure and
Gabriel Marchesan Almeida and
Mounir Benabdenbi and
Pascal Benoit and
Fabien Clermidy and
Fran{\c{c}}ois P{\^{e}}cheux and
Gilles Sassatelli and
Lionel Torres},
title = {An in-memory monitoring database for self adaptive MP\({}^{\mbox{2}}\)SoCs},
booktitle = {Proceedings of the 2010 Conference on Design {\&} Architectures
for Signal {\&} Image Processing, {DASIP} 2010, Edinburgh, Scotland,
UK, October 26-28, 2010, Electronic Chips {\&} Systems design
Initiative, {ECSI}},
pages = {97--104},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/DASIP.2010.5706252},
doi = {10.1109/DASIP.2010.5706252},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/dasip/FaureABBCPST10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/JalierLJSBT10,
author = {Camille Jalier and
Didier Lattard and
Ahmed Amine Jerraya and
Gilles Sassatelli and
Pascal Benoit and
Lionel Torres},
editor = {Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller and
Enrico Macii},
title = {Heterogeneous vs homogeneous MPSoC approaches for a Mobile {LTE} modem},
booktitle = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany,
March 8-12, 2010},
pages = {184--189},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DATE.2010.5457213},
doi = {10.1109/DATE.2010.5457213},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/JalierLJSBT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LomneDMTR10,
author = {Victor Lomn{\'{e}} and
Amine Dehbaoui and
Philippe Maurine and
Lionel Torres and
Michel Robert},
editor = {Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller and
Enrico Macii},
title = {Differential Power Analysis enhancement with statistical preprocessing},
booktitle = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany,
March 8-12, 2010},
pages = {1301--1304},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DATE.2010.5457007},
doi = {10.1109/DATE.2010.5457007},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/LomneDMTR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ersa/TorresGA10,
author = {Lionel Torres and
Yoann Guillemenet and
Syed Zahid Ahmed},
editor = {Toomas P. Plaks and
David Andrews and
Ronald F. DeMara and
Herman Lam and
Jooheung Lee and
Christian Plessl and
Greg Stitt},
title = {A Dynamic Reconfigurable {MRAM} based {FPGA}},
booktitle = {Proceedings of the 2010 International Conference on Engineering of
Reconfigurable Systems {\&} Algorithms, {ERSA} 2010, July 12-15,
2010, Las Vegas Nevada, {USA}},
pages = {31--40},
publisher = {{CSREA} Press},
year = {2010},
timestamp = {Wed, 14 Aug 2019 11:41:16 +0200},
biburl = {https://dblp.org/rec/conf/ersa/TorresGA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BartheBT10,
author = {Lyonel Barthe and
Pascal Benoit and
Lionel Torres},
title = {Investigation of a Masking Countermeasure against Side-Channel Attacks
for RISC-based Processor Architectures},
booktitle = {International Conference on Field Programmable Logic and Applications,
{FPL} 2010, August 31 2010 - September 2, 2010, Milano, Italy},
pages = {139--144},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/FPL.2010.35},
doi = {10.1109/FPL.2010.35},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/BartheBT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DevicTB10,
author = {Florian Devic and
Lionel Torres and
Beno{\^{\i}}t Badrignans},
title = {Secure Protocol Implementation for Remote Bitstream Update Preventing
Replay Attacks on {FPGA}},
booktitle = {International Conference on Field Programmable Logic and Applications,
{FPL} 2010, August 31 2010 - September 2, 2010, Milano, Italy},
pages = {179--182},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/FPL.2010.44},
doi = {10.1109/FPL.2010.44},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/DevicTB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AhmedSTR10,
author = {Syed Zahid Ahmed and
Gilles Sassatelli and
Lionel Torres and
Laurent Rouge},
title = {Survey of New Trends in Industry for Programmable Hardware: FPGAs,
MPPAs, MPSoCs, Structured ASICs, eFPGAs and New Wave of Innovation
in FPGAs},
booktitle = {International Conference on Field Programmable Logic and Applications,
{FPL} 2010, August 31 2010 - September 2, 2010, Milano, Italy},
pages = {291--297},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/FPL.2010.66},
doi = {10.1109/FPL.2010.66},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/AhmedSTR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JalierLSBT10,
author = {Camille Jalier and
Didier Lattard and
Gilles Sassatelli and
Pascal Benoit and
Lionel Torres},
title = {Flexible and distributed real-time control on a 4G telecom MPSoC},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
30 - June 2, 2010, Paris, France},
pages = {3961--3964},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISCAS.2010.5537660},
doi = {10.1109/ISCAS.2010.5537660},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JalierLSBT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/JalierLSBT10,
author = {Camille Jalier and
Didier Lattard and
Gilles Sassatelli and
Pascal Benoit and
Lionel Torres},
title = {A Homogeneous MPSoC with Dynamic Task Mapping for Software Defined
Radio},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2010, 5-7
July 2010, Lixouri Kefalonia, Greece},
pages = {345--350},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ISVLSI.2010.110},
doi = {10.1109/ISVLSI.2010.110},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/JalierLSBT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/MansouriJCBT10,
author = {Imen Mansouri and
Camille Jalier and
Fabien Clermidy and
Pascal Benoit and
Lionel Torres},
title = {Implementation Analysis of a Dynamic Energy Management Approach Inspired
by Game-Theory},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2010, 5-7
July 2010, Lixouri Kefalonia, Greece},
pages = {422--427},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ISVLSI.2010.61},
doi = {10.1109/ISVLSI.2010.61},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/MansouriJCBT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/LomneMTOLT10,
author = {Victor Lomn{\'{e}} and
Philippe Maurine and
Lionel Torres and
Thomas Ordas and
Mathieu Lisart and
J{\'{e}}rome Toublanc},
editor = {Ren{\'{e}} van Leuken and
Gilles Sicard},
title = {Modeling Time Domain Magnetic Emissions of ICs},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization,
and Simulation - 20th International Workshop, {PATMOS} 2010, Grenoble,
France, September 7-10, 2010, Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {6448},
pages = {238--249},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-17752-1\_24},
doi = {10.1007/978-3-642-17752-1\_24},
timestamp = {Tue, 13 Sep 2022 21:45:42 +0200},
biburl = {https://dblp.org/rec/conf/patmos/LomneMTOLT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/CargniniGTS10,
author = {Luis Vit{\'{o}}rio Cargnini and
Yoann Guillemenet and
Lionel Torres and
Gilles Sassatelli},
editor = {Viktor K. Prasanna and
J{\"{u}}rgen Becker and
Ren{\'{e}} Cumplido},
title = {Improving the Reliability of a {FPGA} Using Fault-Tolerance Mechanism
Based on Magnetic Memory {(MRAM)}},
booktitle = {ReConFig'10: 2010 International Conference on Reconfigurable Computing
and FPGAs, Cancun, Quintana Roo, Mexico, 13-15 December 2010, Proceedings},
pages = {150--155},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ReConFig.2010.10},
doi = {10.1109/RECONFIG.2010.10},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/CargniniGTS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/HebertABST10,
author = {Nicolas Hebert and
Gabriel Marchesan Almeida and
Pascal Benoit and
Gilles Sassatelli and
Lionel Torres},
editor = {Viktor K. Prasanna and
J{\"{u}}rgen Becker and
Ren{\'{e}} Cumplido},
title = {A Cost-Effective Solution to Increase System Reliability and Maintain
Global Performance under Unreliable Silicon in MPSoC},
booktitle = {ReConFig'10: 2010 International Conference on Reconfigurable Computing
and FPGAs, Cancun, Quintana Roo, Mexico, 13-15 December 2010, Proceedings},
pages = {346--351},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ReConFig.2010.43},
doi = {10.1109/RECONFIG.2010.43},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/HebertABST10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/AlmeidaVBHSBTR10,
author = {Gabriel Marchesan Almeida and
Sameer Varyani and
R{\'{e}}mi Busseuil and
Nicolas Hebert and
Gilles Sassatelli and
Pascal Benoit and
Lionel Torres and
Michel Robert},
editor = {Viktor K. Prasanna and
J{\"{u}}rgen Becker and
Ren{\'{e}} Cumplido},
title = {Providing Better Multi-processor Systems-on-Chip Resources Utilization
by Means of Using a Control-Loop Feedback Mechanism},
booktitle = {ReConFig'10: 2010 International Conference on Reconfigurable Computing
and FPGAs, Cancun, Quintana Roo, Mexico, 13-15 December 2010, Proceedings},
pages = {382--387},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ReConFig.2010.17},
doi = {10.1109/RECONFIG.2010.17},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/AlmeidaVBHSBTR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/BruguierBT10,
author = {Florent Bruguier and
Pascal Benoit and
Lionel Torres},
editor = {Michael H{\"{u}}bner and
Lo{\"{\i}}c Lagadec and
Oliver Sander and
J{\"{u}}rgen Becker},
title = {Investigation of Digital Sensors for Variability Characterization
on FPGAs},
booktitle = {Proceedings of the 5th International Workshop on Reconfigurable Communication-centric
Systems on Chip, ReCoSoC 2010, Karlsruhe, Germany, May 17-19, 2010},
series = {{KIT} Scientific Reports},
volume = {7551},
pages = {95--100},
publisher = {{KIT} Scientific Publishing},
year = {2010},
timestamp = {Thu, 29 Apr 2021 08:19:40 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/BruguierBT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/AlmeidaVBSBTCM10,
author = {Gabriel Marchesan Almeida and
Sameer Varyani and
R{\'{e}}mi Busseuil and
Gilles Sassatelli and
Pascal Benoit and
Lionel Torres and
Everton Carara and
Fernando Gehm Moraes},
editor = {Jo{\~{a}}o Antonio Martino and
Guido Araujo and
Alex Orailoglu and
Felipe Klein},
title = {Evaluating the impact of task migration in multi-processor systems-on-chip},
booktitle = {Proceedings of the 23rd Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2010, S{\~{a}}o Paulo, Brazil, September 6-9,
2010},
pages = {73--78},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1854153.1854174},
doi = {10.1145/1854153.1854174},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/AlmeidaVBSBTCM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/SoaresCLDMT10,
author = {Rafael Soares and
Ney Laert Vilar Calazans and
Victor Lomn{\'{e}} and
Amine Dehbaoui and
Philippe Maurine and
Lionel Torres},
editor = {Jo{\~{a}}o Antonio Martino and
Guido Araujo and
Alex Orailoglu and
Felipe Klein},
title = {A {GALS} pipeline {DES} architecture to increase robustness against
{DPA} and {DEMA} attacks},
booktitle = {Proceedings of the 23rd Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2010, S{\~{a}}o Paulo, Brazil, September 6-9,
2010},
pages = {115--120},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1854153.1854183},
doi = {10.1145/1854153.1854183},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/SoaresCLDMT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/MansouriCBT10,
author = {Imen Mansouri and
Fabien Clermidy and
Pascal Benoit and
Lionel Torres},
editor = {Thomas B{\"{u}}chner and
Ramalingam Sridhar and
Andrew Marshall and
Norbert Schuhmann},
title = {A run-time distributed cooperative approach to optimize power consumption
in MPSoCs},
booktitle = {Annual {IEEE} International SoC Conference, SoCC 2010, September 27-29,
2010, Las Vegas, NV, USA, Proceedings},
pages = {25--30},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/SOCC.2010.5784664},
doi = {10.1109/SOCC.2010.5784664},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/MansouriCBT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/PoucheretBBTMR10,
author = {Fran{\c{c}}ois Poucheret and
Lyonel Barthe and
Pascal Benoit and
Lionel Torres and
Philippe Maurine and
Michel Robert},
title = {Spatial {EM} jamming: {A} countermeasure against {EM} Analysis?},
booktitle = {18th {IEEE/IFIP} VLSI-SoC 2010, {IEEE/IFIP} {WG} 10.5 International
Conference on Very Large Scale Integration of System-on-Chip, Madrid,
Spain, 27-29 September 2010},
pages = {105--110},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/VLSISOC.2010.5642612},
doi = {10.1109/VLSISOC.2010.5642612},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/PoucheretBBTMR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijrc/AlmeidaSBSVTR09,
author = {Gabriel Marchesan Almeida and
Gilles Sassatelli and
Pascal Benoit and
Nicolas Saint{-}Jean and
Sameer Varyani and
Lionel Torres and
Michel Robert},
title = {An Adaptive Message Passing MPSoC Framework},
journal = {Int. J. Reconfigurable Comput.},
volume = {2009},
pages = {242981:1--242981:20},
year = {2009},
url = {https://doi.org/10.1155/2009/242981},
doi = {10.1155/2009/242981},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijrc/AlmeidaSBSVTR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijrc/TorresT09,
author = {Lionel Torres and
C{\'{e}}sar Torres},
title = {Selected Papers from ReConFig 2008},
journal = {Int. J. Reconfigurable Comput.},
volume = {2009},
pages = {869329:1--869329:2},
year = {2009},
url = {https://doi.org/10.1155/2009/869329},
doi = {10.1155/2009/869329},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijrc/TorresT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcos/ElbazCGLPT09,
author = {Reouven Elbaz and
David Champagne and
Catherine H. Gebotys and
Ruby B. Lee and
Nachiketh R. Potlapally and
Lionel Torres},
title = {Hardware Mechanisms for Memory Authentication: {A} Survey of Existing
Techniques and Engines},
journal = {Trans. Comput. Sci.},
volume = {4},
pages = {1--22},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-01004-0\_1},
doi = {10.1007/978-3-642-01004-0\_1},
timestamp = {Fri, 06 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcos/ElbazCGLPT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/AhmedERCST09,
author = {Syed Zahid Ahmed and
Julien Eydoux and
Laurent Rouge and
Jean{-}Baptiste Cuelle and
Gilles Sassatelli and
Lionel Torres},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Exploration of power reduction and performance enhancement in {LEON3}
processor with {ESL} reprogrammable eFPGA in processor pipeline and
as a co-processor},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {184--189},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090655},
doi = {10.1109/DATE.2009.5090655},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/AhmedERCST09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LomneMTRSC09,
author = {Victor Lomn{\'{e}} and
Philippe Maurine and
Lionel Torres and
Michel Robert and
Rafael Soares and
Ney Calazans},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Evaluation on {FPGA} of triple rail logic robustness against {DPA}
and {DEMA}},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {634--639},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090744},
doi = {10.1109/DATE.2009.5090744},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/LomneMTRSC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PuschiniCBST09,
author = {Diego Puschini and
Fabien Clermidy and
Pascal Benoit and
Gilles Sassatelli and
Lionel Torres},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Dynamic and distributed frequency assignment for energy and latency
constrained MP-SoC},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {1564--1567},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090912},
doi = {10.1109/DATE.2009.5090912},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/PuschiniCBST09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/GuillemenetATMECRS09,
author = {Yoann Guillemenet and
Syed Zahid Ahmed and
Lionel Torres and
Alexandre Martheley and
Julien Eydoux and
Jean{-}Baptiste Cuelle and
Laurent Rouge and
Gilles Sassatelli},
editor = {Viktor K. Prasanna and
Lionel Torres and
Ren{\'{e}} Cumplido},
title = {{MRAM} Based eFPGAs: Programming and Silicon Flows, Exploration Environments,
{MRAM} Current State in Industry and Its Unique Potentials for FPGAs},
booktitle = {ReConFig'09: 2009 International Conference on Reconfigurable Computing
and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings},
pages = {18--23},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ReConFig.2009.25},
doi = {10.1109/RECONFIG.2009.25},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/GuillemenetATMECRS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/PuschiniCBST09,
author = {Diego Puschini and
Fabien Clermidy and
Pascal Benoit and
Gilles Sassatelli and
Lionel Torres},
title = {Adaptive energy-aware latency-constrained {DVFS} policy for MPSoC},
booktitle = {Annual {IEEE} International SoC Conference, SoCC 2009, September 9-11,
2009, Belfast, Northern Ireland, UK, Proceedings},
pages = {89--92},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/SOCCON.2009.5398087},
doi = {10.1109/SOCCON.2009.5398087},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/PuschiniCBST09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/DehbaouiLMTR09,
author = {Amine Dehbaoui and
Victor Lomn{\'{e}} and
Philippe Maurine and
Lionel Torres and
Michel Robert},
editor = {J{\"{u}}rgen Becker and
Marcelo O. Johann and
Ricardo Reis},
title = {Enhancing Electromagnetic Attacks Using Spectral Coherence Based Cartography},
booktitle = {VLSI-SoC: Technologies for Systems Integration - 17th {IFIP} {WG}
10.5/IEEE International Conference on Very Large Scale Integration,
VLSI-SoC 2009, Florian{\'{o}}polis, Brazil, October 12-14, 2009,
Revised Selected Papers},
series = {{IFIP} Advances in Information and Communication Technology},
volume = {360},
pages = {135--155},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-23120-9\_8},
doi = {10.1007/978-3-642-23120-9\_8},
timestamp = {Tue, 22 Oct 2019 15:21:19 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/DehbaouiLMTR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/reconfig/2009,
editor = {Viktor K. Prasanna and
Lionel Torres and
Ren{\'{e}} Cumplido},
title = {ReConFig'09: 2009 International Conference on Reconfigurable Computing
and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://ieeexplore.ieee.org/xpl/conhome/5379688/proceeding},
isbn = {978-0-7695-3917-1},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/reconfig/2009.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijrc/PuschiniCBST08,
author = {Diego Puschini and
Fabien Clermidy and
Pascal Benoit and
Gilles Sassatelli and
Lionel Torres},
title = {A Game-Theoretic Approach for Run-Time Distributed Optimization on
MP-SoC},
journal = {Int. J. Reconfigurable Comput.},
volume = {2008},
pages = {403086:1--403086:11},
year = {2008},
url = {https://doi.org/10.1155/2008/403086},
doi = {10.1155/2008/403086},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijrc/PuschiniCBST08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijrc/GuillemenetTSB08,
author = {Yoann Guillemenet and
Lionel Torres and
Gilles Sassatelli and
Nicolas Bruchon},
title = {On the Use of Magnetic RAMs in Field-Programmable Gate Arrays},
journal = {Int. J. Reconfigurable Comput.},
volume = {2008},
pages = {723950:1--723950:9},
year = {2008},
url = {https://doi.org/10.1155/2008/723950},
doi = {10.1155/2008/723950},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijrc/GuillemenetTSB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijrc/BeckerHWLET08,
author = {J{\"{u}}rgen Becker and
Michael H{\"{u}}bner and
Roger F. Woods and
Philip Heng Wai Leong and
Robert Esser and
Lionel Torres},
title = {Current Trends on Reconfigurable Computing},
journal = {Int. J. Reconfigurable Comput.},
volume = {2008},
pages = {918525:1},
year = {2008},
url = {https://doi.org/10.1155/2008/918525},
doi = {10.1155/2008/918525},
timestamp = {Wed, 28 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijrc/BeckerHWLET08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/GodardDTS08,
author = {Beno{\^{\i}}t Godard and
Jean Michel Daga and
Lionel Torres and
Gilles Sassatelli},
title = {Hierarchical Code Correction and Reliability Management in Embedded
nor Flash Memories},
booktitle = {13th European Test Symposium, {ETS} 2008, Verbania, Italy, May 25-29,
2008},
pages = {84--90},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ETS.2008.21},
doi = {10.1109/ETS.2008.21},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/GodardDTS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BadrignansET08,
author = {Beno{\^{\i}}t Badrignans and
Reouven Elbaz and
Lionel Torres},
title = {Secure {FPGA} configuration architecture preventing system downgrade},
booktitle = {{FPL} 2008, International Conference on Field Programmable Logic and
Applications, Heidelberg, Germany, 8-10 September 2008},
pages = {317--322},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPL.2008.4629951},
doi = {10.1109/FPL.2008.4629951},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/BadrignansET08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GuillemenetTSBH08,
author = {Yoann Guillemenet and
Lionel Torres and
Gilles Sassatelli and
Nicolas Bruchon and
Ilham Hassoune},
title = {A non-volatile run-time {FPGA} using thermally assisted switching
{MRAMS}},
booktitle = {{FPL} 2008, International Conference on Field Programmable Logic and
Applications, Heidelberg, Germany, 8-10 September 2008},
pages = {421--426},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPL.2008.4629974},
doi = {10.1109/FPL.2008.4629974},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GuillemenetTSBH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PuschiniCBST08,
author = {Diego Puschini and
Fabien Clermidy and
Pascal Benoit and
Gilles Sassatelli and
Lionel Torres},
title = {Convergence analysis of run-time distributed optimization on adaptive
systems using game theory},
booktitle = {{FPL} 2008, International Conference on Field Programmable Logic and
Applications, Heidelberg, Germany, 8-10 September 2008},
pages = {555--558},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPL.2008.4630007},
doi = {10.1109/FPL.2008.4630007},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PuschiniCBST08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Saint-JeanSBTR08,
author = {Nicolas Saint{-}Jean and
Gilles Sassatelli and
Pascal Benoit and
Lionel Torres and
Michel Robert},
title = {Bio-inspiration helps computers: {A} new machine},
booktitle = {{FPL} 2008, International Conference on Field Programmable Logic and
Applications, Heidelberg, Germany, 8-10 September 2008},
pages = {697--698},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPL.2008.4630043},
doi = {10.1109/FPL.2008.4630043},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Saint-JeanSBTR08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/Saint-JeanBSTR08,
author = {Nicolas Saint{-}Jean and
Pascal Benoit and
Gilles Sassatelli and
Lionel Torres and
Michel Robert},
title = {MPI-Based Adaptive Task Migration Support on the HS-Scale System},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2008, 7-9
April 2008, Montpellier, France},
pages = {105--110},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISVLSI.2008.87},
doi = {10.1109/ISVLSI.2008.87},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/Saint-JeanBSTR08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/PuschiniCBST08,
author = {Diego Puschini and
Fabien Clermidy and
Pascal Benoit and
Gilles Sassatelli and
Lionel Torres},
title = {Temperature-Aware Distributed Run-Time Optimization on MP-SoC Using
Game Theory},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2008, 7-9
April 2008, Montpellier, France},
pages = {375--380},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISVLSI.2008.33},
doi = {10.1109/ISVLSI.2008.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/PuschiniCBST08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/OrdasLSMT08,
author = {Thomas Ordas and
Mathieu Lisart and
Etienne Sicard and
Philippe Maurine and
Lionel Torres},
editor = {Lars Svensson and
Jos{\'{e}} Monteiro},
title = {Near-Field Mapping System to Scan in Time Domain the Magnetic Emissions
of Integrated Circuits},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
and Simulation, 18th International Workshop, {PATMOS} 2008, Lisbon,
Portugal, September 10-12, 2008. Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {5349},
pages = {229--236},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-95948-9\_23},
doi = {10.1007/978-3-540-95948-9\_23},
timestamp = {Wed, 23 Feb 2022 16:05:31 +0100},
biburl = {https://dblp.org/rec/conf/patmos/OrdasLSMT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/PuschiniCBST08,
author = {Diego Puschini and
Fabien Clermidy and
Pascal Benoit and
Gilles Sassatelli and
Lionel Torres},
title = {Game-Theoretic Approach for Temperature-Aware Frequency Assignment
with Task Synchronization on MP-SoC},
booktitle = {ReConFig'08: 2008 International Conference on Reconfigurable Computing
and FPGAs, 3-5 December 2008, Cancun, Mexico, Proceedings},
pages = {235--240},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ReConFig.2008.22},
doi = {10.1109/RECONFIG.2008.22},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/PuschiniCBST08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/AhmedEFRST08,
author = {Syed Zahid Ahmed and
Julien Eydoux and
Michael Fern{\'{a}}ndez and
Laurent Rouge and
Gilles Sassatelli and
Lionel Torres},
title = {Power Consumption Reduction Explorations in Processors by Enhancing
Performance Using Small {ESL} Reprogrammable eFPGAs},
booktitle = {ReConFig'08: 2008 International Conference on Reconfigurable Computing
and FPGAs, 3-5 December 2008, Cancun, Mexico, Proceedings},
pages = {313--318},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ReConFig.2008.44},
doi = {10.1109/RECONFIG.2008.44},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/AhmedEFRST08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/LomneOMTRSC08,
author = {Victor Lomn{\'{e}} and
Thomas Ordas and
Philippe Maurine and
Lionel Torres and
Michel Robert and
Rafael Soares and
Ney Calazans},
title = {Triple Rail Logic Robustness against {DPA}},
booktitle = {ReConFig'08: 2008 International Conference on Reconfigurable Computing
and FPGAs, 3-5 December 2008, Cancun, Mexico, Proceedings},
pages = {415--420},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ReConFig.2008.75},
doi = {10.1109/RECONFIG.2008.75},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/LomneOMTRSC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/ChampagneEGTL08,
author = {David Champagne and
Reouven Elbaz and
Catherine H. Gebotys and
Lionel Torres and
Ruby B. Lee},
title = {Forward-Secure Content Distribution to Reconfigurable Hardware},
booktitle = {ReConFig'08: 2008 International Conference on Reconfigurable Computing
and FPGAs, 3-5 December 2008, Cancun, Mexico, Proceedings},
pages = {450--455},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ReConFig.2008.51},
doi = {10.1109/RECONFIG.2008.51},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/ChampagneEGTL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/SoaresCLMTR08,
author = {Rafael Soares and
Ney Laert Vilar Calazans and
Victor Lomn{\'{e}} and
Philippe Maurine and
Lionel Torres and
Michel Robert},
editor = {Marcelo Lubaszewski and
Michel Renovell and
Rajesh K. Gupta},
title = {Evaluating the robustness of secure triple track logic through prototyping},
booktitle = {Proceedings of the 21st Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2008, Gramado, Brazil, September 1-4, 2008},
pages = {193--198},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1404371.1404425},
doi = {10.1145/1404371.1404425},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/SoaresCLMTR08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sies/BadrignansET08,
author = {Beno{\^{\i}}t Badrignans and
Reouven Elbaz and
Lionel Torres},
title = {Secure update Mechanism for Remote Update of FPGA-Based System},
booktitle = {{IEEE} Third International Symposium on Industrial Embedded Systems,
{SIES} 2008, Montpellier / La Grande Motte, France, June 11-13, 2008},
pages = {221--224},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/SIES.2008.4577703},
doi = {10.1109/SIES.2008.4577703},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/sies/BadrignansET08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ches/ElbazCLTSG07,
author = {Reouven Elbaz and
David Champagne and
Ruby B. Lee and
Lionel Torres and
Gilles Sassatelli and
Pierre Guillemin},
editor = {Pascal Paillier and
Ingrid Verbauwhede},
title = {TEC-Tree: {A} Low-Cost, Parallelizable Tree for Efficient Defense
Against Memory Replay Attacks},
booktitle = {Cryptographic Hardware and Embedded Systems - {CHES} 2007, 9th International
Workshop, Vienna, Austria, September 10-13, 2007, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4727},
pages = {289--302},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-74735-2\_20},
doi = {10.1007/978-3-540-74735-2\_20},
timestamp = {Tue, 14 May 2019 10:00:47 +0200},
biburl = {https://dblp.org/rec/conf/ches/ElbazCLTSG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GodardDTS07,
author = {Beno{\^{\i}}t Godard and
Jean Michel Daga and
Lionel Torres and
Gilles Sassatelli},
editor = {Rudy Lauwereins and
Jan Madsen},
title = {Evaluation of design for reliability techniques in embedded flash
memories},
booktitle = {2007 Design, Automation and Test in Europe Conference and Exposition,
{DATE} 2007, Nice, France, April 16-20, 2007},
pages = {1593--1598},
publisher = {{EDA} Consortium, San Jose, CA, {USA}},
year = {2007},
url = {https://dl.acm.org/citation.cfm?id=1266716},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/GodardDTS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/GodardDTS07,
author = {Beno{\^{\i}}t Godard and
Jean Michel Daga and
Lionel Torres and
Gilles Sassatelli},
editor = {Patrick Girard and
Andrzej Krasniewski and
Elena Gramatov{\'{a}} and
Adam Pawlak and
Tomasz Garbolino},
title = {Architecture for Highly Reliable Embedded Flash Memories},
booktitle = {Proceedings of the 10th {IEEE} Workshop on Design {\&} Diagnostics
of Electronic Circuits {\&} Systems {(DDECS} 2007), Krak{\'{o}}w,
Poland, April 11-13, 2007},
pages = {75--80},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/DDECS.2007.4295257},
doi = {10.1109/DDECS.2007.4295257},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/GodardDTS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/SassatelliSBTRWGM07,
author = {Gilles Sassatelli and
Nicolas Saint{-}Jean and
Pascal Benoit and
Lionel Torres and
Michel Robert and
Cristiane R. Woszezenki and
Ismael Grehs and
Fernando Gehm Moraes},
editor = {Kenneth L. Pocek and
Duncan A. Buell},
title = {Run-time mapping and communication strategies for Homogeneous NoC-Based
MPSoCs},
booktitle = {{IEEE} Symposium on Field-Programmable Custom Computing Machines,
{FCCM} 2007, 23-25 April 2007, Napa, California, {USA}},
pages = {295--296},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/FCCM.2007.27},
doi = {10.1109/FCCM.2007.27},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/SassatelliSBTRWGM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/MesquitaBTSRM07,
author = {Daniel Mesquita and
Beno{\^{\i}}t Badrignans and
Lionel Torres and
Gilles Sassatelli and
Michel Robert and
Fernando Moraes},
title = {A Cryptographic Coarse Grain Reconfigurable Architecture Robust Against
{DPA}},
booktitle = {21th International Parallel and Distributed Processing Symposium {(IPDPS}
2007), Proceedings, 26-30 March 2007, Long Beach, California, {USA}},
pages = {1--8},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/IPDPS.2007.370380},
doi = {10.1109/IPDPS.2007.370380},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/MesquitaBTSRM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/Saint-JeanSBTR07,
author = {Nicolas Saint{-}Jean and
Gilles Sassatelli and
Pascal Benoit and
Lionel Torres and
Michel Robert},
title = {HS-Scale: a Hardware-Software Scalable {MP-SOC} Architecture for embedded
Systems},
booktitle = {2007 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
2007), May 9-11, 2007, Porto Alegre, Brazil},
pages = {21--28},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ISVLSI.2007.51},
doi = {10.1109/ISVLSI.2007.51},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/Saint-JeanSBTR07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/BruchonTSC07,
author = {Nicolas Bruchon and
Lionel Torres and
Gilles Sassatelli and
Gaston Cambon},
title = {Technological hybridization for efficient runtime reconfigurable FPGAs},
booktitle = {2007 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
2007), May 9-11, 2007, Porto Alegre, Brazil},
pages = {29--34},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ISVLSI.2007.96},
doi = {10.1109/ISVLSI.2007.96},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/BruchonTSC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/Saint-JeanJSBTR07,
author = {Nicolas Saint{-}Jean and
Camille Jalier and
Gilles Sassatelli and
Pascal Benoit and
Lionel Torres and
Michel Robert},
editor = {Gilles Sassatelli and
Manfred Glesner and
Christophe Bobda and
Pascal Benoit},
title = {{HS} Scale: {A} run-time adaptable MP-SoC architecture},
booktitle = {Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2007, Montpellier, France, June 2007},
pages = {39--46},
publisher = {Univ. Montpellier {II}},
year = {2007},
timestamp = {Fri, 05 Oct 2007 11:47:31 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/Saint-JeanJSBTR07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/NetoETSVGD07,
author = {Eduardo Braulio Wanderley Netto and
Reouven Elbaz and
Lionel Torres and
Gilles Sassatelli and
Romain Vaslin and
Guy Gogniat and
Jean{-}Philippe Diguet},
editor = {Gilles Sassatelli and
Manfred Glesner and
Christophe Bobda and
Pascal Benoit},
title = {{IBC-EI:} An Instruction Based Compression method with Encryption
and Integrity Checking},
booktitle = {Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2007, Montpellier, France, June 2007},
pages = {138--145},
publisher = {Univ. Montpellier {II}},
year = {2007},
timestamp = {Wed, 02 Aug 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/NetoETSVGD07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/Saint-JeanBSTR07,
author = {Nicolas Saint{-}Jean and
Pascal Benoit and
Gilles Sassatelli and
Lionel Torres and
Michel Robert},
editor = {Holger Blume and
Georgi Gaydadjiev and
C. John Glossner and
Peter M. W. Knijnenburg},
title = {Application Case Studies on HS-Scale, a {MP-SOC} for Embbeded Systems},
booktitle = {Proceedings of the 2007 International Conference on Embedded Computer
Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2007),
Samos, Greece, July 16-19, 2007},
pages = {88--95},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ICSAMOS.2007.4285738},
doi = {10.1109/ICSAMOS.2007.4285738},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/Saint-JeanBSTR07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-0710-4803,
author = {Reouven Elbaz and
Lionel Torres and
Gilles Sassatelli and
Pierre Guillemin and
C. Anguille and
Michel Bardouillet and
Christian Buatois and
Jean{-}Baptiste Rigaud},
title = {Hardware Engines for Bus Encryption: {A} Survey of Existing Techniques},
journal = {CoRR},
volume = {abs/0710.4803},
year = {2007},
url = {http://arxiv.org/abs/0710.4803},
eprinttype = {arXiv},
eprint = {0710.4803},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-0710-4803.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/NgouangaSTGSS06,
author = {Alex Ngouanga and
Gilles Sassatelli and
Lionel Torres and
Thierry Gil and
Andr{\'{e}} Borin Suarez and
Altamiro Amadeu Susin},
editor = {Koen Bertels and
Jo{\~{a}}o M. P. Cardoso and
Stamatis Vassiliadis},
title = {Run-Time Resources Management on Coarse Grained, Packet-Switching
Reconfigurable Architecture: {A} Case Study Through the APACHES' Platform},
booktitle = {Reconfigurable Computing: Architectures and Applications, Second International
Workshop, {ARC} 2006, Delft, The Netherlands, March 1-3, 2006, Revised
Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {3985},
pages = {134--145},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/11802839\_19},
doi = {10.1007/11802839\_19},
timestamp = {Tue, 14 May 2019 10:00:49 +0200},
biburl = {https://dblp.org/rec/conf/arc/NgouangaSTGSS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ElbazTSGBM06,
author = {Reouven Elbaz and
Lionel Torres and
Gilles Sassatelli and
Pierre Guillemin and
Michel Bardouillet and
Albert Martinez},
editor = {Ellen Sentovich},
title = {A parallelized way to provide data encryption and integrity checking
on a processor-memory bus},
booktitle = {Proceedings of the 43rd Design Automation Conference, {DAC} 2006,
San Francisco, CA, USA, July 24-28, 2006},
pages = {506--509},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1146909.1147042},
doi = {10.1145/1146909.1147042},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ElbazTSGBM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/NgouangaSTSS06,
author = {Alex Ngouanga and
Gilles Sassatelli and
Lionel Torres and
Andr{\'{e}} Borin Soares and
Altamiro Amadeu Susin},
editor = {Matteo Sonza Reorda and
Ondrej Nov{\'{a}}k and
Bernd Straube and
Hana Kub{\'{a}}tov{\'{a}} and
Zdenek Kot{\'{a}}sek and
Pavel Kubal{\'{\i}}k and
Raimund Ubar and
Jir{\'{\i}} Bucek},
title = {A Contextual Resources use: a Proof of Concept through the APACHES'
Platform},
booktitle = {Proceedings of the 9th {IEEE} Workshop on Design {\&} Diagnostics
of Electronic Circuits {\&} Systems {(DDECS} 2006), Prague, Czech
Republic, April 18-21, 2006},
pages = {44--49},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/DDECS.2006.1649568},
doi = {10.1109/DDECS.2006.1649568},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/NgouangaSTSS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/ElbazTSGB06,
author = {Reouven Elbaz and
Lionel Torres and
Gilles Sassatelli and
Pierre Guillemin and
Michel Bardouillet},
editor = {Matteo Sonza Reorda and
Ondrej Nov{\'{a}}k and
Bernd Straube and
Hana Kub{\'{a}}tov{\'{a}} and
Zdenek Kot{\'{a}}sek and
Pavel Kubal{\'{\i}}k and
Raimund Ubar and
Jir{\'{\i}} Bucek},
title = {{PE-ICE:} Parallelized Encryption and Integrity Checking Engine},
booktitle = {Proceedings of the 9th {IEEE} Workshop on Design {\&} Diagnostics
of Electronic Circuits {\&} Systems {(DDECS} 2006), Prague, Czech
Republic, April 18-21, 2006},
pages = {143--144},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/DDECS.2006.1649595},
doi = {10.1109/DDECS.2006.1649595},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/ElbazTSGB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BruchonTSC06,
author = {Nicolas Bruchon and
Lionel Torres and
Gilles Sassatelli and
Gaston Cambon},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Magnetic tunnelling junction based {FPGA}},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {123--130},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117220},
doi = {10.1145/1117201.1117220},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BruchonTSC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MesquitaBTSRBM06,
author = {Daniel Mesquita and
Beno{\^{\i}}t Badrignans and
Lionel Torres and
Gilles Sassatelli and
Michel Robert and
Jean{-}Claude Bajard and
Fernando Gehm Moraes},
title = {A Leak Resistant Architecture Against Side Channel Attacks},
booktitle = {Proceedings of the 2006 International Conference on Field Programmable
Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006},
pages = {1--4},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/FPL.2006.311335},
doi = {10.1109/FPL.2006.311335},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/MesquitaBTSRBM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/ValetteTSB06,
author = {Nicolas Valette and
Lionel Torres and
Gilles Sassatelli and
Fr{\'{e}}d{\'{e}}ric Bancel},
title = {Securing embedded programmable gate arrays in secure circuits},
booktitle = {20th International Parallel and Distributed Processing Symposium {(IPDPS}
2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/IPDPS.2006.1639483},
doi = {10.1109/IPDPS.2006.1639483},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/ValetteTSB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issoc/MesquitaBTSRM06,
author = {Daniel Mesquita and
Beno{\^{\i}}t Badrignans and
Lionel Torres and
Gilles Sassatelli and
Michel Robert and
Fernando Gehm Moraes},
title = {A Leak Resistant SoC to Counteract Side Channel Attacks},
booktitle = {International Symposium on System-on-Chip, SoC 2006, Tampere, Finland,
November 13-16, 2006},
pages = {1--4},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISSOC.2006.322005},
doi = {10.1109/ISSOC.2006.322005},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/issoc/MesquitaBTSRM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/BenoitTSRCB06,
author = {Pascal Benoit and
Lionel Torres and
Gilles Sassatelli and
Michel Robert and
Gaston Cambon and
J{\"{u}}rgen Becker},
title = {Dynamic Hardware Multiplexing: Improving Adaptability with a Run Time
Reconfiguration Manager},
booktitle = {2006 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
2006), 2-3 March 2006, Karlsruhe, Germany},
pages = {251--256},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISVLSI.2006.38},
doi = {10.1109/ISVLSI.2006.38},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/BenoitTSRCB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/BruchonTSC06,
author = {Nicolas Bruchon and
Lionel Torres and
Gilles Sassatelli and
Gaston Cambon},
title = {New non-volatile {FPGA} concept using Magnetic Tunneling Junction},
booktitle = {2006 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
2006), 2-3 March 2006, Karlsruhe, Germany},
pages = {269--276},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISVLSI.2006.68},
doi = {10.1109/ISVLSI.2006.68},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/BruchonTSC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/ElbazTSGBM06,
author = {Reouven Elbaz and
Lionel Torres and
Gilles Sassatelli and
Pierre Guillemin and
Michel Bardouillet and
Albert Martinez},
editor = {Johan Vounckx and
Nadine Az{\'{e}}mard and
Philippe Maurine},
title = {A Comparison of Two Approaches Providing Data Encryption and Authentication
on a Processor Memory Bus},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
and Simulation, 16th International Workshop, {PATMOS} 2006, Montpellier,
France, September 13-15, 2006, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4148},
pages = {267--279},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/11847083\_26},
doi = {10.1007/11847083\_26},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/patmos/ElbazTSGBM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/ValetteTSB06,
author = {Nicolas Valette and
Lionel Torres and
Gilles Sassatelli and
S. Bancel},
editor = {Gilles Sassatelli and
Leandro Soares Indrusiak and
Manfred Glesner and
Lionel Torres},
title = {How to Secure Embedded Programmable Gate Arrays?},
booktitle = {Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2006, Montpellier, France, July 2006},
pages = {52--59},
publisher = {Univ. Montpellier {II}},
year = {2006},
timestamp = {Mon, 13 Nov 2006 14:12:39 +0100},
biburl = {https://dblp.org/rec/conf/recosoc/ValetteTSB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/ElbazTSGBM06,
author = {Reouven Elbaz and
Lionel Torres and
Gilles Sassatelli and
Pierre Guillemin and
Michel Bardouillet and
Albert Martinez},
editor = {Gilles Sassatelli and
Leandro Soares Indrusiak and
Manfred Glesner and
Lionel Torres},
title = {Efficient Combination of Data Encryption and Integrity Checking for
Embedded Systems},
booktitle = {Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2006, Montpellier, France, July 2006},
pages = {69--75},
publisher = {Univ. Montpellier {II}},
year = {2006},
timestamp = {Mon, 13 Nov 2006 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/recosoc/ElbazTSGBM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/BruchonTSC06,
author = {Nicolas Bruchon and
Lionel Torres and
Gilles Sassatelli and
Gaston Cambon},
editor = {Gilles Sassatelli and
Leandro Soares Indrusiak and
Manfred Glesner and
Lionel Torres},
title = {Remanent {SRAM} Structure for Runtime Reconfigurable {FPGA}},
booktitle = {Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2006, Montpellier, France, July 2006},
pages = {124--130},
publisher = {Univ. Montpellier {II}},
year = {2006},
timestamp = {Mon, 13 Nov 2006 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/recosoc/BruchonTSC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/BadrignansMBTSR06,
author = {Beno{\^{\i}}t Badrignans and
Daniel Mesquita and
Jean{-}Claude Bajard and
Lionel Torres and
Gilles Sassatelli and
Michel Robert},
editor = {Gilles Sassatelli and
Leandro Soares Indrusiak and
Manfred Glesner and
Lionel Torres},
title = {A Parallel and Secure Architecture for Asymmetric Cryptography},
booktitle = {Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2006, Montpellier, France, July 2006},
pages = {220--224},
publisher = {Univ. Montpellier {II}},
year = {2006},
timestamp = {Mon, 13 Nov 2006 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/recosoc/BadrignansMBTSR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/FischerTM06,
author = {Viktor Fischer and
Lionel Torres and
Daniel Mesquita},
editor = {Gilles Sassatelli and
Leandro Soares Indrusiak and
Manfred Glesner and
Lionel Torres},
title = {Flexible security and its technology limits},
booktitle = {Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2006, Montpellier, France, July 2006},
pages = {243--248},
publisher = {Univ. Montpellier {II}},
year = {2006},
timestamp = {Mon, 13 Nov 2006 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/recosoc/FischerTM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/recosoc/2006,
editor = {Gilles Sassatelli and
Leandro Soares Indrusiak and
Manfred Glesner and
Lionel Torres},
title = {Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2006, Montpellier, France, July 2006},
publisher = {Univ. Montpellier {II}},
year = {2006},
isbn = {2-9517461-2-1},
timestamp = {Mon, 13 Nov 2006 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/recosoc/2006.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tsi/BenoitSTRCD05,
author = {Pascal Benoit and
Gilles Sassatelli and
Lionel Torres and
Michel Robert and
Gaston Cambon and
Didier Demigny},
title = {M{\'{e}}thode de caract{\'{e}}risation des architectures
d'acc{\'{e}}l{\'{e}}rateurs flexibles pour syst{\`{e}}mes
sur puce},
journal = {Tech. Sci. Informatiques},
volume = {24},
number = {6},
pages = {725--755},
year = {2005},
url = {https://doi.org/10.3166/tsi.24.725-755},
doi = {10.3166/TSI.24.725-755},
timestamp = {Wed, 24 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tsi/BenoitSTRCD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ElbazTSGABBR05,
author = {Reouven Elbaz and
Lionel Torres and
Gilles Sassatelli and
Pierre Guillemin and
C. Anguille and
Michel Bardouillet and
Christian Buatois and
Jean{-}Baptiste Rigaud},
title = {Hardware Engines for Bus Encryption: {A} Survey of Existing Techniques},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {40--45},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.170},
doi = {10.1109/DATE.2005.170},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ElbazTSGABBR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BenoitTSRC05,
author = {Pascal Benoit and
Lionel Torres and
Gilles Sassatelli and
Michel Robert and
Gaston Cambon},
editor = {Herman Schmit and
Steven J. E. Wilton},
title = {Dynamic hardware multiplexing for coarse grain reconfigurable architectures},
booktitle = {Proceedings of the {ACM/SIGDA} 13th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2005, Monterey, California, USA,
February 20-22, 2005},
pages = {270},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1046192.1046245},
doi = {10.1145/1046192.1046245},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BenoitTSRC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BruchonCTS05,
author = {Nicolas Bruchon and
Gaston Cambon and
Lionel Torres and
Gilles Sassatelli},
editor = {Tero Rissa and
Steven J. E. Wilton and
Philip Heng Wai Leong},
title = {Magnetic remanent memory structures for dynamically reconfigurable
fine grain {FPGA}},
booktitle = {Proceedings of the 2005 International Conference on Field Programmable
Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
pages = {687--690},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/FPL.2005.1515813},
doi = {10.1109/FPL.2005.1515813},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/BruchonCTS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BenoitBRTSC05,
author = {Pascal Benoit and
J{\"{u}}rgen Becker and
Michel Robert and
Lionel Torres and
Gilles Sassatelli and
Gaston Cambon},
editor = {Tero Rissa and
Steven J. E. Wilton and
Philip Heng Wai Leong},
title = {Run-Time Scheduling for Random Multi-Tasking in Reconfigurable Coprocessors},
booktitle = {Proceedings of the 2005 International Conference on Field Programmable
Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
pages = {703--706},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/FPL.2005.1515817},
doi = {10.1109/FPL.2005.1515817},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/BenoitBRTSC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/BenoitTSRC05,
author = {Pascal Benoit and
Lionel Torres and
Gilles Sassatelli and
Michel Robert and
Gaston Cambon},
title = {Automatic Task Scheduling / Loop Unrolling using Dedicated {RTR} Controllers
in Coarse Grain Reconfigurable Architectures},
booktitle = {19th International Parallel and Distributed Processing Symposium {(IPDPS}
2005), {CD-ROM} / Abstracts Proceedings, 4-8 April 2005, Denver, CO,
{USA}},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/IPDPS.2005.119},
doi = {10.1109/IPDPS.2005.119},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/BenoitTSRC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/BruchonCTS05,
author = {Nicolas Bruchon and
Gaston Cambon and
Lionel Torres and
Gilles Sassatelli},
editor = {Gilles Sassatelli and
Manfred Glesner and
Lionel Torres and
Leandro Soares Indrusiak and
Thomas Hollstein},
title = {Non-volatile {SRAM-FPGA} based on magnetic tunnelling junction},
booktitle = {Proceedings of the 1st International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2005, Montpellier, France, June 2005},
pages = {113--120},
publisher = {Univ. Montpellier {II}},
year = {2005},
timestamp = {Mon, 13 Nov 2006 14:44:44 +0100},
biburl = {https://dblp.org/rec/conf/recosoc/BruchonCTS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/ValetteTBB05,
author = {Nicolas Valette and
Lionel Torres and
Fr{\'{e}}d{\'{e}}ric Bancel and
Nicolas B{\'{e}}rard},
editor = {Gilles Sassatelli and
Manfred Glesner and
Lionel Torres and
Leandro Soares Indrusiak and
Thomas Hollstein},
title = {Integration of Reconfigurable Logic on Secure Circuits},
booktitle = {Proceedings of the 1st International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2005, Montpellier, France, June 2005},
pages = {163--168},
publisher = {Univ. Montpellier {II}},
year = {2005},
timestamp = {Mon, 13 Nov 2006 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/recosoc/ValetteTBB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/MesquitaTTSCRM05,
author = {Daniel Mesquita and
Jean{-}Denis Techer and
Lionel Torres and
Gilles Sassatelli and
Gaston Cambon and
Michel Robert and
Fernando Moraes},
editor = {Gilles Sassatelli and
Manfred Glesner and
Lionel Torres and
Leandro Soares Indrusiak and
Thomas Hollstein},
title = {A new hardware countermeasure for masking power signatures of crypto
cores},
booktitle = {Proceedings of the 1st International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2005, Montpellier, France, June 2005},
pages = {169--176},
publisher = {Univ. Montpellier {II}},
year = {2005},
timestamp = {Tue, 10 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/recosoc/MesquitaTTSCRM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/MesquitaTTSCRM05,
author = {Daniel Mesquita and
Jean{-}Denis Techer and
Lionel Torres and
Gilles Sassatelli and
Gaston Cambon and
Michel Robert and
Fernando Moraes},
editor = {Carlos Galup{-}Montoro and
Sergio Bampi and
Alex Orailoglu},
title = {Current mask generation: a transistor level security against {DPA}
attacks},
booktitle = {Proceedings of the 18th Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2005, Florianolpolis, Brazil, September 4-7,
2005},
pages = {115--120},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1081081.1081114},
doi = {10.1145/1081081.1081114},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/MesquitaTTSCRM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MesquitaTTRCSM05,
author = {Daniel Mesquita and
Jean{-}Denis Techer and
Lionel Torres and
Michel Robert and
Guy Cath{\'{e}}bras and
Gilles Sassatelli and
Fernando Gehm Moraes},
editor = {Ricardo Augusto da Luz Reis and
Adam Osseiran and
Hans{-}J{\"{o}}rg Pfleiderer},
title = {Current Mask Generation: an Analog Circuit to Thwart {DPA} Attacks},
booktitle = {VLSI-SoC: From Systems To Silicon, Proceedings of {IFIP} {TC} 10,
{WG} 10.5, Thirteenth International Conference on Very Large Scale
Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005,
Perth, Australia},
series = {{IFIP}},
volume = {240},
pages = {317--330},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/978-0-387-73661-7\_20},
doi = {10.1007/978-0-387-73661-7\_20},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/MesquitaTTRCSM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/recosoc/2005,
editor = {Gilles Sassatelli and
Manfred Glesner and
Lionel Torres and
Leandro Soares Indrusiak and
Thomas Hollstein},
title = {Proceedings of the 1st International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2005, Montpellier, France, June 2005},
publisher = {Univ. Montpellier {II}},
year = {2005},
isbn = {2-9517-4611-3},
timestamp = {Mon, 13 Nov 2006 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/recosoc/2005.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cai/RahimRT04,
author = {Solaiman Rahim and
Bruno Rouzeyre and
Lionel Torres},
title = {A Flip-Flop Matching Engine to Verify Sequential Optimizations},
journal = {Comput. Artif. Intell.},
volume = {23},
number = {5},
pages = {437--460},
year = {2004},
url = {http://www.cai.sk/ojs/index.php/cai/article/view/439},
timestamp = {Mon, 14 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cai/RahimRT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/BenoitSTDRC04,
author = {Pascal Benoit and
Gilles Sassatelli and
Lionel Torres and
Didier Demigny and
Michel Robert and
Gaston Cambon},
editor = {Andy D. Pimentel and
Stamatis Vassiliadis},
title = {Metrics for Digital Signal Processing Architectures Characterization:
Remanence and Scalability},
booktitle = {Computer Systems: Architectures, Modeling, and Simulation, Third and
Fourth International Workshops, {SAMOS} 2003 and {SAMOS} 2004, Samos,
Greece, July 21-23, 2003 and July 19-21, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3133},
pages = {128--137},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-27776-7\_14},
doi = {10.1007/978-3-540-27776-7\_14},
timestamp = {Tue, 14 May 2019 10:00:45 +0200},
biburl = {https://dblp.org/rec/conf/samos/BenoitSTDRC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BenoitSTRCD03,
author = {Pascal Benoit and
Gilles Sassatelli and
Lionel Torres and
Michel Robert and
Gaston Cambon and
Didier Demigny},
editor = {Peter Y. K. Cheung and
George A. Constantinides and
Jos{\'{e}} T. de Sousa},
title = {A Novel Approach for Architectural Model Characterization. An Example
through the Systolic Ring},
booktitle = {Field Programmable Logic and Application, 13th International Conference,
{FPL} 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2778},
pages = {722--732},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-45234-8\_70},
doi = {10.1007/978-3-540-45234-8\_70},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/BenoitSTRCD03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hldvt/RahimRTR03,
author = {Solaiman Rahim and
Bruno Rouzeyre and
Lionel Torres and
J{\'{e}}r{\^{o}}me Rampon},
title = {Matching in the presence of don't cares and redundant sequential elements
for sequential equivalence checking},
booktitle = {Eighth {IEEE} International High-Level Design Validation and Test
Workshop 2003, San Francisco, CA, USA, November 12-14, 2003},
pages = {129--134},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/HLDVT.2003.1252486},
doi = {10.1109/HLDVT.2003.1252486},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hldvt/RahimRTR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/BenoitSTDRC03,
author = {Pascal Benoit and
Gilles Sassatelli and
Lionel Torres and
Didier Demigny and
Michel Robert and
Gaston Cambon},
title = {Metrics for Reconfigurable Architectures Characterization: Remanence
and Scalability},
booktitle = {17th International Parallel and Distributed Processing Symposium {(IPDPS}
2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings},
pages = {176},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IPDPS.2003.1213324},
doi = {10.1109/IPDPS.2003.1213324},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/BenoitSTDRC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MesquitaTMSR03,
author = {Daniel Mesquita and
Lionel Torres and
Fernando Gehm Moraes and
Gilles Sassatelli and
Michel Robert},
editor = {Manfred Glesner and
Ricardo Augusto da Luz Reis and
Hans Eveking and
Vincent John Mooney III and
Leandro Soares Indrusiak and
Peter Zipf},
title = {Are coarse grain reconfigurable architectures suitable for cryptography?},
booktitle = {{IFIP} VLSI-SoC 2003, {IFIP} {WG} 10.5 International Conference on
Very Large Scale Integration of System-on-Chip, Darmstadt, Germany,
1-3 December 2003},
pages = {276--281},
publisher = {Technische Universit{\"{a}}t Darmstadt, Insitute of Microelectronic
Systems},
year = {2003},
timestamp = {Thu, 07 Oct 2004 09:29:26 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/MesquitaTMSR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SassatelliTBGDCG02,
author = {Gilles Sassatelli and
Lionel Torres and
Pascal Benoit and
Thierry Gil and
Camille Diou and
Gaston Cambon and
J{\'{e}}r{\^{o}}me Galy},
title = {Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture
for {DSP} Applications},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {553--558},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998355},
doi = {10.1109/DATE.2002.998355},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/SassatelliTBGDCG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pris/TisseMTR02,
author = {Christel{-}Lo{\"{\i}}c Tisse and
Lionel Martin and
Lionel Torres and
Michel Robert},
editor = {Jos{\'{e}} Manuel I{\~{n}}esta Quereda and
Luisa Mic{\'{o}}},
title = {Iris recognition system for person identification},
booktitle = {Pattern Recognition in Information Systems, Proceedings of the 2nd
International Workshop on Pattern Recognition in Information Systems,
{PRIS} 2002, In conjunction with {ICEIS} 2002, Ciudad Real, Spain,
April 2002},
pages = {186--199},
publisher = {{ICEIS} Press},
year = {2002},
timestamp = {Fri, 22 Jul 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/pris/TisseMTR02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/etfa/DiouTR01,
author = {Camille Diou and
Lionel Torres and
Michel Robert},
title = {An embedded core for the 2D wavelet transform},
booktitle = {Proceedings of 8th {IEEE} International Conference on Emerging Technologies
and Factory Automation, {ETFA} 2001, October 15-18, 2001, Antibes/Juan
les Pins, France - Volume 2},
pages = {179--186},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/ETFA.2001.997684},
doi = {10.1109/ETFA.2001.997684},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/etfa/DiouTR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SassatelliTGCD01,
author = {Gilles Sassatelli and
Lionel Torres and
J{\'{e}}r{\^{o}}me Galy and
Gaston Cambon and
Camille Diou},
editor = {Gordon J. Brebner and
Roger F. Woods},
title = {The Systolic Ring: {A} Dynamically Reconfigurable Architecture for
Embedded Systems},
booktitle = {Field-Programmable Logic and Applications, 11th International Conference,
{FPL} 2001, Belfast, Northern Ireland, UK, August 27-29, 2001, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2147},
pages = {409--419},
publisher = {Springer},
year = {2001},
url = {https://doi.org/10.1007/3-540-44687-7\_42},
doi = {10.1007/3-540-44687-7\_42},
timestamp = {Sat, 19 Oct 2019 20:15:05 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SassatelliTGCD01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/SassatelliTBCRG01,
author = {Gilles Sassatelli and
Lionel Torres and
Pascal Benoit and
Gaston Cambon and
Michel Robert and
J{\'{e}}r{\^{o}}me Galy},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Dynamically Reconfigurable Architectures for Digital Signal Processing
Applications},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {63--74},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 16:01:37 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/SassatelliTBCRG01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SassatelliCGT01,
author = {Gilles Sassatelli and
Gaston Cambon and
J{\'{e}}r{\^{o}}me Galy and
Lionel Torres},
title = {A Dynamically Reconfigurable Architecture for Embedded Systems},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {32--37},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933835},
doi = {10.1109/IWRSP.2001.933835},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SassatelliCGT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icip/DiouTR00,
author = {Camille Diou and
Lionel Torres and
Michel Robert},
title = {A Wavelet Core for Video Processing},
booktitle = {Proceedings of the 2000 International Conference on Image Processing,
{ICIP} 2000, Vancouver, BC, Canada, September 10-13, 2000},
pages = {395--398},
publisher = {{IEEE}},
year = {2000},
url = {https://doi.org/10.1109/ICIP.2000.899406},
doi = {10.1109/ICIP.2000.899406},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/icip/DiouTR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/MolzEMTR00,
author = {Rolf Fredi Molz and
Paulo Martins Engel and
Fernando Gehm Moraes and
Lionel Torres and
Michel Robert},
title = {Design of a Classification System for Rectangular Shapes Using a Co-Design
Environment},
booktitle = {Proceedings of the 13th Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2000, Manaus, Brazil, September 18-24, 2000},
pages = {281--288},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://dl.acm.org/doi/10.5555/827245.827324},
doi = {10.5555/827245.827324},
timestamp = {Fri, 03 Jun 2022 10:50:13 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/MolzEMTR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/DiouTR99,
author = {Camille Diou and
Lionel Torres and
Michel Robert},
editor = {L. Miguel Silveira and
Srinivas Devadas and
Ricardo Augusto da Luz Reis},
title = {Implementation of a Wavelet Transform Architecture for Image Processing},
booktitle = {{VLSI:} Systems on a Chip, {IFIP} {TC10/WG10.5} Tenth International
Conference on Very Large Scale Integration {(VLSI} '99), December
1-4, 1999, Lisbon, Portugal},
series = {{IFIP} Conference Proceedings},
volume = {162},
pages = {101--112},
publisher = {Kluwer},
year = {1999},
timestamp = {Mon, 14 Oct 2002 13:30:59 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/DiouTR99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/RaimbaultSCRPT99,
author = {S. Raimbault and
Gilles Sassatelli and
Gamille Cambon and
Michel Robert and
S{\'{e}}bastien Pillement and
Lionel Torres},
editor = {L. Miguel Silveira and
Srinivas Devadas and
Ricardo Augusto da Luz Reis},
title = {Embedded Systems Design And Verification: Reuse Oriented Prototyping
Methodologies},
booktitle = {{VLSI:} Systems on a Chip, {IFIP} {TC10/WG10.5} Tenth International
Conference on Very Large Scale Integration {(VLSI} '99), December
1-4, 1999, Lisbon, Portugal},
series = {{IFIP} Conference Proceedings},
volume = {162},
pages = {407--414},
publisher = {Kluwer},
year = {1999},
timestamp = {Mon, 14 Oct 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/RaimbaultSCRPT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PillementTRC99,
author = {S{\'{e}}bastien Pillement and
Lionel Torres and
Michel Robert and
Gaston Cambon},
title = {Fast Prototyping: {A} Case Study - The {JPEG} Compression Algorithm},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {87},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779036},
doi = {10.1109/IWRSP.1999.779036},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PillementTRC99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/rti/TorresBRP98,
author = {Lionel Torres and
El{-}Bay Bourennane and
Michel Robert and
Michel Paindavoine},
title = {A Recursive Digital Filter Implementation for Noisy and Blurred Images},
journal = {Real Time Imaging},
volume = {4},
number = {3},
pages = {181--191},
year = {1998},
url = {https://doi.org/10.1006/rtim.1997.0094},
doi = {10.1006/RTIM.1997.0094},
timestamp = {Thu, 21 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/rti/TorresBRP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PillementTRC96,
author = {S{\'{e}}bastien Pillement and
Lionel Torres and
Michel Robert and
Gaston Cambon},
editor = {Reiner W. Hartenstein and
Manfred Glesner},
title = {Concurrent Design of Hardware/Software Dedicated Systems},
booktitle = {Field-Programmable Logic, Smart Applications, New Paradigms and Compilers,
6th International Workshop on Field-Programmable Logic, {FPL} '96,
Darmstadt, Germany, September 23-25, 1996, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1142},
pages = {410--414},
publisher = {Springer},
year = {1996},
url = {https://doi.org/10.1007/3-540-61730-2\_48},
doi = {10.1007/3-540-61730-2\_48},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PillementTRC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RobertTMA94,
author = {Michel Robert and
Lionel Torres and
Fernando Moraes and
Daniel Auvergne},
editor = {Reiner W. Hartenstein and
Michal Serv{\'{\i}}t},
title = {Influence of Locig Block Layout Architecture on {FPGA} Performance},
booktitle = {Field-Programmable Logic, Architectures, Synthesis and Applications,
4th International Workshop on Field-Programmable Logic and Applications,
{FPL} '94, Prague, Czech Republic, September 7-9, 1994, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {849},
pages = {34--44},
publisher = {Springer},
year = {1994},
url = {https://doi.org/10.1007/3-540-58419-6\_67},
doi = {10.1007/3-540-58419-6\_67},
timestamp = {Tue, 10 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/RobertTMA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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