BibTeX records: Chia-Chun Tsai

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@article{DBLP:journals/jksucis/ChenLKLLLKT22,
  author       = {Ssu{-}Han Chen and
                  Yu{-}Wei Lai and
                  Chung{-}Lun Kuo and
                  Chieh{-}Yi Lo and
                  Yu{-}Sung Lin and
                  Yan{-}Rung Lin and
                  Chih{-}Hsiang Kang and
                  Chia{-}Chun Tsai},
  title        = {A surface defect detection system for golden diamond pineapple based
                  on CycleGAN and YOLOv4},
  journal      = {J. King Saud Univ. Comput. Inf. Sci.},
  volume       = {34},
  number       = {10 Part {A}},
  pages        = {8041--8053},
  year         = {2022},
  url          = {https://doi.org/10.1016/j.jksuci.2022.07.018},
  doi          = {10.1016/J.JKSUCI.2022.07.018},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jksucis/ChenLKLLLKT22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/aei/ChenT21,
  author       = {Ssu{-}Han Chen and
                  Chia{-}Chun Tsai},
  title        = {{SMD} {LED} chips defect detection using a YOLOv3-dense model},
  journal      = {Adv. Eng. Informatics},
  volume       = {47},
  pages        = {101255},
  year         = {2021},
  url          = {https://doi.org/10.1016/j.aei.2021.101255},
  doi          = {10.1016/J.AEI.2021.101255},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/aei/ChenT21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/case/TsaiKC20,
  author       = {Chia{-}Chun Tsai and
                  Chih{-}Chia Kuo and
                  Yen{-}Lun Chen},
  title        = {3D Hand Gesture Recognition for Drone Control in Unity\({}^{\mbox{*}}\)},
  booktitle    = {16th {IEEE} International Conference on Automation Science and Engineering,
                  {CASE} 2020, Hong Kong, August 20-21, 2020},
  pages        = {985--988},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/CASE48305.2020.9216807},
  doi          = {10.1109/CASE48305.2020.9216807},
  timestamp    = {Wed, 14 Oct 2020 12:18:11 +0200},
  biburl       = {https://dblp.org/rec/conf/case/TsaiKC20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isocc/Tsai19,
  author       = {Chia{-}Chun Tsai},
  title        = {Performance Improvement for Stacked-Layer Data Bus Reconstruction
                  on Complete Timing Period},
  booktitle    = {2019 International SoC Design Conference, {ISOCC} 2019, Jeju, Korea
                  (South), October 6-9, 2019},
  pages        = {52--53},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ISOCC47750.2019.9078523},
  doi          = {10.1109/ISOCC47750.2019.9078523},
  timestamp    = {Mon, 11 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isocc/Tsai19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lascas/Tsai18,
  author       = {Chia{-}Chun Tsai},
  title        = {Embedded bus switches on 3D data bus for critical access time reduction},
  booktitle    = {9th {IEEE} Latin American Symposium on Circuits {\&} Systems,
                  {LASCAS} 2018, Puerto Vallarta, Mexico, February 25-28, 2018},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/LASCAS.2018.8399932},
  doi          = {10.1109/LASCAS.2018.8399932},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/lascas/Tsai18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/Tsai17,
  author       = {Chia{-}Chun Tsai},
  title        = {Minimizing Critical Access Time for 3D Data Bus Based on Inserted
                  Bus Switches and Repeaters},
  booktitle    = {2017 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2017,
                  Bochum, Germany, July 3-5, 2017},
  pages        = {140--145},
  publisher    = {{IEEE} Computer Society},
  year         = {2017},
  url          = {https://doi.org/10.1109/ISVLSI.2017.33},
  doi          = {10.1109/ISVLSI.2017.33},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isvlsi/Tsai17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LaiJLCCTL16,
  author       = {Shin{-}Chi Lai and
                  Wen{-}Ho Juang and
                  Yueh{-}Shu Lee and
                  Shin{-}Hao Chen and
                  Ke{-}Horng Chen and
                  Chia{-}Chun Tsai and
                  Chiung{-}Hon Lee},
  title        = {Hybrid Architecture Design for Calculating Variable-Length Fourier
                  Transform},
  journal      = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
  volume       = {63-II},
  number       = {3},
  pages        = {279--283},
  year         = {2016},
  url          = {https://doi.org/10.1109/TCSII.2015.2482238},
  doi          = {10.1109/TCSII.2015.2482238},
  timestamp    = {Wed, 27 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/LaiJLCCTL16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cec/YangYTCC15,
  author       = {Hong{-}Tzer Yang and
                  Chiao{-}Tung Yang and
                  Chia{-}Chun Tsai and
                  Guan{-}Jhih Chen and
                  Szu{-}Yao Chen},
  title        = {Improved {PSO} based home energy management systems integrated with
                  demand response in a smart grid},
  booktitle    = {{IEEE} Congress on Evolutionary Computation, {CEC} 2015, Sendai, Japan,
                  May 25-28, 2015},
  pages        = {275--282},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/CEC.2015.7256902},
  doi          = {10.1109/CEC.2015.7256902},
  timestamp    = {Fri, 27 Dec 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/cec/YangYTCC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cisis/LeeLFTW13,
  author       = {Trong{-}Yen Lee and
                  Min{-}Jea Liu and
                  Chia{-}Chen Fan and
                  Chia{-}Chun Tsai and
                  Haixia Wu},
  editor       = {Leonard Barolli and
                  Fatos Xhafa and
                  Hsing{-}Chung Chen and
                  Antonio Fernandez G{\'{o}}mez{-}Skarmeta and
                  Farooq Hussain},
  title        = {Low Complexity Digit-Serial Multiplier over GF(2{\^{}}m) Using Karatsuba
                  Technology},
  booktitle    = {Seventh International Conference on Complex, Intelligent, and Software
                  Intensive Systems, {CISIS} 2013, Taichung, Taiwan, July 3-5, 2013},
  pages        = {461--466},
  publisher    = {{IEEE} Computer Society},
  year         = {2013},
  url          = {https://doi.org/10.1109/CISIS.2013.84},
  doi          = {10.1109/CISIS.2013.84},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/cisis/LeeLFTW13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icnc/Tsai13,
  author       = {Chia{-}Chun Tsai},
  editor       = {Haiying Wang and
                  Shiu Yin Yuen and
                  Lipo Wang and
                  Liangshan Shao and
                  Xing Wang},
  title        = {A reduced Li-Ion battery charger for portable applications},
  booktitle    = {Ninth International Conference on Natural Computation, {ICNC} 2013,
                  Shenyang, China, July 23-25, 2013},
  pages        = {1718--1722},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ICNC.2013.6818259},
  doi          = {10.1109/ICNC.2013.6818259},
  timestamp    = {Fri, 19 Jun 2020 11:35:41 +0200},
  biburl       = {https://dblp.org/rec/conf/icnc/Tsai13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/TsaiKHL12,
  author       = {Chia{-}Chun Tsai and
                  Chung{-}Chieh Kuo and
                  Feng{-}Tzu Hsu and
                  Trong{-}Yen Lee},
  title        = {Discharge-path-based antenna effect detection and fixing for X-architecture
                  clock tree},
  journal      = {Integr.},
  volume       = {45},
  number       = {1},
  pages        = {76--90},
  year         = {2012},
  url          = {https://doi.org/10.1016/j.vlsi.2011.05.002},
  doi          = {10.1016/J.VLSI.2011.05.002},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/TsaiKHL12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/LinLHT12,
  author       = {Kuan{-}Yu Lin and
                  Hong{-}Ting Lin and
                  Tsung{-}Yi Ho and
                  Chia{-}Chun Tsai},
  title        = {Load-balanced clock tree synthesis with adjustable delay buffer insertion
                  for clock skew reduction in multiple dynamic supply voltage designs},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {17},
  number       = {3},
  pages        = {34:1--34:22},
  year         = {2012},
  url          = {https://doi.org/10.1145/2209291.2209307},
  doi          = {10.1145/2209291.2209307},
  timestamp    = {Wed, 25 Sep 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/LinLHT12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fskd/TsaiLL12,
  author       = {Chia{-}Chun Tsai and
                  Tsung{-}Ming Liu and
                  Trong{-}Yen Lee},
  title        = {Micro fuel cell power management circuit design for portable devices},
  booktitle    = {9th International Conference on Fuzzy Systems and Knowledge Discovery,
                  {FSKD} 2012, 29-31 May 2012, Chongqing, China},
  pages        = {2493--2496},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/FSKD.2012.6234367},
  doi          = {10.1109/FSKD.2012.6234367},
  timestamp    = {Wed, 16 Oct 2019 14:14:57 +0200},
  biburl       = {https://dblp.org/rec/conf/fskd/TsaiLL12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/TsaiKL11,
  author       = {Chia{-}Chun Tsai and
                  Chung{-}Chieh Kuo and
                  Trong{-}Yen Lee},
  title        = {Post-Routing Double-Via Insertion for X-Architecture Clock Tree Yield
                  Improvement},
  journal      = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
  volume       = {94-A},
  number       = {2},
  pages        = {706--716},
  year         = {2011},
  url          = {https://doi.org/10.1587/transfun.E94.A.706},
  doi          = {10.1587/TRANSFUN.E94.A.706},
  timestamp    = {Sat, 11 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/TsaiKL11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/KuoTL11,
  author       = {Chung{-}Chieh Kuo and
                  Chia{-}Chun Tsai and
                  Trong{-}Yen Lee},
  title        = {Pattern-matching-based X-architecture zero-skew clock tree construction
                  with X-Flip technique and via delay consideration},
  journal      = {Integr.},
  volume       = {44},
  number       = {1},
  pages        = {87--101},
  year         = {2011},
  url          = {https://doi.org/10.1016/j.vlsi.2010.09.002},
  doi          = {10.1016/J.VLSI.2010.09.002},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/KuoTL11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/TsaiDL11,
  author       = {Chia{-}Chun Tsai and
                  Sheng{-}Bin Dai and
                  Trong{-}Yen Lee},
  title        = {The {RF} Circuit Design of Power and Data Contactless Transmission
                  for {ISO/IEC} 14443-2 Type {B}},
  journal      = {J. Circuits Syst. Comput.},
  volume       = {20},
  number       = {8},
  pages        = {1637--1658},
  year         = {2011},
  url          = {https://doi.org/10.1142/S0218126611008092},
  doi          = {10.1142/S0218126611008092},
  timestamp    = {Tue, 25 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jcsc/TsaiDL11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/LeeHLT10,
  author       = {Trong{-}Yen Lee and
                  Che{-}Cheng Hu and
                  Li{-}Wen Lai and
                  Chia{-}Chun Tsai},
  title        = {Hardware Context-Switch Methodology for Dynamically Partially Reconfigurable
                  Systems},
  journal      = {J. Inf. Sci. Eng.},
  volume       = {26},
  number       = {4},
  pages        = {1289--1305},
  year         = {2010},
  url          = {http://www.iis.sinica.edu.tw/page/jise/2010/201007\_09.html},
  timestamp    = {Fri, 16 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jise/LeeHLT10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TsaiKGL10,
  author       = {Chia{-}Chun Tsai and
                  Chung{-}Chieh Kuo and
                  Lin{-}Jeng Gu and
                  Trong{-}Yen Lee},
  title        = {Double-via insertion enhanced X-architecture clock routing for reliability},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
                  30 - June 2, 2010, Paris, France},
  pages        = {3413--3416},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ISCAS.2010.5537863},
  doi          = {10.1109/ISCAS.2010.5537863},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/TsaiKGL10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/TsaiKGL10,
  author       = {Chia{-}Chun Tsai and
                  Chung{-}Chieh Kuo and
                  Lin{-}Jeng Gu and
                  Trong{-}Yen Lee},
  title        = {Antenna Violation Avoidance/Fixing for X-clock routing},
  booktitle    = {11th International Symposium on Quality of Electronic Design {(ISQED}
                  2010), 22-24 March 2010, San Jose, CA, {USA}},
  pages        = {508--514},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ISQED.2010.5450525},
  doi          = {10.1109/ISQED.2010.5450525},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/TsaiKGL10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cssp/TsaiWL09,
  author       = {Chia{-}Chun Tsai and
                  Jan{-}Ou Wu and
                  Trong{-}Yen Lee},
  title        = {Maximal Delay Reduction for RLC-Based Multi-Source Multi-Sink Bus
                  with Repeater Insertion},
  journal      = {Circuits Syst. Signal Process.},
  volume       = {28},
  number       = {6},
  pages        = {805--817},
  year         = {2009},
  url          = {https://doi.org/10.1007/s00034-009-9132-5},
  doi          = {10.1007/S00034-009-9132-5},
  timestamp    = {Sun, 21 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cssp/TsaiWL09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/TsaiHL09,
  author       = {Chia{-}Chun Tsai and
                  Kai{-}Wei Hong and
                  Trong{-}Yen Lee},
  title        = {A Bisection-Based Power Reduction Design for {CMOS} Flash Analog-to-Digital
                  converters},
  journal      = {J. Circuits Syst. Comput.},
  volume       = {18},
  number       = {5},
  pages        = {933--945},
  year         = {2009},
  url          = {https://doi.org/10.1142/S0218126609005459},
  doi          = {10.1142/S0218126609005459},
  timestamp    = {Tue, 25 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jcsc/TsaiHL09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/TsaiLHL09,
  author       = {Chia{-}Chun Tsai and
                  Chin{-}Yen Lin and
                  Yuh{-}Shyan Hwang and
                  Trong{-}Yen Lee},
  title        = {The Design of a Li-ion Battery Charger Based on Multimode {LDO} Technology},
  journal      = {J. Circuits Syst. Comput.},
  volume       = {18},
  number       = {5},
  pages        = {947--963},
  year         = {2009},
  url          = {https://doi.org/10.1142/S0218126609005460},
  doi          = {10.1142/S0218126609005460},
  timestamp    = {Tue, 25 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jcsc/TsaiLHL09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/TsaiWL08,
  author       = {Chia{-}Chun Tsai and
                  Jan{-}Ou Wu and
                  Trong{-}Yen Lee},
  title        = {{GDME:} Grey Relational Clustering Applied to a Clock Tree Construction
                  with Zero Skew and Minimal Delay},
  journal      = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
  volume       = {91-A},
  number       = {1},
  pages        = {365--374},
  year         = {2008},
  url          = {https://doi.org/10.1093/ietfec/e91-a.1.365},
  doi          = {10.1093/IETFEC/E91-A.1.365},
  timestamp    = {Sat, 11 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/TsaiWL08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEcit/TsaiLWKL08,
  author       = {Chia{-}Chun Tsai and
                  Wei{-}Shi Lin and
                  Jan{-}Ou Wu and
                  Chung{-}Chieh Kuo and
                  Trong{-}Yen Lee},
  editor       = {Qiang Wu and
                  Xiangjian He and
                  Quang Vinh Nguyen and
                  Wenjing Jia and
                  Mao Lin Huang},
  title        = {Layer assignment considering manufacturability in X-architecture clock
                  tree},
  booktitle    = {Proceedings of 8th {IEEE} International Conference on Computer and
                  Information Technology, {CIT} 2008, Sydney, Australia, July 8-11,
                  2008},
  pages        = {880--885},
  publisher    = {{IEEE} Computer Society},
  year         = {2008},
  url          = {https://doi.org/10.1109/CIT.2008.4594790},
  doi          = {10.1109/CIT.2008.4594790},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/IEEEcit/TsaiLWKL08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/TsaiKWLH08,
  author       = {Chia{-}Chun Tsai and
                  Chung{-}Chieh Kuo and
                  Jan{-}Ou Wu and
                  Trong{-}Yen Lee and
                  Rong{-}Shue Hsiao},
  title        = {X-clock routing based on pattern matching},
  booktitle    = {21st Annual {IEEE} International SoC Conference, SoCC 2008, September
                  17-20, 2008, Radisson Hotel, Newport Beach, CA, USA, Proceedings},
  pages        = {357--360},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/SOCC.2008.4641544},
  doi          = {10.1109/SOCC.2008.4641544},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/socc/TsaiKWLH08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/WuTKL07,
  author       = {Jan{-}Ou Wu and
                  Chia{-}Chun Tsai and
                  Chung{-}Chieh Kuo and
                  Trong{-}Yen Lee},
  title        = {Zero-Skew Driven Buffered {RLC} Clock Tree Construction},
  journal      = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
  volume       = {90-A},
  number       = {3},
  pages        = {651--658},
  year         = {2007},
  url          = {https://doi.org/10.1093/ietfec/e90-a.3.651},
  doi          = {10.1093/IETFEC/E90-A.3.651},
  timestamp    = {Sat, 11 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/WuTKL07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iih-msp/LeeFCTH07,
  author       = {Trong{-}Yen Lee and
                  Yang{-}Hsin Fan and
                  Yu{-}Min Cheng and
                  Chia{-}Chun Tsai and
                  Rong{-}Shue Hsiao},
  editor       = {Bin{-}Yih Liao and
                  Jeng{-}Shyang Pan and
                  Lakhmi C. Jain and
                  Mark Liao and
                  Hideki Noda and
                  Anthony T. S. Ho},
  title        = {Enhancement of Hardware-Software Partition for Embedded Multiprocessor
                  {FPGA} Systems},
  booktitle    = {3rd International Conference on Intelligent Information Hiding and
                  Multimedia Signal Processing {(IIH-MSP} 2007), Kaohsiung, Taiwan,
                  26-28 November 2007, Proceedings},
  pages        = {19--22},
  publisher    = {{IEEE} Computer Society},
  year         = {2007},
  url          = {https://doi.org/10.1109/IIHMSP.2007.4457483},
  doi          = {10.1109/IIHMSP.2007.4457483},
  timestamp    = {Fri, 24 Mar 2023 08:33:27 +0100},
  biburl       = {https://dblp.org/rec/conf/iih-msp/LeeFCTH07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/imecs/LeeFCTH07,
  author       = {Trong{-}Yen Lee and
                  Yang{-}Hsin Fan and
                  Yu{-}Min Cheng and
                  Chia{-}Chun Tsai and
                  Rong{-}Shue Hsiao},
  editor       = {Sio Iong Ao and
                  Oscar Castillo and
                  Craig Douglas and
                  David Dagan Feng and
                  Jeong{-}A Lee},
  title        = {An Efficiently Hardware-Software Partitioning for Embedded Multiprocessor
                  {FPGA} Systems},
  booktitle    = {Proceedings of the International MultiConference of Engineers and
                  Computer Scientists 2007, {IMECS} 2007, March 21-23, 2007, Hong Kong,
                  China},
  series       = {Lecture Notes in Engineering and Computer Science},
  pages        = {346--351},
  publisher    = {Newswood Limited},
  year         = {2007},
  timestamp    = {Wed, 12 Sep 2018 01:05:12 +0200},
  biburl       = {https://dblp.org/rec/conf/imecs/LeeFCTH07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/TsaiHLLW06,
  author       = {Chia{-}Chun Tsai and
                  Hann{-}Cheng Huang and
                  Trong{-}Yen Lee and
                  Wen{-}Ta Lee and
                  Jan{-}Ou Wu},
  title        = {Using Stack Reconstruction on {RTL} Orthogonal Scan Chain Design},
  journal      = {J. Inf. Sci. Eng.},
  volume       = {22},
  number       = {6},
  pages        = {1585--1599},
  year         = {2006},
  url          = {http://www.iis.sinica.edu.tw/page/jise/2006/200611\_18.html},
  timestamp    = {Fri, 16 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jise/TsaiHLLW06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/TsaiWSKL06,
  author       = {Chia{-}Chun Tsai and
                  Jan{-}Ou Wu and
                  Yu{-}Ting Shieh and
                  Chung{-}Chieh Kuo and
                  Trong{-}Yen Lee},
  title        = {Tapping Point Numerical-Based Search for Exact Zero-Skew {RLC} Clock
                  Tree Construction},
  booktitle    = {{IEEE} Asia Pacific Conference on Circuits and Systems 2006, {APCCAS}
                  2006, Singapore, 4-7 December 2006},
  pages        = {812--815},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/APCCAS.2006.342145},
  doi          = {10.1109/APCCAS.2006.342145},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/apccas/TsaiWSKL06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/TsaiWLH06,
  author       = {Chia{-}Chun Tsai and
                  Jan{-}Ou Wu and
                  Trong{-}Yen Lee and
                  Rong{-}Shue Hsiao},
  title        = {Propagation Delay Minimization on RLC-Based Bus with Repeater Insertion},
  booktitle    = {{IEEE} Asia Pacific Conference on Circuits and Systems 2006, {APCCAS}
                  2006, Singapore, 4-7 December 2006},
  pages        = {1285--1288},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/APCCAS.2006.342398},
  doi          = {10.1109/APCCAS.2006.342398},
  timestamp    = {Wed, 17 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/apccas/TsaiWLH06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icicic/LeeFT06,
  author       = {Trong{-}Yen Lee and
                  Yang{-}Hsin Fan and
                  Chia{-}Chun Tsai},
  title        = {Reduction of {RLC} Tree Delay Using Bidirectional Buffer Repeater
                  Insertion},
  booktitle    = {First International Conference on Innovative Computing, Information
                  and Control {(ICICIC} 2006), 30 August - 1 September 2006, Beijing,
                  China},
  pages        = {515--518},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/ICICIC.2006.337},
  doi          = {10.1109/ICICIC.2006.337},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icicic/LeeFT06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LaiJCT06,
  author       = {Chun{-}Ying Lai and
                  Shyh{-}Kang Jeng and
                  Yao{-}Wen Chang and
                  Chia{-}Chun Tsai},
  title        = {Inductance extraction for general interconnect structures},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
                  May 2006, Island of Kos, Greece},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISCAS.2006.1693666},
  doi          = {10.1109/ISCAS.2006.1693666},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LaiJCT06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TsaiCLH06,
  author       = {Chia{-}Chun Tsai and
                  Huang{-}Chi Chou and
                  Trong{-}Yen Lee and
                  Rong{-}Shue Hsiao},
  title        = {A single chip image sensor embedded smooth spatial filter with {A/D}
                  conversion},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
                  May 2006, Island of Kos, Greece},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISCAS.2006.1692613},
  doi          = {10.1109/ISCAS.2006.1692613},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/TsaiCLH06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TsaiWKLH06,
  author       = {Chia{-}Chun Tsai and
                  Jan{-}Ou Wu and
                  Chien{-}Wen Kao and
                  Trong{-}Yen Lee and
                  Rong{-}Shue Hsiao},
  title        = {Coupling aware RLC-based clock routings for crosstalk minimization},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
                  May 2006, Island of Kos, Greece},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISCAS.2006.1692631},
  doi          = {10.1109/ISCAS.2006.1692631},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/TsaiWKLH06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icita/TsaiWKLL05,
  author       = {Chia{-}Chun Tsai and
                  Jan{-}Ou Wu and
                  Chung{-}Chieh Kuo and
                  Trong{-}Yen Lee and
                  Wen{-}Ta Lee},
  title        = {Zero-Skew Driven for {RLC} Clock Tree Construction in SoC},
  booktitle    = {Third International Conference on Information Technology and Applications
                  {(ICITA} 2005), 4-7 July 2005, Sydney, Australia},
  pages        = {561--566},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/ICITA.2005.315},
  doi          = {10.1109/ICITA.2005.315},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icita/TsaiWKLL05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeeLTLH05,
  author       = {Wen{-}Ta Lee and
                  San{-}Ho Lin and
                  Chia{-}Chun Tsai and
                  Trong{-}Yen Lee and
                  Yuh{-}Shyan Hwang},
  title        = {A new low-power turbo decoder using {HDA-DHDD} stopping iteration},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
                  May 2005, Kobe, Japan},
  pages        = {1040--1043},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCAS.2005.1464769},
  doi          = {10.1109/ISCAS.2005.1464769},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeeLTLH05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HwangLTLLC05,
  author       = {Yuh{-}Shyan Hwang and
                  Lu{-}Po Liao and
                  Chia{-}Chun Tsai and
                  Wen{-}Ta Lee and
                  Trong{-}Yen Lee and
                  Jiann{-}Jong Chen},
  title        = {A new CCII-based pipelined analog to digital converter},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
                  May 2005, Kobe, Japan},
  pages        = {6170--6173},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCAS.2005.1466049},
  doi          = {10.1109/ISCAS.2005.1466049},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HwangLTLLC05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tce/HsiaoHLTL04,
  author       = {Pei{-}Yung Hsiao and
                  Yu{-}Chun Hsu and
                  Wen{-}Ta Lee and
                  Chia{-}Chun Tsai and
                  Chia{-}Hao Lee},
  title        = {An embedded analog spatial filter design of the current-mode {CMOS}
                  image sensor},
  journal      = {{IEEE} Trans. Consumer Electron.},
  volume       = {50},
  number       = {3},
  pages        = {945--951},
  year         = {2004},
  url          = {https://doi.org/10.1109/TCE.2004.1341705},
  doi          = {10.1109/TCE.2004.1341705},
  timestamp    = {Thu, 09 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tce/HsiaoHLTL04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/atva/LeeFYTLH04,
  author       = {Trong{-}Yen Lee and
                  Yang{-}Hsin Fan and
                  Tsung{-}Hsun Yang and
                  Chia{-}Chun Tsai and
                  Wen{-}Ta Lee and
                  Yuh{-}Shyan Hwang},
  editor       = {Farn Wang},
  title        = {{RCGES:} Retargetable Code Generation for Embedded Systems},
  booktitle    = {Automated Technology for Verification and Analysis: Second International
                  Conference, {ATVA} 2004, Taipei, Taiwan, ROC, October 31-November
                  3, 2004. Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {3299},
  pages        = {415--425},
  publisher    = {Springer},
  year         = {2004},
  url          = {https://doi.org/10.1007/978-3-540-30476-0\_34},
  doi          = {10.1007/978-3-540-30476-0\_34},
  timestamp    = {Tue, 14 May 2019 10:00:49 +0200},
  biburl       = {https://dblp.org/rec/conf/atva/LeeFYTLH04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/YangCHT00,
  author       = {Cheng{-}Hsing Yang and
                  Sao{-}Jie Chen and
                  Jan{-}Ming Ho and
                  Chia{-}Chun Tsai},
  title        = {Efficient routability check algorithms for segmented channel routing},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {5},
  number       = {3},
  pages        = {735--747},
  year         = {2000},
  url          = {https://doi.org/10.1145/348019.348574},
  doi          = {10.1145/348019.348574},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/YangCHT00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/CherngCTH99,
  author       = {Jong{-}Sheng Cherng and
                  Sao{-}Jie Chen and
                  Chia{-}Chun Tsai and
                  Jan{-}Ming Ho},
  title        = {An Efficient Two-Level Partitioning Algorithm for {VLSI} Circuits},
  booktitle    = {Proceedings of the 1999 Conference on Asia South Pacific Design Automation,
                  Wanchai, Hong Kong, China, January 18-21, 1999},
  pages        = {69--72},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ASPDAC.1999.759712},
  doi          = {10.1109/ASPDAC.1999.759712},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/aspdac/CherngCTH99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ChenCCT99,
  author       = {Shuenn{-}Shi Chen and
                  Jong{-}Jang Chen and
                  Sao{-}Jie Chen and
                  Chia{-}Chun Tsai},
  title        = {An Automatic Router for the Pin Grid Array Package},
  booktitle    = {Proceedings of the 1999 Conference on Asia South Pacific Design Automation,
                  Wanchai, Hong Kong, China, January 18-21, 1999},
  pages        = {133--136},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ASPDAC.1999.759783},
  doi          = {10.1109/ASPDAC.1999.759783},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/aspdac/ChenCCT99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ChenCCT99,
  author       = {Shuenn{-}Shi Chen and
                  Jong{-}Jang Chen and
                  Sao{-}Jie Chen and
                  Chia{-}Chun Tsai},
  title        = {An Even Wiring Approach to the Ball Grid Array Package Routing},
  booktitle    = {Proceedings of the {IEEE} International Conference On Computer Design,
                  {VLSI} in Computers and Processors, {ICCD} '99, Austin, Texas, USA,
                  October 10-13, 1999},
  pages        = {303--306},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ICCD.1999.808555},
  doi          = {10.1109/ICCD.1999.808555},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccd/ChenCCT99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TsaiWC98,
  author       = {Chia{-}Chun Tsai and
                  Chwan{-}Ming Wang and
                  Sao{-}Jie Chen},
  title        = {{NEWS:} a net-even-wiring system for the routing on a multilayer {PGA}
                  package},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {17},
  number       = {2},
  pages        = {182--189},
  year         = {1998},
  url          = {https://doi.org/10.1109/43.681268},
  doi          = {10.1109/43.681268},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/TsaiWC98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/YangTHC97,
  author       = {Cheng{-}Hsing Yang and
                  Chia{-}Chun Tsai and
                  Jan{-}Ming Ho and
                  Sao{-}Jie Chen},
  title        = {Hmap: a fast mapper for EPGAs using extended {GBDD} hash tables},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {2},
  number       = {2},
  pages        = {135--150},
  year         = {1997},
  url          = {https://doi.org/10.1145/253052.253098},
  doi          = {10.1145/253052.253098},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/YangTHC97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TsaiKC96,
  author       = {Chia{-}Chun Tsai and
                  De{-}Yu Kao and
                  Chung{-}Kuan Cheng},
  title        = {Performance driven bus buffer insertion},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {15},
  number       = {4},
  pages        = {429--437},
  year         = {1996},
  url          = {https://doi.org/10.1109/43.494706},
  doi          = {10.1109/43.494706},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/TsaiKC96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TsaiKCL95,
  author       = {Chia{-}Chun Tsai and
                  De{-}Yu Kao and
                  Chung{-}Kuan Cheng and
                  Ting{-}Ting Y. Lin},
  editor       = {Isao Shirakawa},
  title        = {Performance driven multiple-source bus synthesis using buffer insertion},
  booktitle    = {Proceedings of the 1995 Conference on Asia Pacific Design Automation,
                  Makuhari, Massa, Chiba, Japan, August 29 - September 1, 1995},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224818.224909},
  doi          = {10.1145/224818.224909},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/TsaiKCL95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/TsaiC94,
  author       = {Chia{-}Chun Tsai and
                  Sao{-}Jie Chen},
  title        = {A Linear Time Algorithm for Planar Moat Routing},
  journal      = {J. Inf. Sci. Eng.},
  volume       = {10},
  number       = {1},
  pages        = {111--127},
  year         = {1994},
  url          = {http://www.iis.sinica.edu.tw/page/jise/1994/199403\_07.html},
  timestamp    = {Fri, 16 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jise/TsaiC94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TsaiCF92,
  author       = {Chia{-}Chun Tsai and
                  Sao{-}Jie Chen and
                  Wu{-}Shiung Feng},
  title        = {An {H-V} alternating router},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {11},
  number       = {8},
  pages        = {976--991},
  year         = {1992},
  url          = {https://doi.org/10.1109/43.149769},
  doi          = {10.1109/43.149769},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/TsaiCF92.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HsiaoLT92,
  author       = {Pei{-}Yung Hsiao and
                  Chiao{-}Yi Lin and
                  Chia{-}Chun Tsai},
  title        = {Minimum Partition for the Space Region of {VLSI} Layout},
  booktitle    = {Proceedings of the Fifth International Conference on {VLSI} Design,
                  {VLSI} Design 1992, Bangalore, India, January 4-7, 1992},
  pages        = {273--276},
  publisher    = {{IEEE} Computer Society},
  year         = {1992},
  url          = {https://doi.org/10.1109/ICVD.1992.658061},
  doi          = {10.1109/ICVD.1992.658061},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/HsiaoLT92.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cad/HsiaoCTF91,
  author       = {Pei{-}Yung Hsiao and
                  S. F. Steven Chen and
                  Chia{-}Chun Tsai and
                  Wu{-}Shiung Feng},
  title        = {A knowledge-based program for compacting mask layout of integrated
                  circuits},
  journal      = {Comput. Aided Des.},
  volume       = {23},
  number       = {3},
  pages        = {223--231},
  year         = {1991},
  url          = {https://doi.org/10.1016/0010-4485(91)90092-B},
  doi          = {10.1016/0010-4485(91)90092-B},
  timestamp    = {Thu, 13 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cad/HsiaoCTF91.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cad/TsaiCF90,
  author       = {Chia{-}Chun Tsai and
                  Sao{-}Jie Chen and
                  Wu{-}Shiung Feng},
  title        = {Generalized terminal connectivity problem for multilayer layout scheme},
  journal      = {Comput. Aided Des.},
  volume       = {22},
  number       = {7},
  pages        = {423--433},
  year         = {1990},
  url          = {https://doi.org/10.1016/0010-4485(90)90107-N},
  doi          = {10.1016/0010-4485(90)90107-N},
  timestamp    = {Thu, 13 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cad/TsaiCF90.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/TsaiCF90,
  author       = {Chia{-}Chun Tsai and
                  Sao{-}Jie Chen and
                  Wu{-}Shiung Feng},
  title        = {An \emph{H-V} Tile-Expansion Router},
  journal      = {J. Inf. Sci. Eng.},
  volume       = {6},
  number       = {3},
  pages        = {173--189},
  year         = {1990},
  url          = {http://www.iis.sinica.edu.tw/page/jise/1990/199009\_02.html},
  timestamp    = {Fri, 16 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jise/TsaiCF90.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compsac/HsiaoT90,
  author       = {Pei{-}Yung Hsiao and
                  Chia{-}Chun Tsai},
  title        = {A new plane-sweep algorithm based on spatial data structure for overlapped
                  rectangles in 2-D plane},
  booktitle    = {Proceedings of the Fourteenth Annual International Computer Software
                  and Applications Conference, {COMPSAC} 1990, Chicago, IL, USA, October
                  31 1990 - November 2, 1990},
  pages        = {347--352},
  publisher    = {{IEEE}},
  year         = {1990},
  url          = {https://doi.org/10.1109/CMPSAC.1990.139379},
  doi          = {10.1109/CMPSAC.1990.139379},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/compsac/HsiaoT90.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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