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BibTeX records: Kun-Han Tsai
@inproceedings{DBLP:conf/vts/LiYWSDTL21, author = {Wei Li and Shih{-}Yu Yang and Khen Wee and Ricardo Sanchez and Jay Desai and Kun{-}Han Tsai and Xijiang Lin}, title = {Timing Critical Path Validation for Intel {ATOM} Cores Using Structural Test}, booktitle = {39th {IEEE} {VLSI} Test Symposium, {VTS} 2021, San Diego, CA, USA, April 25-28, 2021}, pages = {1--6}, publisher = {{IEEE}}, year = {2021}, url = {https://doi.org/10.1109/VTS50974.2021.9441049}, doi = {10.1109/VTS50974.2021.9441049}, timestamp = {Wed, 09 Jun 2021 08:59:55 +0200}, biburl = {https://dblp.org/rec/conf/vts/LiYWSDTL21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/LaiTL20, author = {Liyang Lai and Kun{-}Han Tsai and Huawei Li}, title = {GPGPU-Based {ATPG} System: Myth or Reality?}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {39}, number = {1}, pages = {239--247}, year = {2020}, url = {https://doi.org/10.1109/TCAD.2018.2884992}, doi = {10.1109/TCAD.2018.2884992}, timestamp = {Thu, 11 May 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/LaiTL20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/ChernLHHVTC20, author = {Mason Chern and Shih{-}Wei Lee and Shi{-}Yu Huang and Yu Huang and Gaurav Veda and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {Diagnosis of Intermittent Scan Chain Faults Through a Multistage Neural Network Reasoning Process}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {39}, number = {10}, pages = {3044--3055}, year = {2020}, url = {https://doi.org/10.1109/TCAD.2019.2957356}, doi = {10.1109/TCAD.2019.2957356}, timestamp = {Tue, 06 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/ChernLHHVTC20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/ShpiroWTZL20, author = {Uri Shpiro and Khen Wee and Kun{-}Han Tsai and Justyna Zawada and Xijiang Lin}, title = {Test Challenges of Intel {IA} Cores}, booktitle = {{IEEE} International Test Conference, {ITC} 2020, Washington, DC, USA, November 1-6, 2020}, pages = {1--5}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/ITC44778.2020.9325265}, doi = {10.1109/ITC44778.2020.9325265}, timestamp = {Mon, 25 Jan 2021 08:44:58 +0100}, biburl = {https://dblp.org/rec/conf/itc/ShpiroWTZL20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc-asia/LaiZTC20, author = {Liyang Lai and Qiting Zhang and Kun{-}Han Hans Tsai and Wu{-}Tung Cheng}, title = {GPU-based Hybrid Parallel Logic Simulation for Scan Patterns}, booktitle = {{IEEE} International Test Conference in Asia, ITC-Asia 2020, Taipei, Taiwan, September 23-25, 2020}, pages = {118--123}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/ITC-Asia51099.2020.00032}, doi = {10.1109/ITC-ASIA51099.2020.00032}, timestamp = {Thu, 22 Oct 2020 12:38:36 +0200}, biburl = {https://dblp.org/rec/conf/itc-asia/LaiZTC20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aspdac/ChernLHHVTC19, author = {Mason Chern and Shih{-}Wei Lee and Shi{-}Yu Huang and Yu Huang and Gaurav Veda and Kun{-}Han Hans Tsai and Wu{-}Tung Cheng}, editor = {Toshiyuki Shibuya}, title = {Improving scan chain diagnostic accuracy using multi-stage artificial neural networks}, booktitle = {Proceedings of the 24th Asia and South Pacific Design Automation Conference, {ASPDAC} 2019, Tokyo, Japan, January 21-24, 2019}, pages = {341--346}, publisher = {{ACM}}, year = {2019}, url = {https://doi.org/10.1145/3287624.3287692}, doi = {10.1145/3287624.3287692}, timestamp = {Thu, 14 Nov 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/aspdac/ChernLHHVTC19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/WangWTCLKP19, author = {Naixing Wang and Chen Wang and Kun{-}Han Tsai and Wu{-}Tung Cheng and Xijiang Lin and Mark Kassab and Irith Pomeranz}, title = {{TEA:} {A} Test Generation Algorithm for Designs with Timing Exceptions}, booktitle = {28th {IEEE} Asian Test Symposium, {ATS} 2019, Kolkata, India, December 10-13, 2019}, pages = {19--24}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/ATS47505.2019.000-6}, doi = {10.1109/ATS47505.2019.000-6}, timestamp = {Wed, 22 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/ats/WangWTCLKP19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc-asia/Tsai19, author = {Kun{-}Han Tsai}, title = {Race and Glitch Handling: {A} Test Perspective}, booktitle = {{IEEE} International Test Conference in Asia, ITC-Asia 2019, Tokyo, Japan, September 3-5, 2019}, pages = {85--90}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/ITC-Asia.2019.00028}, doi = {10.1109/ITC-ASIA.2019.00028}, timestamp = {Tue, 12 Nov 2019 16:51:04 +0100}, biburl = {https://dblp.org/rec/conf/itc-asia/Tsai19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/YangWHTC18, author = {Shaofu Yang and Zhi{-}Yuan Wen and Shi{-}Yu Huang and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {Circuit and Methodology for Testing Small Delay Faults in the Clock Network}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {37}, number = {10}, pages = {2087--2097}, year = {2018}, url = {https://doi.org/10.1109/TCAD.2018.2789779}, doi = {10.1109/TCAD.2018.2789779}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/YangWHTC18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc-asia/Tsai18, author = {Kun{-}Han Tsai}, title = {X-Sources Analysis for Improving the Test Quality}, booktitle = {{IEEE} International Test Conference in Asia, ITC-Asia 2018, Harbin, China, August 15-17, 2018}, pages = {121--126}, publisher = {{IEEE}}, year = {2018}, url = {https://doi.org/10.1109/ITC-Asia.2018.00031}, doi = {10.1109/ITC-ASIA.2018.00031}, timestamp = {Mon, 09 Aug 2021 14:54:04 +0200}, biburl = {https://dblp.org/rec/conf/itc-asia/Tsai18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/TsaiG17, author = {Kun{-}Han Tsai and Srinivasan Gopalakrishnan}, title = {Test Coverage Analysis for Designs with Timing Exceptions}, booktitle = {26th {IEEE} Asian Test Symposium, {ATS} 2017, Taipei City, Taiwan, November 27-30, 2017}, pages = {169--174}, publisher = {{IEEE} Computer Society}, year = {2017}, url = {https://doi.org/10.1109/ATS.2017.41}, doi = {10.1109/ATS.2017.41}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/TsaiG17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/dt/HuangTTC16, author = {Shi{-}Yu Huang and Meng{-}Ting Tsai and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {Delay Characterization and Testing of Arbitrary Multiple-Pin Interconnects}, journal = {{IEEE} Des. Test}, volume = {33}, number = {2}, pages = {9--16}, year = {2016}, url = {https://doi.org/10.1109/MDAT.2015.2455331}, doi = {10.1109/MDAT.2015.2455331}, timestamp = {Fri, 13 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/dt/HuangTTC16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/dt/HuangCTHTC16, author = {Shi{-}Yu Huang and Chih{-}Chieh Cheng and Meng{-}Ting Tsai and Kuan{-}Chen Huang and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {Versatile Transition-Time Monitoring for Interconnects via Distributed {TDC}}, journal = {{IEEE} Des. Test}, volume = {33}, number = {6}, pages = {23--30}, year = {2016}, url = {https://doi.org/10.1109/MDAT.2016.2590979}, doi = {10.1109/MDAT.2016.2590979}, timestamp = {Fri, 13 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/dt/HuangCTHTC16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ets/YangHTC16, author = {Shaofu Yang and Shi{-}Yu Huang and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {Testing of small delay faults in a clock network}, booktitle = {21th {IEEE} European Test Symposium, {ETS} 2016, Amsterdam, Netherlands, May 23-27, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/ETS.2016.7519291}, doi = {10.1109/ETS.2016.7519291}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/ets/YangHTC16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ieeehpcs/HuangHTC16, author = {Shi{-}Yu Huang and Tzu{-}Heng Huang and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {A wide-range clock signal generation scheme for speed grading of a logic core}, booktitle = {International Conference on High Performance Computing {\&} Simulation, {HPCS} 2016, Innsbruck, Austria, July 18-22, 2016}, pages = {125--129}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/HPCSim.2016.7568325}, doi = {10.1109/HPCSIM.2016.7568325}, timestamp = {Wed, 16 Oct 2019 14:14:54 +0200}, biburl = {https://dblp.org/rec/conf/ieeehpcs/HuangHTC16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/ZhengHLWTC16, author = {Chih{-}Chieh Zheng and Shi{-}Yu Huang and Shyue{-}Kung Lu and Ting{-}Chi Wang and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {Online slack-time binning for IO-registered die-to-die interconnects}, booktitle = {2016 {IEEE} International Test Conference, {ITC} 2016, Fort Worth, TX, USA, November 15-17, 2016}, pages = {1--8}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/TEST.2016.7805848}, doi = {10.1109/TEST.2016.7805848}, timestamp = {Wed, 16 Oct 2019 14:14:52 +0200}, biburl = {https://dblp.org/rec/conf/itc/ZhengHLWTC16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/HuangTZTC15, author = {Shi{-}Yu Huang and Meng{-}Ting Tsai and Zeng{-}Fu Zeng and Kun{-}Han Hans Tsai and Wu{-}Tung Cheng}, title = {General Timing-Aware Built-In Self-Repair for Die-to-Die Interconnects}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {34}, number = {11}, pages = {1836--1846}, year = {2015}, url = {https://doi.org/10.1109/TCAD.2015.2432131}, doi = {10.1109/TCAD.2015.2432131}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/HuangTZTC15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/HuangTLZTC15, author = {Shi{-}Yu Huang and Meng{-}Ting Tsai and Hua{-}Xuan Li and Zeng{-}Fu Zeng and Kun{-}Han Hans Tsai and Wu{-}Tung Cheng}, title = {Nonintrusive On-Line Transition-Time Binning and Timing Failure Threat Detection for Die-to-Die Interconnects}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {34}, number = {12}, pages = {2039--2048}, year = {2015}, url = {https://doi.org/10.1109/TCAD.2015.2440322}, doi = {10.1109/TCAD.2015.2440322}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/HuangTLZTC15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/HuangTTC15, author = {Shi{-}Yu Huang and Meng{-}Ting Tsai and Kun{-}Han Hans Tsai and Wu{-}Tung Cheng}, editor = {Wolfgang Nebel and David Atienza}, title = {Feedback-bus oscillation ring: a general architecture for delay characterization and test of interconnects}, booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March 9-13, 2015}, pages = {924--927}, publisher = {{ACM}}, year = {2015}, url = {http://dl.acm.org/citation.cfm?id=2757027}, timestamp = {Mon, 09 Aug 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/date/HuangTTC15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/TsaiHTC15, author = {Meng{-}Ting Tsai and Shi{-}Yu Huang and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {Monitoring the delay of long interconnects via distributed {TDC}}, booktitle = {2015 {IEEE} International Test Conference, {ITC} 2015, Anaheim, CA, USA, October 6-8, 2015}, pages = {1--9}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/TEST.2015.7342406}, doi = {10.1109/TEST.2015.7342406}, timestamp = {Wed, 16 Oct 2019 14:14:52 +0200}, biburl = {https://dblp.org/rec/conf/itc/TsaiHTC15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi-dat/LinTHC15, author = {Guo{-}Yu Lin and Kun{-}Han Tsai and Jiun{-}Lang Huang and Wu{-}Tung Cheng}, title = {A test-application-count based learning technique for test time reduction}, booktitle = {{VLSI} Design, Automation and Test, {VLSI-DAT} 2015, Hsinchu, Taiwan, April 27-29, 2015}, pages = {1--4}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/VLSI-DAT.2015.7114507}, doi = {10.1109/VLSI-DAT.2015.7114507}, timestamp = {Wed, 16 Oct 2019 14:14:54 +0200}, biburl = {https://dblp.org/rec/conf/vlsi-dat/LinTHC15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi-dat/TsaiR15, author = {Kun{-}Han Tsai and Janusz Rajski}, title = {Clock-domain-aware test for improving pattern compression}, booktitle = {{VLSI} Design, Automation and Test, {VLSI-DAT} 2015, Hsinchu, Taiwan, April 27-29, 2015}, pages = {1--4}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/VLSI-DAT.2015.7114506}, doi = {10.1109/VLSI-DAT.2015.7114506}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi-dat/TsaiR15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/HuangHTC14, author = {Li{-}Ren Huang and Shi{-}Yu Huang and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {Parametric Fault Testing and Performance Characterization of Post-Bond Interposer Wires in 2.5-D ICs}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {33}, number = {3}, pages = {476--488}, year = {2014}, url = {https://doi.org/10.1109/TCAD.2013.2290589}, doi = {10.1109/TCAD.2013.2290589}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/HuangHTC14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/HuangLTC14, author = {Shi{-}Yu Huang and Jeo{-}Yen Lee and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {Pulse-Vanishing Test for Interposers Wires in 2.5-D {IC}}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {33}, number = {8}, pages = {1258--1268}, year = {2014}, url = {https://doi.org/10.1109/TCAD.2014.2316093}, doi = {10.1109/TCAD.2014.2316093}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/HuangLTC14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/Tsai14, author = {Kun{-}Han Tsai}, title = {Testability-Driven Fault Sampling for Deterministic Test Coverage Estimation of Large Designs}, booktitle = {23rd {IEEE} Asian Test Symposium, {ATS} 2014, Hangzhou, China, November 16-19, 2014}, pages = {119--124}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/ATS.2014.32}, doi = {10.1109/ATS.2014.32}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/Tsai14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/HuangLZTC14, author = {Shi{-}Yu Huang and Hua{-}Xuan Li and Zeng{-}Fu Zeng and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {On-Line Transition-Time Monitoring for Die-to-Die Interconnects in 3D ICs}, booktitle = {23rd {IEEE} Asian Test Symposium, {ATS} 2014, Hangzhou, China, November 16-19, 2014}, pages = {162--167}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/ATS.2014.39}, doi = {10.1109/ATS.2014.39}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/HuangLZTC14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ets/HuangZTC14, author = {Shi{-}Yu Huang and Zeng{-}Fu Zeng and Kun{-}Han Tsai and Wu{-}Tung Cheng}, editor = {Giorgio Di Natale}, title = {On-the-fly timing-aware built-in self-repair for high-speed interposer wires in 2.5-D ICs}, booktitle = {19th {IEEE} European Test Symposium, {ETS} 2014, Paderborn, Germany, May 26-30, 2014}, pages = {1--2}, publisher = {{IEEE}}, year = {2014}, url = {https://doi.org/10.1109/ETS.2014.6847841}, doi = {10.1109/ETS.2014.6847841}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/ets/HuangZTC14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/LinHTCSCK13, author = {Yu{-}Hsiang Lin and Shi{-}Yu Huang and Kun{-}Han Tsai and Wu{-}Tung Cheng and Stephen K. Sunter and Yung{-}Fa Chou and Ding{-}Ming Kwai}, title = {Parametric Delay Test of Post-Bond Through-Silicon Vias in 3-D ICs via Variable Output Thresholding Analysis}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {32}, number = {5}, pages = {737--747}, year = {2013}, url = {https://doi.org/10.1109/TCAD.2012.2236837}, doi = {10.1109/TCAD.2012.2236837}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/LinHTCSCK13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/HuangLHTC13, author = {Shi{-}Yu Huang and Yu{-}Hsiang Lin and Li{-}Ren Huang and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {Programmable Leakage Test and Binning for TSVs With Self-Timed Timing Control}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {32}, number = {8}, pages = {1265--1273}, year = {2013}, url = {https://doi.org/10.1109/TCAD.2013.2252056}, doi = {10.1109/TCAD.2013.2252056}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/HuangLHTC13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/HuangHSTC13, author = {Li{-}Ren Huang and Shi{-}Yu Huang and Stephen K. Sunter and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {Oscillation-Based Prebond {TSV} Test}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {32}, number = {9}, pages = {1440--1444}, year = {2013}, url = {https://doi.org/10.1109/TCAD.2013.2259626}, doi = {10.1109/TCAD.2013.2259626}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/HuangHSTC13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/TsaiL13, author = {Kun{-}Han Tsai and Xijiang Lin}, title = {Multicycle-aware At-speed Test Methodology}, booktitle = {22nd Asian Test Symposium, {ATS} 2013, Yilan County, Taiwan, November 18-21, 2013}, pages = {49}, publisher = {{IEEE} Computer Society}, year = {2013}, url = {https://doi.org/10.1109/ATS.2013.66}, doi = {10.1109/ATS.2013.66}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/TsaiL13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/HuangHTCS13, author = {Li{-}Ren Huang and Shi{-}Yu Huang and Kun{-}Han Tsai and Wu{-}Tung Cheng and Stephen K. Sunter}, title = {Mid-bond Interposer Wire Test}, booktitle = {22nd Asian Test Symposium, {ATS} 2013, Yilan County, Taiwan, November 18-21, 2013}, pages = {153--158}, publisher = {{IEEE} Computer Society}, year = {2013}, url = {https://doi.org/10.1109/ATS.2013.37}, doi = {10.1109/ATS.2013.37}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/HuangHTCS13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iolts/HuangLTC13, author = {Shi{-}Yu Huang and Jeo{-}Yen Lee and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {At-speed {BIST} for interposer wires supporting on-the-spot diagnosis}, booktitle = {2013 {IEEE} 19th International On-Line Testing Symposium (IOLTS), Chania, Crete, Greece, July 8-10, 2013}, pages = {67--72}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/IOLTS.2013.6604053}, doi = {10.1109/IOLTS.2013.6604053}, timestamp = {Wed, 16 Oct 2019 14:14:52 +0200}, biburl = {https://dblp.org/rec/conf/iolts/HuangLTC13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/HuangHTC13, author = {Shi{-}Yu Huang and Li{-}Ren Huang and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {Delay testing and characterization of post-bond interposer wires in 2.5-D ICs}, booktitle = {2013 {IEEE} International Test Conference, {ITC} 2013, Anaheim, CA, USA, September 6-13, 2013}, pages = {1--8}, publisher = {{IEEE} Computer Society}, year = {2013}, url = {https://doi.org/10.1109/TEST.2013.6651906}, doi = {10.1109/TEST.2013.6651906}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/HuangHTC13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/TsaiS13, author = {Kun{-}Han Tsai and Shuo Sheng}, title = {Design rule check on the clock gating logic for testability and beyond}, booktitle = {2013 {IEEE} International Test Conference, {ITC} 2013, Anaheim, CA, USA, September 6-13, 2013}, pages = {1--8}, publisher = {{IEEE} Computer Society}, year = {2013}, url = {https://doi.org/10.1109/TEST.2013.6651930}, doi = {10.1109/TEST.2013.6651930}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/TsaiS13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi-dat/HuangTLGSC13, author = {Jiun{-}Lang Huang and Kun{-}Han Tsai and Yu{-}Ping Liu and Ruifeng Guo and Manish Sharma and Wu{-}Tung Cheng}, title = {Improve speed path identification with suspect path expressions}, booktitle = {2013 International Symposium on {VLSI} Design, Automation, and Test, {VLSI-DAT} 2013, Hsinchu, Taiwan, April 22-24, 2013}, pages = {1--4}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/VLDI-DAT.2013.6533852}, doi = {10.1109/VLDI-DAT.2013.6533852}, timestamp = {Wed, 16 Oct 2019 14:14:54 +0200}, biburl = {https://dblp.org/rec/conf/vlsi-dat/HuangTLGSC13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/LinHTC12, author = {Yu{-}Hsiang Lin and Shi{-}Yu Huang and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {Programmable Leakage Test and Binning for TSVs}, booktitle = {21st {IEEE} Asian Test Symposium, {ATS} 2012, Niigata, Japan, November 19-22, 2012}, pages = {43--48}, publisher = {{IEEE} Computer Society}, year = {2012}, url = {https://doi.org/10.1109/ATS.2012.13}, doi = {10.1109/ATS.2012.13}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/LinHTC12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/HuangLTCSCK12, author = {Shi{-}Yu Huang and Yu{-}Hsiang Lin and Kun{-}Han Tsai and Wu{-}Tung Cheng and Stephen K. Sunter and Yung{-}Fa Chou and Ding{-}Ming Kwai}, editor = {Patrick Groeneveld and Donatella Sciuto and Soha Hassoun}, title = {Small delay testing for TSVs in 3-D ICs}, booktitle = {The 49th Annual Design Automation Conference 2012, {DAC} '12, San Francisco, CA, USA, June 3-7, 2012}, pages = {1031--1036}, publisher = {{ACM}}, year = {2012}, url = {https://doi.org/10.1145/2228360.2228546}, doi = {10.1145/2228360.2228546}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/HuangLTCSCK12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/LinHTCS12, author = {Yu{-}Hsiang Lin and Shi{-}Yu Huang and Kun{-}Han Tsai and Wu{-}Tung Cheng and Stephen K. Sunter}, title = {A unified method for parametric fault characterization of post-bond TSVs}, booktitle = {2012 {IEEE} International Test Conference, {ITC} 2012, Anaheim, CA, USA, November 5-8, 2012}, pages = {1--10}, publisher = {{IEEE} Computer Society}, year = {2012}, url = {https://doi.org/10.1109/TEST.2012.6401566}, doi = {10.1109/TEST.2012.6401566}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/LinHTCS12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aspdac/WuPWHTC10, author = {Meng{-}Fan Wu and Hsin{-}Cheih Pan and Teng{-}Han Wang and Jiun{-}Lang Huang and Kun{-}Han Tsai and Wu{-}Tung Cheng}, title = {Improved weight assignment for logic switching activity during at-speed test pattern generation}, booktitle = {Proceedings of the 15th Asia South Pacific Design Automation Conference, {ASP-DAC} 2010, Taipei, Taiwan, January 18-21, 2010}, pages = {493--498}, publisher = {{IEEE}}, year = {2010}, url = {https://doi.org/10.1109/ASPDAC.2010.5419834}, doi = {10.1109/ASPDAC.2010.5419834}, timestamp = {Mon, 15 Jan 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/aspdac/WuPWHTC10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ets/ZengGCMWTA10, author = {Jing Zeng and Ruifeng Guo and Wu{-}Tung Cheng and Michael Mateja and Jing Wang and Kun{-}Han Tsai and Ken Amstutz}, title = {Scan based speed-path debug for a microprocessor}, booktitle = {15th European Test Symposium, {ETS} 2010, Prague, Czech Republic, May 24-28, 2010}, pages = {207--212}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/ETSYM.2010.5512756}, doi = {10.1109/ETSYM.2010.5512756}, timestamp = {Tue, 28 Apr 2020 11:43:44 +0200}, biburl = {https://dblp.org/rec/conf/ets/ZengGCMWTA10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icc/LiWT10, author = {Chih{-}Peng Li and Sen{-}Hung Wang and Kun{-}Han Tsai}, title = {A Low Complexity Transmitter Architecture and Its Application to {PAPR} Reduction in {SFBC} {MIMO-OFDM} Systems}, booktitle = {Proceedings of {IEEE} International Conference on Communications, {ICC} 2010, Cape Town, South Africa, 23-27 May 2010}, pages = {1--5}, publisher = {{IEEE}}, year = {2010}, url = {https://doi.org/10.1109/ICC.2010.5502740}, doi = {10.1109/ICC.2010.5502740}, timestamp = {Wed, 16 Oct 2019 14:14:50 +0200}, biburl = {https://dblp.org/rec/conf/icc/LiWT10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccad/WuTCPHK10, author = {Meng{-}Fan Wu and Kun{-}Han Tsai and Wu{-}Tung Cheng and Hsin{-}Cheih Pan and Jiun{-}Lang Huang and Augusli Kifli}, editor = {Louis Scheffer and Joel R. Phillips and Alan J. Hu}, title = {A scalable quantitative measure of IR-drop effects for scan pattern generation}, booktitle = {2010 International Conference on Computer-Aided Design, {ICCAD} 2010, San Jose, CA, USA, November 7-11, 2010}, pages = {162--167}, publisher = {{IEEE}}, year = {2010}, url = {https://doi.org/10.1109/ICCAD.2010.5654130}, doi = {10.1109/ICCAD.2010.5654130}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccad/WuTCPHK10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/TsaiHCTK10, author = {Kun{-}Han Tsai and Yu Huang and Wu{-}Tung Cheng and Ting{-}Pu Tai and Augusli Kifli}, editor = {Ron Press and Erik H. Volkerink}, title = {Test cycle power optimization for scan-based designs}, booktitle = {2011 {IEEE} International Test Conference, {ITC} 2010, Austin, TX, USA, November 2-4, 2010}, pages = {134--143}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/TEST.2010.5699213}, doi = {10.1109/TEST.2010.5699213}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/TsaiHCTK10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/MehtaMTR09, author = {Vishal J. Mehta and Malgorzata Marek{-}Sadowska and Kun{-}Han Tsai and Janusz Rajski}, title = {Timing-Aware Multiple-Delay-Fault Diagnosis}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {28}, number = {2}, pages = {245--258}, year = {2009}, url = {https://doi.org/10.1109/TCAD.2008.2009164}, doi = {10.1109/TCAD.2008.2009164}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/MehtaMTR09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/TsaiGC09, author = {Kun{-}Han Tsai and Ruifeng Guo and Wu{-}Tung Cheng}, title = {At-Speed Scan Test Method for the Timing Optimization and Calibration}, booktitle = {Proceedings of the Eighteentgh Asian Test Symposium, {ATS} 2009, 23-26 November 2009, Taichung, Taiwan}, pages = {430--433}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/ATS.2009.29}, doi = {10.1109/ATS.2009.29}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/TsaiGC09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ets/GuoCT09, author = {Ruifeng Guo and Wu{-}Tung Cheng and Kun{-}Han Tsai}, title = {Speed-Path Debug Using At-Speed Scan Test Patterns}, booktitle = {14th {IEEE} European Test Symposium, {ETS} 2009, Sevilla, Spain, May 25-29, 2009}, pages = {11--16}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/ETS.2009.12}, doi = {10.1109/ETS.2009.12}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ets/GuoCT09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/MehtaMTR08, author = {Vishal J. Mehta and Malgorzata Marek{-}Sadowska and Kun{-}Han Tsai and Janusz Rajski}, title = {Improving the Resolution of Single-Delay-Fault Diagnosis}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {27}, number = {5}, pages = {932--945}, year = {2008}, url = {https://doi.org/10.1109/TCAD.2008.917588}, doi = {10.1109/TCAD.2008.917588}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/MehtaMTR08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/ChengBGTKMNFO08, author = {Wu{-}Tung Cheng and Brady Benware and Ruifeng Guo and Kun{-}Han Tsai and Takeo Kobayashi and Kazuyuki Maruo and Michinobu Nakao and Yoshiaki Fukui and Hideyuki Otake}, title = {Enhancing Transition Fault Model for Delay Defect Diagnosis}, booktitle = {17th {IEEE} Asian Test Symposium, {ATS} 2008, Sapporo, Japan, November 24-27, 2008}, pages = {179--184}, publisher = {{IEEE} Computer Society}, year = {2008}, url = {https://doi.org/10.1109/ATS.2008.44}, doi = {10.1109/ATS.2008.44}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/ChengBGTKMNFO08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/TsaiGC08, author = {Kun{-}Han Tsai and Ruifeng Guo and Wu{-}Tung Cheng}, title = {A Robust Automated Scan Pattern Mismatch Debugger}, booktitle = {17th {IEEE} Asian Test Symposium, {ATS} 2008, Sapporo, Japan, November 24-27, 2008}, pages = {309--314}, publisher = {{IEEE} Computer Society}, year = {2008}, url = {https://doi.org/10.1109/ATS.2008.45}, doi = {10.1109/ATS.2008.45}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/TsaiGC08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/MehtaMTR08, author = {Vishal J. Mehta and Malgorzata Marek{-}Sadowska and Kun{-}Han Tsai and Janusz Rajski}, title = {Timing-Aware Multiple-Delay-Fault Diagnosis}, booktitle = {9th International Symposium on Quality of Electronic Design {(ISQED} 2008), 17-19 March 2008, San Jose, CA, {USA}}, pages = {246--253}, publisher = {{IEEE} Computer Society}, year = {2008}, url = {https://doi.org/10.1109/ISQED.2008.4479734}, doi = {10.1109/ISQED.2008.4479734}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/MehtaMTR08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/GoswamiTKR07, author = {Dhiraj Goswami and Kun{-}Han Tsai and Mark Kassab and Janusz Rajski}, title = {Test Generation in the Presence of Timing Exceptions and Constraints}, booktitle = {Proceedings of the 44th Design Automation Conference, {DAC} 2007, San Diego, CA, USA, June 4-8, 2007}, pages = {688--693}, publisher = {{IEEE}}, year = {2007}, url = {https://doi.org/10.1145/1278480.1278653}, doi = {10.1145/1278480.1278653}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/GoswamiTKR07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/McLaurinSTK07, author = {Teresa L. McLaurin and Rich Slobodnik and Kun{-}Han Tsai and Ana Keim}, editor = {Jill Sibert and Janusz Rajski}, title = {Enhanced testing of clock faults}, booktitle = {2007 {IEEE} International Test Conference, {ITC} 2007, Santa Clara, California, USA, October 21-26, 2007}, pages = {1--9}, publisher = {{IEEE} Computer Society}, year = {2007}, url = {https://doi.org/10.1109/TEST.2007.4437651}, doi = {10.1109/TEST.2007.4437651}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/McLaurinSTK07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/WangMTR06, author = {Zhiyuan Wang and Malgorzata Marek{-}Sadowska and Kun{-}Han Tsai and Janusz Rajski}, title = {Analysis and methodology for multiple-fault diagnosis}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {25}, number = {3}, pages = {558--575}, year = {2006}, url = {https://doi.org/10.1109/TCAD.2005.854624}, doi = {10.1109/TCAD.2005.854624}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/WangMTR06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/LinTWKRKKSHA06, author = {Xijiang Lin and Kun{-}Han Tsai and Chen Wang and Mark Kassab and Janusz Rajski and Takeo Kobayashi and Randy Klingenberg and Yasuo Sato and Shuji Hamada and Takashi Aikyo}, title = {Timing-Aware {ATPG} for High Quality At-speed Testing of Small Delay Defects}, booktitle = {15th Asian Test Symposium, {ATS} 2006, Fukuoka, Japan, November 20-23, 2006}, pages = {139--146}, publisher = {{IEEE}}, year = {2006}, url = {https://doi.org/10.1109/ATS.2006.261012}, doi = {10.1109/ATS.2006.261012}, timestamp = {Mon, 07 Nov 2022 17:39:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/LinTWKRKKSHA06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/GoswamiTKKRSWSA06, author = {Dhiraj Goswami and Kun{-}Han Tsai and Mark Kassab and Takeo Kobayashi and Janusz Rajski and Bruce Swanson and Darryl Walters and Yasuo Sato and Toshiharu Asaka and Takashi Aikyo}, title = {At-Speed Testing with Timing Exceptions and Constraints-Case Studies}, booktitle = {15th Asian Test Symposium, {ATS} 2006, Fukuoka, Japan, November 20-23, 2006}, pages = {153--162}, publisher = {{IEEE}}, year = {2006}, url = {https://doi.org/10.1109/ATS.2006.261014}, doi = {10.1109/ATS.2006.261014}, timestamp = {Mon, 07 Nov 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/GoswamiTKKRSWSA06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/MehtaMWTR06, author = {Vishal J. Mehta and Malgorzata Marek{-}Sadowska and Zhiyuan Wang and Kun{-}Han Tsai and Janusz Rajski}, title = {Delay Fault Diagnosis for Non-Robust Test}, booktitle = {7th International Symposium on Quality of Electronic Design {(ISQED} 2006), 27-29 March 2006, San Jose, CA, {USA}}, pages = {463--472}, publisher = {{IEEE} Computer Society}, year = {2006}, url = {https://doi.org/10.1109/ISQED.2006.45}, doi = {10.1109/ISQED.2006.45}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/MehtaMWTR06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/MehtaMTR06, author = {Vishal J. Mehta and Malgorzata Marek{-}Sadowska and Kun{-}Han Tsai and Janusz Rajski}, editor = {Scott Davidson and Anne Gattiker}, title = {Timing Defect Diagnosis in Presence of Crosstalk for Nanometer Technology}, booktitle = {2006 {IEEE} International Test Conference, {ITC} 2006, Santa Clara, CA, USA, October 22-27, 2006}, pages = {1--10}, publisher = {{IEEE} Computer Society}, year = {2006}, url = {https://doi.org/10.1109/TEST.2006.297626}, doi = {10.1109/TEST.2006.297626}, timestamp = {Tue, 12 Dec 2023 09:46:27 +0100}, biburl = {https://dblp.org/rec/conf/itc/MehtaMTR06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/TendolkarBSPGKCBTTA06, author = {Nandu Tendolkar and Dawit Belete and Bill Schwarz and Bob Podnar and Akshay Gupta and Steve Karako and Wu{-}Tung Cheng and Alex Babin and Kun{-}Han Tsai and Nagesh Tamarapalli and Greg Aldrich}, editor = {Scott Davidson and Anne Gattiker}, title = {Improving Transition Fault Test Pattern Quality through At-Speed Diagnosis}, booktitle = {2006 {IEEE} International Test Conference, {ITC} 2006, Santa Clara, CA, USA, October 22-27, 2006}, pages = {1--9}, publisher = {{IEEE} Computer Society}, year = {2006}, url = {https://doi.org/10.1109/TEST.2006.297623}, doi = {10.1109/TEST.2006.297623}, timestamp = {Wed, 24 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/itc/TendolkarBSPGKCBTTA06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vts/VorisekSTG06, author = {Vlado Vorisek and Bruce Swanson and Kun{-}Han Tsai and Dhiraj Goswami}, title = {Improved Handling of False and Multicycle Paths in {ATPG}}, booktitle = {24th {IEEE} {VLSI} Test Symposium {(VTS} 2006), 30 April - 4 May 2006, Berkeley, California, {USA}}, pages = {160--165}, publisher = {{IEEE} Computer Society}, year = {2006}, url = {https://doi.org/10.1109/VTS.2006.38}, doi = {10.1109/VTS.2006.38}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vts/VorisekSTG06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/WangMTR05, author = {Zhiyuan Wang and Malgorzata Marek{-}Sadowska and Kun{-}Han Tsai and Janusz Rajski}, title = {Delay-fault diagnosis using timing information}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {24}, number = {9}, pages = {1315--1325}, year = {2005}, url = {https://doi.org/10.1109/TCAD.2005.852062}, doi = {10.1109/TCAD.2005.852062}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/WangMTR05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/GilesITT05, author = {Grady Giles and Joel Irby and Daniela Toneva and Kun{-}Han Tsai}, title = {Built-in constraint resolution}, booktitle = {Proceedings 2005 {IEEE} International Test Conference, {ITC} 2005, Austin, TX, USA, November 8-10, 2005}, pages = {10}, publisher = {{IEEE} Computer Society}, year = {2005}, url = {https://doi.org/10.1109/TEST.2005.1584032}, doi = {10.1109/TEST.2005.1584032}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/GilesITT05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/LeiningerMCTYT05, author = {Andreas Leininger and Peter Muhmenthaler and Wu{-}Tung Cheng and Nagesh Tamarapalli and Wu Yang and Kun{-}Han Hans Tsai}, title = {Compression mode diagnosis enables high volume monitoring diagnosis flow}, booktitle = {Proceedings 2005 {IEEE} International Test Conference, {ITC} 2005, Austin, TX, USA, November 8-10, 2005}, pages = {10}, publisher = {{IEEE} Computer Society}, year = {2005}, url = {https://doi.org/10.1109/TEST.2005.1583972}, doi = {10.1109/TEST.2005.1583972}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/LeiningerMCTYT05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/ChengTHTR04, author = {Wu{-}Tung Cheng and Kun{-}Han Tsai and Yu Huang and Nagesh Tamarapalli and Janusz Rajski}, title = {Compactor Independent Direct Diagnosis}, booktitle = {13th Asian Test Symposium {(ATS} 2004), 15-17 November 2004, Kenting, Taiwan}, pages = {204--209}, publisher = {{IEEE} Computer Society}, year = {2004}, url = {https://doi.org/10.1109/ATS.2004.32}, doi = {10.1109/ATS.2004.32}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/ChengTHTR04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccd/WangMTR04, author = {Zhiyuan Wang and Malgorzata Marek{-}Sadowska and Kun{-}Han Tsai and Janusz Rajski}, title = {Diagnosis of Hold Time Defects}, booktitle = {22nd {IEEE} International Conference on Computer Design: {VLSI} in Computers {\&} Processors {(ICCD} 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings}, pages = {192--199}, publisher = {{IEEE} Computer Society}, year = {2004}, url = {https://doi.org/10.1109/ICCD.2004.1347921}, doi = {10.1109/ICCD.2004.1347921}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccd/WangMTR04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/WangMTR04, author = {Zhiyuan Wang and Malgorzata Marek{-}Sadowska and Kun{-}Han Tsai and Janusz Rajski}, title = {Delay Fault Diagnosis Using Timing Information}, booktitle = {5th International Symposium on Quality of Electronic Design {(ISQED} 2004), 22-24 March 2004, San Jose, CA, {USA}}, pages = {485--490}, publisher = {{IEEE} Computer Society}, year = {2004}, url = {https://doi.org/10.1109/ISQED.2004.1283720}, doi = {10.1109/ISQED.2004.1283720}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/WangMTR04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/GuWLETTKR04, author = {Xinli Gu and Cyndee Wang and Abby Lee and Bill Eklow and Kun{-}Han Tsai and Jan Arild Tofte and Mark Kassab and Janusz Rajski}, title = {Realizing High Test Quality Goals with Smart Test Resource Usage}, booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October 26-28, 2004, Charlotte, NC, {USA}}, pages = {525--533}, publisher = {{IEEE} Computer Society}, year = {2004}, url = {https://doi.org/10.1109/TEST.2004.1386989}, doi = {10.1109/TEST.2004.1386989}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/GuWLETTKR04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccd/WangMTR03, author = {Zhiyuan Wang and Malgorzata Marek{-}Sadowska and Kun{-}Han Tsai and Janusz Rajski}, title = {Multiple Fault Diagnosis Using n-Detection Tests}, booktitle = {21st International Conference on Computer Design {(ICCD} 2003),VLSI in Computers and Processors, 13-15 October 2003, San Jose, CA, USA, Proceedings}, pages = {198}, publisher = {{IEEE} Computer Society}, year = {2003}, url = {https://doi.org/10.1109/ICCD.2003.1240895}, doi = {10.1109/ICCD.2003.1240895}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccd/WangMTR03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/WangTMR03, author = {Zhiyuan Wang and Kun{-}Han Tsai and Malgorzata Marek{-}Sadowska and Janusz Rajski}, title = {An Efficient and Effective Methodology on the Multiple Fault Diagnosis}, booktitle = {Proceedings 2003 International Test Conference {(ITC} 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, {USA}}, pages = {329--338}, publisher = {{IEEE} Computer Society}, year = {2003}, url = {https://doi.org/10.1109/TEST.2003.1270855}, doi = {10.1109/TEST.2003.1270855}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/WangTMR03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/BenwareSRMKTTR03, author = {Brady Benware and Chris Schuermyer and Sreenevasan Ranganathan and Robert Madge and Prabhu Krishnamurthy and Nagesh Tamarapalli and Kun{-}Han Tsai and Janusz Rajski}, title = {Impact of Multiple-Detect Test Patterns on Product Quality}, booktitle = {Proceedings 2003 International Test Conference {(ITC} 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, {USA}}, pages = {1031--1040}, publisher = {{IEEE} Computer Society}, year = {2003}, url = {https://doi.org/10.1109/TEST.2003.1271091}, doi = {10.1109/TEST.2003.1271091}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/BenwareSRMKTTR03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/RajkiTKMTTHTMEQ02, author = {Janusz Rajski and Jerzy Tyszer and Mark Kassab and Nilanjan Mukherjee and Rob Thompson and Kun{-}Han Tsai and Andre Hertwig and Nagesh Tamarapalli and Grzegorz Mrugalski and Geir Eide and Jun Qian}, title = {Embedded Deterministic Test for Low-Cost Manufacturing Test}, booktitle = {Proceedings {IEEE} International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002}, pages = {301--310}, publisher = {{IEEE} Computer Society}, year = {2002}, url = {https://doi.org/10.1109/TEST.2002.1041773}, doi = {10.1109/TEST.2002.1041773}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/RajkiTKMTTHTMEQ02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/TsaiRM00, author = {Kun{-}Han Tsai and Janusz Rajski and Malgorzata Marek{-}Sadowska}, title = {Star test: the theory and its applications}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {19}, number = {9}, pages = {1052--1064}, year = {2000}, url = {https://doi.org/10.1109/43.863645}, doi = {10.1109/43.863645}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/TsaiRM00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/TsaiHRM97, author = {Kun{-}Han Tsai and Sybille Hellebrand and Janusz Rajski and Malgorzata Marek{-}Sadowska}, editor = {Ellen J. Yoffa and Giovanni De Micheli and Jan M. Rabaey}, title = {{STARBIST:} Scan Autocorrelated Random Pattern Generation}, booktitle = {Proceedings of the 34st Conference on Design Automation, Anaheim, California, USA, Anaheim Convention Center, June 9-13, 1997}, pages = {472--477}, publisher = {{ACM} Press}, year = {1997}, url = {https://doi.org/10.1145/266021.266203}, doi = {10.1145/266021.266203}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/TsaiHRM97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/TsaiMR97, author = {Kun{-}Han Tsai and Malgorzata Marek{-}Sadowska and Janusz Rajski}, title = {Scan-Encoded Test Pattern Generation for {BIST}}, booktitle = {Proceedings {IEEE} International Test Conference 1997, Washington, DC, USA, November 3-5, 1997}, pages = {548--556}, publisher = {{IEEE} Computer Society}, year = {1997}, url = {https://doi.org/10.1109/TEST.1997.639663}, doi = {10.1109/TEST.1997.639663}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/TsaiMR97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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