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BibTeX records: Michael J. Wirthlin
@article{DBLP:journals/tcasI/AlacchiGTGWG23, author = {Aur{\'{e}}lien Alacchi and Edouard Giacomin and Scott Temple and Roman Gauchi and Michael J. Wirthlin and Pierre{-}Emmanuel Gaillardon}, title = {Low Latency {SEU} Detection in {FPGA} {CRAM} With In-Memory {ECC} Checking}, journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.}, volume = {70}, number = {5}, pages = {2028--2036}, year = {2023}, url = {https://doi.org/10.1109/TCSI.2023.3243644}, doi = {10.1109/TCSI.2023.3243644}, timestamp = {Wed, 17 May 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcasI/AlacchiGTGWG23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/WilsonBCSW23, author = {Andrew Elbert Wilson and Nathan Baker and Ethan Campbell and Jackson Sahleen and Michael J. Wirthlin}, editor = {Paolo Ienne and Zhiru Zhang}, title = {Post-Radiation Fault Analysis of a High Reliability {FPGA} Linux SoC}, booktitle = {Proceedings of the 2023 {ACM/SIGDA} International Symposium on Field Programmable Gate Arrays, {FPGA} 2023, Monterey, CA, USA, February 12-14, 2023}, pages = {123--133}, publisher = {{ACM}}, year = {2023}, url = {https://doi.org/10.1145/3543622.3573191}, doi = {10.1145/3543622.3573191}, timestamp = {Sat, 25 Feb 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fpga/WilsonBCSW23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/trets/KellerW22, author = {Andrew M. Keller and Michael J. Wirthlin}, title = {The Impact of Terrestrial Radiation on FPGAs in Data Centers}, journal = {{ACM} Trans. Reconfigurable Technol. Syst.}, volume = {15}, number = {2}, pages = {12:1--12:21}, year = {2022}, url = {https://doi.org/10.1145/3457198}, doi = {10.1145/3457198}, timestamp = {Fri, 01 Apr 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/trets/KellerW22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/irps/KellerAWWFC20, author = {Andrew M. Keller and Jared Anderson and Michael J. Wirthlin and Shi{-}Jie Wen and Rita Fung and Conner Chambers}, title = {Using Partial Duplication With Compare to Detect Radiation-Induced Failure in a Commercial FPGA-Based Networking System}, booktitle = {2020 {IEEE} International Reliability Physics Symposium, {IRPS} 2020, Dallas, TX, USA, April 28 - May 30, 2020}, pages = {1--6}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/IRPS45951.2020.9128839}, doi = {10.1109/IRPS45951.2020.9128839}, timestamp = {Wed, 16 Mar 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/irps/KellerAWWFC20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/scipy/SkousonKW20, author = {Dallin Skouson and Andrew M. Keller and Michael J. Wirthlin}, editor = {Meghann Agarwal and Chris Calloway and Dillon Niederhut and David Shupe}, title = {Netlist Analysis and Transformations Using SpyDrNet}, booktitle = {Proceedings of the 19th Python in Science Conference 2020 (SciPy 2020), Virtual Conference, July 6 - July 12, 2020}, pages = {40--47}, publisher = {scipy.org}, year = {2020}, url = {https://doi.org/10.25080/Majora-342d178e-006}, doi = {10.25080/MAJORA-342D178E-006}, timestamp = {Sun, 12 Feb 2023 18:48:24 +0100}, biburl = {https://dblp.org/rec/conf/scipy/SkousonKW20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/GlickGNW19, author = {Dallon Glick and Jesse Grigg and Brent E. Nelson and Michael J. Wirthlin}, title = {Maverick: {A} Stand-Alone {CAD} Flow for Partially Reconfigurable {FPGA} Modules}, booktitle = {27th {IEEE} Annual International Symposium on Field-Programmable Custom Computing Machines, {FCCM} 2019, San Diego, CA, USA, April 28 - May 1, 2019}, pages = {9--16}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/FCCM.2019.00012}, doi = {10.1109/FCCM.2019.00012}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/fccm/GlickGNW19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/KellerW19, author = {Andrew M. Keller and Michael J. Wirthlin}, editor = {Kia Bazargan and Stephen Neuendorffer}, title = {Impact of Soft Errors on Large-Scale {FPGA} Cloud Computing}, booktitle = {Proceedings of the 2019 {ACM/SIGDA} International Symposium on Field-Programmable Gate Arrays, {FPGA} 2019, Seaside, CA, USA, February 24-26, 2019}, pages = {272--281}, publisher = {{ACM}}, year = {2019}, url = {https://doi.org/10.1145/3289602.3293911}, doi = {10.1145/3289602.3293911}, timestamp = {Tue, 05 Mar 2019 07:04:43 +0100}, biburl = {https://dblp.org/rec/conf/fpga/KellerW19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/GlickGNW19, author = {Dallon Glick and Jesse Grigg and Brent E. Nelson and Michael J. Wirthlin}, editor = {Kia Bazargan and Stephen Neuendorffer}, title = {Maverick: {A} Stand-alone {CAD} Flow for Xilinx 7-Series FPGAs}, booktitle = {Proceedings of the 2019 {ACM/SIGDA} International Symposium on Field-Programmable Gate Arrays, {FPGA} 2019, Seaside, CA, USA, February 24-26, 2019}, pages = {306--307}, publisher = {{ACM}}, year = {2019}, url = {https://doi.org/10.1145/3289602.3293997}, doi = {10.1145/3289602.3293997}, timestamp = {Wed, 06 Mar 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fpga/GlickGNW19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/reconfig/ThurlowRW19, author = {Corbin Thurlow and Hayden Rowberry and Michael J. Wirthlin}, editor = {David Andrews and Ren{\'{e}} Cumplido and Claudia Feregrino and Marco Platzner}, title = {{TURTLE:} {A} Low-Cost Fault Injection Platform for SRAM-based FPGAs}, booktitle = {2019 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2019, Cancun, Mexico, December 9-11, 2019}, pages = {1--8}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/ReConFig48160.2019.8994782}, doi = {10.1109/RECONFIG48160.2019.8994782}, timestamp = {Thu, 27 Feb 2020 18:51:55 +0100}, biburl = {https://dblp.org/rec/conf/reconfig/ThurlowRW19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/reconfig/WilsonW19, author = {Andrew E. Wilson and Michael J. Wirthlin}, editor = {David Andrews and Ren{\'{e}} Cumplido and Claudia Feregrino and Marco Platzner}, title = {Reconfigurable Real-Time Video Pipelines on SRAM-based FPGAs}, booktitle = {2019 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2019, Cancun, Mexico, December 9-11, 2019}, pages = {1--7}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/ReConFig48160.2019.8994814}, doi = {10.1109/RECONFIG48160.2019.8994814}, timestamp = {Thu, 27 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/reconfig/WilsonW19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/CannonKW18, author = {Matthew Cannon and Andrew M. Keller and Michael J. Wirthlin}, title = {Improving the Effectiveness of {TMR} Designs on FPGAs with SEU-Aware Incremental Placement}, booktitle = {26th {IEEE} Annual International Symposium on Field-Programmable Custom Computing Machines, {FCCM} 2018, Boulder, CO, USA, April 29 - May 1, 2018}, pages = {141--148}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/FCCM.2018.00031}, doi = {10.1109/FCCM.2018.00031}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/CannonKW18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cf/FengGLW17, author = {W. Feng and A. George and H. Lamm and Michael J. Wirthlin}, title = {Center for High-Performance Reconfigurable Computing {(CHREC):} {A} Ten-Year Odyssey}, booktitle = {Proceedings of the Computing Frontiers Conference, CF'17, Siena, Italy, May 15-17, 2017}, pages = {326--327}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3075564.3095082}, doi = {10.1145/3075564.3095082}, timestamp = {Wed, 16 Mar 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cf/FengGLW17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/HutchingsW17, author = {Brad L. Hutchings and Michael J. Wirthlin}, editor = {Marco D. Santambrogio and Diana G{\"{o}}hringer and Dirk Stroobandt and Nele Mentens and Jari Nurmi}, title = {Rapid implementation of a partially reconfigurable video system with {PYNQ}}, booktitle = {27th International Conference on Field Programmable Logic and Applications, {FPL} 2017, Ghent, Belgium, September 4-8, 2017}, pages = {1--8}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.23919/FPL.2017.8056845}, doi = {10.23919/FPL.2017.8056845}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/fpl/HutchingsW17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/cee/CumplidoHW16, author = {Ren{\'{e}} Cumplido and Michael H{\"{u}}bner and Michael J. Wirthlin}, title = {Introduction to the special section on FPGAs Technology and Applications}, journal = {Comput. Electr. Eng.}, volume = {55}, pages = {88--90}, year = {2016}, url = {https://doi.org/10.1016/j.compeleceng.2016.10.011}, doi = {10.1016/J.COMPELECENG.2016.10.011}, timestamp = {Wed, 28 Apr 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/cee/CumplidoHW16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/WirthlinKMRLD16, author = {Michael J. Wirthlin and Andrew M. Keller and Chase McCloskey and Parker Ridd and David S. Lee and Jeffrey Draper}, editor = {Deming Chen and Jonathan W. Greene}, title = {{SEU} Mitigation and Validation of the {LEON3} Soft Processor Using Triple Modular Redundancy for Space Processing}, booktitle = {Proceedings of the 2016 {ACM/SIGDA} International Symposium on Field-Programmable Gate Arrays, Monterey, CA, USA, February 21-23, 2016}, pages = {205--214}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2847263.2847278}, doi = {10.1145/2847263.2847278}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fpga/WirthlinKMRLD16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/GruwellZW16, author = {Ammon Gruwell and Peter Zabriskie and Michael J. Wirthlin}, editor = {Paolo Ienne and Walid A. Najjar and Jason Helge Anderson and Philip Brisk and Walter Stechele}, title = {High-speed programmable {FPGA} Configuration through {JTAG}}, booktitle = {26th International Conference on Field Programmable Logic and Applications, {FPL} 2016, Lausanne, Switzerland, August 29 - September 2, 2016}, pages = {1--4}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/FPL.2016.7577336}, doi = {10.1109/FPL.2016.7577336}, timestamp = {Fri, 17 Jan 2020 17:11:15 +0100}, biburl = {https://dblp.org/rec/conf/fpl/GruwellZW16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/NewmeyerWNW16, author = {Luke Newmeyer and Doran Wilde and Brent E. Nelson and Michael J. Wirthlin}, editor = {Paolo Ienne and Walid A. Najjar and Jason Helge Anderson and Philip Brisk and Walter Stechele}, title = {Efficient processing of phased array radar in sense and avoid application using heterogeneous computing}, booktitle = {26th International Conference on Field Programmable Logic and Applications, {FPL} 2016, Lausanne, Switzerland, August 29 - September 2, 2016}, pages = {1--8}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/FPL.2016.7577322}, doi = {10.1109/FPL.2016.7577322}, timestamp = {Sun, 21 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fpl/NewmeyerWNW16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/StoddardGZW16, author = {Aaron Stoddard and Ammon Gruwell and Peter Zabriskie and Michael J. Wirthlin}, editor = {Paolo Ienne and Walid A. Najjar and Jason Helge Anderson and Philip Brisk and Walter Stechele}, title = {High-speed {PCAP} configuration scrubbing on Zynq-7000 All Programmable SoCs}, booktitle = {26th International Conference on Field Programmable Logic and Applications, {FPL} 2016, Lausanne, Switzerland, August 29 - September 2, 2016}, pages = {1--8}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/FPL.2016.7577301}, doi = {10.1109/FPL.2016.7577301}, timestamp = {Sun, 21 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fpl/StoddardGZW16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/TownsendNW16, author = {Thomas Townsend and Brent E. Nelson and Michael J. Wirthlin}, editor = {Paolo Ienne and Walid A. Najjar and Jason Helge Anderson and Philip Brisk and Walter Stechele}, title = {An {XDL} alternative for interfacing RapidSmith and Vivado}, booktitle = {26th International Conference on Field Programmable Logic and Applications, {FPL} 2016, Lausanne, Switzerland, August 29 - September 2, 2016}, pages = {1}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/FPL.2016.7577385}, doi = {10.1109/FPL.2016.7577385}, timestamp = {Sun, 21 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fpl/TownsendNW16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/CumplidoTFW15, author = {Ren{\'{e}} Cumplido and Eduardo de la Torre and Claudia Feregrino Uribe and Michael J. Wirthlin}, title = {Introduction to Special issue on Reconfigurable computing and FPGAs}, journal = {Microprocess. Microsystems}, volume = {39}, number = {7}, pages = {541--542}, year = {2015}, url = {https://doi.org/10.1016/j.micpro.2015.08.006}, doi = {10.1016/J.MICPRO.2015.08.006}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mam/CumplidoTFW15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/pieee/Wirthlin15, author = {Michael J. Wirthlin}, title = {High-Reliability FPGA-Based Systems: Space, High-Energy Physics, and Beyond}, journal = {Proc. {IEEE}}, volume = {103}, number = {3}, pages = {379--389}, year = {2015}, url = {https://doi.org/10.1109/JPROC.2015.2404212}, doi = {10.1109/JPROC.2015.2404212}, timestamp = {Fri, 02 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/pieee/Wirthlin15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/trets/QuinnRCGWMSNHJJ15, author = {Heather M. Quinn and Diane Roussel{-}Dupre and Michael P. Caffrey and Paul S. Graham and Michael J. Wirthlin and Keith Morgan and Anthony Salazar and Tony Nelson and William Howes and Darrel Eric Johnson and Jonathan M. Johnson and Brian H. Pratt and Nathan Rollins and Jim Krone}, title = {The Cibola Flight Experiment}, journal = {{ACM} Trans. Reconfigurable Technol. Syst.}, volume = {8}, number = {1}, pages = {3:1--3:22}, year = {2015}, url = {https://doi.org/10.1145/2629556}, doi = {10.1145/2629556}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/trets/QuinnRCGWMSNHJJ15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/HarwardGHW15, author = {Nathan A. Harward and Michael R. Gardiner and Luke W. Hsiao and Michael J. Wirthlin}, title = {Estimating Soft Processor Soft Error Sensitivity through Fault Injection}, booktitle = {23rd {IEEE} Annual International Symposium on Field-Programmable Custom Computing Machines, {FCCM} 2015, Vancouver, BC, Canada, May 2-6, 2015}, pages = {143--150}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/FCCM.2015.61}, doi = {10.1109/FCCM.2015.61}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/HarwardGHW15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/taes/PrattFRW13, author = {Brian H. Pratt and Megan Fuller and Michael Rice and Michael J. Wirthlin}, title = {Reduced-Precision Redundancy for Reliable {FPGA} Communications Systems in High-Radiation Environments}, journal = {{IEEE} Trans. Aerosp. Electron. Syst.}, volume = {49}, number = {1}, pages = {369--380}, year = {2013}, url = {https://doi.org/10.1109/TAES.2013.6404109}, doi = {10.1109/TAES.2013.6404109}, timestamp = {Thu, 16 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/taes/PrattFRW13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/asap/MonsonWH13, author = {Joshua S. Monson and Michael J. Wirthlin and Brad L. Hutchings}, title = {Implementing high-performance, low-power FPGA-based optical flow accelerators in {C}}, booktitle = {24th International Conference on Application-Specific Systems, Architectures and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013}, pages = {363--369}, publisher = {{IEEE} Computer Society}, year = {2013}, url = {https://doi.org/10.1109/ASAP.2013.6567602}, doi = {10.1109/ASAP.2013.6567602}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/asap/MonsonWH13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/WirthlinJWHWW13, author = {Michael J. Wirthlin and Joshua E. Jensen and Alex Wilson and William Howes and Shi{-}Jie Wen and Rick Wong}, editor = {Brad L. Hutchings and Vaughn Betz}, title = {Placement of repair circuits for in-field {FPGA} repair}, booktitle = {The 2013 {ACM/SIGDA} International Symposium on Field Programmable Gate Arrays, {FPGA} '13, Monterey, CA, USA, February 11-13, 2013}, pages = {115--124}, publisher = {{ACM}}, year = {2013}, url = {https://doi.org/10.1145/2435264.2435286}, doi = {10.1145/2435264.2435286}, timestamp = {Tue, 06 Nov 2018 16:58:22 +0100}, biburl = {https://dblp.org/rec/conf/fpga/WirthlinJWHWW13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/reconfig/MonsonWH13, author = {Joshua S. Monson and Michael J. Wirthlin and Brad L. Hutchings}, title = {Optimization techniques for a high level synthesis implementation of the Sobel filter}, booktitle = {2012 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013, Cancun, Mexico, December 9-11, 2013}, pages = {1--6}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/ReConFig.2013.6732315}, doi = {10.1109/RECONFIG.2013.6732315}, timestamp = {Wed, 16 Oct 2019 14:14:52 +0200}, biburl = {https://dblp.org/rec/conf/reconfig/MonsonWH13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/MonsonWH12, author = {Joshua S. Monson and Michael J. Wirthlin and Brad L. Hutchings}, title = {A Fault Injection Analysis of Linux Operating on an FPGA-Embedded Platform}, journal = {Int. J. Reconfigurable Comput.}, volume = {2012}, pages = {850487:1--850487:11}, year = {2012}, url = {https://doi.org/10.1155/2012/850487}, doi = {10.1155/2012/850487}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/MonsonWH12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/RollinsW12, author = {Nathaniel H. Rollins and Michael J. Wirthlin}, editor = {Katherine Compton and Brad L. Hutchings}, title = {Reliability of a softcore processor in a commercial SRAM-based {FPGA}}, booktitle = {Proceedings of the {ACM/SIGDA} 20th International Symposium on Field Programmable Gate Arrays, {FPGA} 2012, Monterey, California, USA, February 22-24, 2012}, pages = {171--174}, publisher = {{ACM}}, year = {2012}, url = {https://doi.org/10.1145/2145694.2145723}, doi = {10.1145/2145694.2145723}, timestamp = {Tue, 06 Nov 2018 16:58:22 +0100}, biburl = {https://dblp.org/rec/conf/fpga/RollinsW12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/PrattFW11, author = {Brian H. Pratt and Megan Fuller and Michael J. Wirthlin}, title = {Reduced-Precision Redundancy on FPGAs}, journal = {Int. J. Reconfigurable Comput.}, volume = {2011}, pages = {897189:1--897189:12}, year = {2011}, url = {https://doi.org/10.1155/2011/897189}, doi = {10.1155/2011/897189}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/PrattFW11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/arcs/RollinsW11, author = {Nathaniel H. Rollins and Michael J. Wirthlin}, editor = {Wolfgang Karl and Dimitrios Soudris}, title = {Software Fault-Tolerant Techniques for Softcore Processors in Commercial SRAM-Based FPGAs}, booktitle = {{ARCS} 2011 - 24th International Conference on Architecture of Computing Systems 2011, Workshop Proceedings, February 22-23, 2011, Como, Italy}, publisher = {VDE-Verlag}, year = {2011}, url = {http://www.vde-verlag.de/proceedings-de/563333007.html}, timestamp = {Thu, 16 May 2013 20:19:52 +0200}, biburl = {https://dblp.org/rec/conf/arcs/RollinsW11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/reconfig/OstlerWJ11, author = {Patrick S. Ostler and Michael J. Wirthlin and Joshua E. Jensen}, editor = {Peter M. Athanas and J{\"{u}}rgen Becker and Ren{\'{e}} Cumplido}, title = {{FPGA} Bootstrapping on PCIe Using Partial Reconfiguration}, booktitle = {2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011, Cancun, Mexico, November 30 - December 2, 2011}, pages = {380--385}, publisher = {{IEEE} Computer Society}, year = {2011}, url = {https://doi.org/10.1109/ReConFig.2011.40}, doi = {10.1109/RECONFIG.2011.40}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/reconfig/OstlerWJ11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/fccm/2011, editor = {Paul Chow and Michael J. Wirthlin}, title = {{IEEE} 19th Annual International Symposium on Field-Programmable Custom Computing Machines, {FCCM} 2011, Salt Lake City, Utah, USA, 1-3 May 2011}, publisher = {{IEEE} Computer Society}, year = {2011}, url = {https://ieeexplore.ieee.org/xpl/conhome/5771180/proceeding}, isbn = {978-0-7695-4301-7}, timestamp = {Wed, 16 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fccm/2011.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/SiegelW10, author = {Shepard Siegel and Michael J. Wirthlin}, editor = {Peter Y. K. Cheung and John Wawrzynek}, title = {{FPGA-2010} pre-conference workshop on open-source for {FPGA}}, booktitle = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA, February 21-23, 2010}, pages = {1}, publisher = {{ACM}}, year = {2010}, url = {https://doi.org/10.1145/1723112.1723114}, doi = {10.1145/1723112.1723114}, timestamp = {Tue, 06 Nov 2018 16:58:23 +0100}, biburl = {https://dblp.org/rec/conf/fpga/SiegelW10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/JohnsonW10, author = {Jonathan M. Johnson and Michael J. Wirthlin}, editor = {Peter Y. K. Cheung and John Wawrzynek}, title = {Voter insertion algorithms for {FPGA} designs using triple modular redundancy}, booktitle = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA, February 21-23, 2010}, pages = {249--258}, publisher = {{ACM}}, year = {2010}, url = {https://doi.org/10.1145/1723112.1723154}, doi = {10.1145/1723112.1723154}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fpga/JohnsonW10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/LavinPGNHW10, author = {Christopher Lavin and Marc Padilla and Subhrashankha Ghosh and Brent E. Nelson and Brad L. Hutchings and Michael J. Wirthlin}, title = {Using Hard Macros to Reduce {FPGA} Compilation Time}, booktitle = {International Conference on Field Programmable Logic and Applications, {FPL} 2010, August 31 2010 - September 2, 2010, Milano, Italy}, pages = {438--441}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/FPL.2010.90}, doi = {10.1109/FPL.2010.90}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fpl/LavinPGNHW10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/ArnesenEGHHPNRW10, author = {Adam Arnesen and Kevin Ellsworth and Derrick Gibelyou and Travis Haroldsen and Jared Havican and Marc Padilla and Brent E. Nelson and Michael Rice and Michael J. Wirthlin}, title = {Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis}, booktitle = {International Conference on Field Programmable Logic and Applications, {FPL} 2010, August 31 2010 - September 2, 2010, Milano, Italy}, pages = {538--543}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/FPL.2010.106}, doi = {10.1109/FPL.2010.106}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fpl/ArnesenEGHHPNRW10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icc/PrattFRW10, author = {Brian H. Pratt and Megan Fuller and Michael Rice and Michael J. Wirthlin}, title = {Reliable Communications Using FPGAs in High-Radiation Environments - Part {I:} Characterization}, booktitle = {Proceedings of {IEEE} International Conference on Communications, {ICC} 2010, Cape Town, South Africa, 23-27 May 2010}, pages = {1--5}, publisher = {{IEEE}}, year = {2010}, url = {https://doi.org/10.1109/ICC.2010.5502571}, doi = {10.1109/ICC.2010.5502571}, timestamp = {Wed, 16 Oct 2019 14:14:50 +0200}, biburl = {https://dblp.org/rec/conf/icc/PrattFRW10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/reconfig/MonsonWH10, author = {Joshua S. Monson and Michael J. Wirthlin and Brad L. Hutchings}, editor = {Viktor K. Prasanna and J{\"{u}}rgen Becker and Ren{\'{e}} Cumplido}, title = {Fault Injection Results of Linux Operating on an {FPGA} Embedded Platform}, booktitle = {ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 13-15 December 2010, Proceedings}, pages = {37--42}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/ReConFig.2010.79}, doi = {10.1109/RECONFIG.2010.79}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/reconfig/MonsonWH10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tim/QuinnGWPMCK09, author = {Heather M. Quinn and Paul S. Graham and Michael J. Wirthlin and Brian H. Pratt and Keith Morgan and Michael P. Caffrey and Jim Krone}, title = {A Test Methodology for Determining Space Readiness of Xilinx SRAM-Based {FPGA} Devices and Designs}, journal = {{IEEE} Trans. Instrum. Meas.}, volume = {58}, number = {10}, pages = {3380--3395}, year = {2009}, url = {https://doi.org/10.1109/TIM.2009.2025469}, doi = {10.1109/TIM.2009.2025469}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tim/QuinnGWPMCK09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/CaffreyMRRNSWHR09, author = {Michael P. Caffrey and Keith Morgan and Diane Roussel{-}Dupre and Scott Robinson and Anthony Nelson and Anthony Salazar and Michael J. Wirthlin and William Howes and Daniel Richins}, editor = {Kenneth L. Pocek and Duncan A. Buell}, title = {On-Orbit Flight Results from the Reconfigurable Cibola Flight Experiment Satellite (CFESat)}, booktitle = {{FCCM} 2009, 17th {IEEE} Symposium on Field Programmable Custom Computing Machines, Napa, California, USA, 5-7 April 2009, Proceedings}, pages = {3--10}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/FCCM.2009.22}, doi = {10.1109/FCCM.2009.22}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/CaffreyMRRNSWHR09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/PrattWCGM09, author = {Brian H. Pratt and Michael J. Wirthlin and Michael P. Caffrey and Paul S. Graham and Keith Morgan}, editor = {Martin Danek and Jiri Kadlec and Brent E. Nelson}, title = {Noise impact of single-event upsets on an FPGA-based digital filter}, booktitle = {19th International Conference on Field Programmable Logic and Applications, {FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic}, pages = {38--43}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FPL.2009.5272554}, doi = {10.1109/FPL.2009.5272554}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fpl/PrattWCGM09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/HeinerSWK09, author = {Jonathan Heiner and Benjamin Sellers and Michael J. Wirthlin and Jeff Kalb}, editor = {Martin Danek and Jiri Kadlec and Brent E. Nelson}, title = {{FPGA} partial reconfiguration via configuration scrubbing}, booktitle = {19th International Conference on Field Programmable Logic and Applications, {FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic}, pages = {99--104}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FPL.2009.5272543}, doi = {10.1109/FPL.2009.5272543}, timestamp = {Sun, 21 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fpl/HeinerSWK09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/ArnesenRW09, author = {Adam Arnesen and Nathan Rollins and Michael J. Wirthlin}, editor = {Martin Danek and Jiri Kadlec and Brent E. Nelson}, title = {A multi-layered {XML} schema and design tool for reusing and integrating {FPGA} {IP}}, booktitle = {19th International Conference on Field Programmable Logic and Applications, {FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic}, pages = {472--475}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FPL.2009.5272468}, doi = {10.1109/FPL.2009.5272468}, timestamp = {Sun, 21 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fpl/ArnesenRW09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/SellersHWK09, author = {Benjamin Sellers and Jonathan Heiner and Michael J. Wirthlin and Jeff Kalb}, editor = {Martin Danek and Jiri Kadlec and Brent E. Nelson}, title = {Bitstream compression through frame removal and partial reconfiguration}, booktitle = {19th International Conference on Field Programmable Logic and Applications, {FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic}, pages = {476--480}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/FPL.2009.5272502}, doi = {10.1109/FPL.2009.5272502}, timestamp = {Sun, 21 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fpl/SellersHWK09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/pc/WirthlinPSCPNBBPPK08, author = {Michael J. Wirthlin and Daniel S. Poznanovic and P. Sundararajan and Alan J. Coppola and D. Pellerin and Walid A. Najjar and R. Bruce and M. Babst and O. Pritchard and Paolo Palazzari and Georgi Kuzmanov}, title = {OpenFPGA CoreLib core library interoperability effort}, journal = {Parallel Comput.}, volume = {34}, number = {4-5}, pages = {231--244}, year = {2008}, url = {https://doi.org/10.1016/j.parco.2008.03.004}, doi = {10.1016/J.PARCO.2008.03.004}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/pc/WirthlinPSCPNBBPPK08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsisp/NelsonHW08, author = {Brent E. Nelson and Brad L. Hutchings and Michael J. Wirthlin}, title = {Design, Debug, Deploy: The Creation of Configurable Computing Applications}, journal = {J. Signal Process. Syst.}, volume = {53}, number = {1-2}, pages = {187--196}, year = {2008}, url = {https://doi.org/10.1007/s11265-008-0167-9}, doi = {10.1007/S11265-008-0167-9}, timestamp = {Thu, 12 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/vlsisp/NelsonHW08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ersa/NelsonWHAB08, author = {Brent E. Nelson and Michael J. Wirthlin and Brad L. Hutchings and Peter M. Athanas and Shawn A. Bohner}, editor = {Toomas P. Plaks}, title = {Design Productivity for Configurable Computing}, booktitle = {Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems {\&} Algorithms, {ERSA} 2008, Las Vegas, Nevada, USA, July 14-17, 2008}, pages = {57--66}, publisher = {{CSREA} Press}, year = {2008}, timestamp = {Sat, 11 Sep 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/ersa/NelsonWHAB08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ersa/QuinnGMKCW08, author = {Heather Quinn and Paul S. Graham and Keith Morgan and Jim Krone and Michael P. Caffrey and Michael J. Wirthlin}, editor = {Toomas P. Plaks}, title = {An Introduction to Radiation-Induced Failure Modes and Related Mitigation Methods For Xilinx {SRAM} FPGAs}, booktitle = {Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems {\&} Algorithms, {ERSA} 2008, Las Vegas, Nevada, USA, July 14-17, 2008}, pages = {139--145}, publisher = {{CSREA} Press}, year = {2008}, timestamp = {Wed, 26 May 2010 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/ersa/QuinnGMKCW08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ersa/PrattCGGMW08, author = {Brian H. Pratt and Michael P. Caffrey and Derrick Gibelyou and Paul S. Graham and Keith Morgan and Michael J. Wirthlin}, editor = {Toomas P. Plaks}, title = {{TMR} with More Frequent Voting for Improved {FPGA} Reliability}, booktitle = {Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems {\&} Algorithms, {ERSA} 2008, Las Vegas, Nevada, USA, July 14-17, 2008}, pages = {153--158}, publisher = {{CSREA} Press}, year = {2008}, timestamp = {Wed, 26 May 2010 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/ersa/PrattCGGMW08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/SunWN07, author = {Welson Sun and Michael J. Wirthlin and Stephen Neuendorffer}, title = {{FPGA} Pipeline Synthesis Design Exploration Using Module Selection and Resource Sharing}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {26}, number = {2}, pages = {254--265}, year = {2007}, url = {https://doi.org/10.1109/TCAD.2006.887923}, doi = {10.1109/TCAD.2006.887923}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/SunWN07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/WirthlinBGH07, author = {Michael J. Wirthlin and Misha Burich and Andrew Guyler and Brian Von Herzen}, editor = {Andr{\'{e}} DeHon and Mike Hutton}, title = {High-level languages: the future or a passing fad?}, booktitle = {Proceedings of the {ACM/SIGDA} 15th International Symposium on Field Programmable Gate Arrays, {FPGA} 2007, Monterey, California, USA, February 18-20, 2007}, pages = {127}, publisher = {{ACM}}, year = {2007}, url = {https://doi.org/10.1145/1216919.1216938}, doi = {10.1145/1216919.1216938}, timestamp = {Tue, 06 Nov 2018 16:58:22 +0100}, biburl = {https://dblp.org/rec/conf/fpga/WirthlinBGH07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijes/GokhaleGWJR06, author = {Maya B. Gokhale and Paul S. Graham and Michael J. Wirthlin and Darrel Eric Johnson and Nathan Rollins}, title = {Dynamic reconfiguration for management of radiation-induced faults in FPGAs}, journal = {Int. J. Embed. Syst.}, volume = {2}, number = {1/2}, pages = {28--38}, year = {2006}, url = {https://doi.org/10.1504/IJES.2006.010162}, doi = {10.1504/IJES.2006.010162}, timestamp = {Fri, 11 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijes/GokhaleGWJR06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/FrenchWW06, author = {Matthew French and Li Wang and Michael J. Wirthlin}, title = {Power Visualization, Analysis, and Optimization Tools for FPGAs}, booktitle = {14th {IEEE} Symposium on Field-Programmable Custom Computing Machines {(FCCM} 2006), 24-26 April 2006, Napa, CA, USA, Proceedings}, pages = {185--194}, publisher = {{IEEE} Computer Society}, year = {2006}, url = {https://doi.org/10.1109/FCCM.2006.58}, doi = {10.1109/FCCM.2006.58}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/FrenchWW06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/WirthlinS06, author = {Michael J. Wirthlin and Welson Sun}, title = {DSynth: {A} Pipeline Synthesis Environment for FPGAs}, booktitle = {14th {IEEE} Symposium on Field-Programmable Custom Computing Machines {(FCCM} 2006), 24-26 April 2006, Napa, CA, USA, Proceedings}, pages = {343--344}, publisher = {{IEEE} Computer Society}, year = {2006}, url = {https://doi.org/10.1109/FCCM.2006.37}, doi = {10.1109/FCCM.2006.37}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/WirthlinS06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/SunWN06, author = {Welson Sun and Michael J. Wirthlin and Stephen Neuendorffer}, editor = {Steven J. E. Wilton and Andr{\'{e}} DeHon}, title = {Combining module selection and resource sharing for efficient {FPGA} pipeline synthesis}, booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA, February 22-24, 2006}, pages = {179--188}, publisher = {{ACM}}, year = {2006}, url = {https://doi.org/10.1145/1117201.1117228}, doi = {10.1145/1117201.1117228}, timestamp = {Tue, 06 Nov 2018 16:58:23 +0100}, biburl = {https://dblp.org/rec/conf/fpga/SunWN06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/FrenchWAW05, author = {Matthew French and Li Wang and Tyler Anderson and Michael J. Wirthlin}, title = {Post Synthesis Level Power Modeling of FPGAs}, booktitle = {13th {IEEE} Symposium on Field-Programmable Custom Computing Machines {(FCCM} 2005), 17-20 April 2005, Napa, CA, USA, Proceedings}, pages = {281--282}, publisher = {{IEEE} Computer Society}, year = {2005}, url = {https://doi.org/10.1109/FCCM.2005.53}, doi = {10.1109/FCCM.2005.53}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/FrenchWAW05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hicss/PlaksLW05, author = {Toomas P. Plaks and Philip Heng Wai Leong and Michael J. Wirthlin}, title = {Mobile Computing Architectures, Design and Implementation}, booktitle = {38th Hawaii International Conference on System Sciences {(HICSS-38} 2005), {CD-ROM} / Abstracts Proceedings, 3-6 January 2005, Big Island, HI, {USA}}, publisher = {{IEEE} Computer Society}, year = {2005}, url = {https://doi.org/10.1109/HICSS.2005.433}, doi = {10.1109/HICSS.2005.433}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hicss/PlaksLW05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mse/Wirthlin05, author = {Michael J. Wirthlin}, title = {Senior-Level Embedded Systems Design Project Using FPGAs}, booktitle = {2005 International Conference on Microelectronics Systems Education, {MSE} 2005, Anaheim, CA, USA, June 12-13, 2005}, pages = {91--92}, publisher = {{IEEE} Computer Society}, year = {2005}, url = {https://doi.org/10.1109/MSE.2005.49}, doi = {10.1109/MSE.2005.49}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mse/Wirthlin05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsisp/Wirthlin04, author = {Michael J. Wirthlin}, title = {Constant Coefficient Multiplication Using Look-Up Tables}, journal = {J. {VLSI} Signal Process.}, volume = {36}, number = {1}, pages = {7--15}, year = {2004}, url = {https://doi.org/10.1023/B:VLSI.0000008066.95259.b8}, doi = {10.1023/B:VLSI.0000008066.95259.B8}, timestamp = {Wed, 20 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsisp/Wirthlin04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/Wirthlin04, author = {Michael J. Wirthlin}, editor = {Russell Tessier and Herman Schmit}, title = {Improving the reliability of {FPGA} circuits using triple-modular redundancy {(TMR)} {\&} efficient voter placement}, booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA, February 22-24, 2004}, pages = {252}, publisher = {{ACM}}, year = {2004}, url = {https://doi.org/10.1145/968280.968338}, doi = {10.1145/968280.968338}, timestamp = {Tue, 06 Nov 2018 16:58:22 +0100}, biburl = {https://dblp.org/rec/conf/fpga/Wirthlin04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ipps/GokhaleGJRW04, author = {Maya B. Gokhale and Paul S. Graham and Darrel Eric Johnson and Nathan Rollins and Michael J. Wirthlin}, title = {Dynamic Reconfiguration for Management of Radiation-Induced Faults in FPGAs}, booktitle = {18th International Parallel and Distributed Processing Symposium {(IPDPS} 2004), {CD-ROM} / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, {USA}}, publisher = {{IEEE} Computer Society}, year = {2004}, url = {https://doi.org/10.1109/IPDPS.2004.1303127}, doi = {10.1109/IPDPS.2004.1303127}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ipps/GokhaleGJRW04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jcsc/LeeNW03, author = {Edward A. Lee and Stephen Neuendorffer and Michael J. Wirthlin}, title = {Actor-Oriented Design of Embedded Hardware and Software Systems}, journal = {J. Circuits Syst. Comput.}, volume = {12}, number = {3}, pages = {231--260}, year = {2003}, url = {https://doi.org/10.1142/S0218126603000751}, doi = {10.1142/S0218126603000751}, timestamp = {Tue, 25 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jcsc/LeeNW03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/WirthlinM03, author = {Michael J. Wirthlin and Brian McMurtrey}, title = {Web-based {IP} evaluation and distribution using applets}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {22}, number = {8}, pages = {985--994}, year = {2003}, url = {https://doi.org/10.1109/TCAD.2003.814946}, doi = {10.1109/TCAD.2003.814946}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/WirthlinM03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/WirthlinJRCG03, author = {Michael J. Wirthlin and Darrel Eric Johnson and Nathan Rollins and Michael P. Caffrey and Paul S. Graham}, title = {The Reliability of {FPGA} Circuit Designs in the Presence of Radiation Induced Configuration Upsets}, booktitle = {11th {IEEE} Symposium on Field-Programmable Custom Computing Machines {(FCCM} 2003), 8-11 April 2003, Napa, CA, USA, Proceedings}, pages = {133--142}, publisher = {{IEEE} Computer Society}, year = {2003}, url = {https://doi.org/10.1109/FPGA.2003.1227249}, doi = {10.1109/FPGA.2003.1227249}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/WirthlinJRCG03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/WirthlinM02, author = {Michael J. Wirthlin and Brian McMurtrey}, title = {{IP} delivery for FPGAs using Applets and {JHDL}}, booktitle = {Proceedings of the 39th Design Automation Conference, {DAC} 2002, New Orleans, LA, USA, June 10-14, 2002}, pages = {2--7}, publisher = {{ACM}}, year = {2002}, url = {https://doi.org/10.1145/513918.513922}, doi = {10.1145/513918.513922}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/WirthlinM02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/LandakerWH02, author = {Wesley J. Landaker and Michael J. Wirthlin and Brad L. Hutchings}, editor = {Manfred Glesner and Peter Zipf and Michel Renovell}, title = {Multitasking Hardware on the {SLAAC1-V} Reconfigurable Computing System}, booktitle = {Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, {FPL} 2002, Montpellier, France, September 2-4, 2002, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {2438}, pages = {806--815}, publisher = {Springer}, year = {2002}, url = {https://doi.org/10.1007/3-540-46117-5\_83}, doi = {10.1007/3-540-46117-5\_83}, timestamp = {Sat, 30 Sep 2023 09:41:27 +0200}, biburl = {https://dblp.org/rec/conf/fpl/LandakerWH02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/WirthlinHW01, author = {Michael J. Wirthlin and Brad L. Hutchings and Carl D. Worth}, editor = {Gordon J. Brebner and Roger F. Woods}, title = {Synthesizing {RTL} Hardware from Java Byte Codes}, booktitle = {Field-Programmable Logic and Applications, 11th International Conference, {FPL} 2001, Belfast, Northern Ireland, UK, August 27-29, 2001, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {2147}, pages = {123--132}, publisher = {Springer}, year = {2001}, url = {https://doi.org/10.1007/3-540-44687-7\_13}, doi = {10.1007/3-540-44687-7\_13}, timestamp = {Mon, 22 Aug 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fpl/WirthlinHW01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/WirthlinM01, author = {Michael J. Wirthlin and Brian McMurtrey}, editor = {Gordon J. Brebner and Roger F. Woods}, title = {Efficient Constant Coefficient Multiplication Using Advanced {FPGA} Architectures}, booktitle = {Field-Programmable Logic and Applications, 11th International Conference, {FPL} 2001, Belfast, Northern Ireland, UK, August 27-29, 2001, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {2147}, pages = {555--564}, publisher = {Springer}, year = {2001}, url = {https://doi.org/10.1007/3-540-44687-7\_57}, doi = {10.1007/3-540-44687-7\_57}, timestamp = {Sun, 21 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fpl/WirthlinM01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/dt/HutchingsNW00, author = {Brad L. Hutchings and Brent E. Nelson and Michael J. Wirthlin}, title = {Designing and Debugging Custom Computing Applications}, journal = {{IEEE} Des. Test Comput.}, volume = {17}, number = {1}, pages = {20--28}, year = {2000}, url = {https://doi.org/10.1109/54.825674}, doi = {10.1109/54.825674}, timestamp = {Sun, 17 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/dt/HutchingsNW00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/WirthlinMGB00, author = {Michael J. Wirthlin and Steve Morrison and Paul S. Graham and Brian Bray}, title = {Improving the Performance and Efficiency of an Adaptive Amplification Operation Using Configurable Hardware}, booktitle = {8th {IEEE} Symposium on Field-Programmable Custom Computing Machines {(FCCM} 2000), 17-19 April 2000, Napa Valley, CA, USA, Proceedings}, pages = {267--278}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/FPGA.2000.903414}, doi = {10.1109/FPGA.2000.903414}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/WirthlinMGB00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/WirthlinG00, author = {Michael J. Wirthlin and Paul S. Graham}, editor = {Steve Trimberger and Scott Hauck}, title = {Improving the performance and efficiency of an adaptive amplification operation using configurable hardware (poster abstract)}, booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000}, pages = {219}, publisher = {{ACM}}, year = {2000}, url = {https://doi.org/10.1145/329166.329219}, doi = {10.1145/329166.329219}, timestamp = {Tue, 06 Nov 2018 16:58:22 +0100}, biburl = {https://dblp.org/rec/conf/fpga/WirthlinG00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/pdpta/WirthlinS00, author = {Michael J. Wirthlin and Navaneethan Sundaramoorthy}, editor = {Hamid R. Arabnia}, title = {Measuring the Routing Costs of {FPGA} Circuit Components}, booktitle = {Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, {PDPTA} 2000, June 24-29, 2000, Las Vegas, Nevada, {USA}}, publisher = {{CSREA} Press}, year = {2000}, timestamp = {Mon, 08 Dec 2003 16:35:08 +0100}, biburl = {https://dblp.org/rec/conf/pdpta/WirthlinS00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/WirthlinH98, author = {Michael J. Wirthlin and Brad L. Hutchings}, title = {Improving functional density using run-time circuit reconfiguration [FPGAs]}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {6}, number = {2}, pages = {247--256}, year = {1998}, url = {https://doi.org/10.1109/92.678880}, doi = {10.1109/92.678880}, timestamp = {Wed, 11 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/WirthlinH98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/WirthlinH97, author = {Michael J. Wirthlin and Brad L. Hutchings}, editor = {Carl Ebeling}, title = {Improving Functional Density Through Run-Time Constant Propagation}, booktitle = {Proceedings of the 1997 {ACM/SIGDA} Fifth International Symposium on Field Programmable Gate Arrays, {FPGA} 1997, Monterey, CA, USA, February 9-11, 1997}, pages = {86--92}, publisher = {{ACM}}, year = {1997}, url = {https://doi.org/10.1145/258305.258316}, doi = {10.1145/258305.258316}, timestamp = {Tue, 06 Nov 2018 16:58:23 +0100}, biburl = {https://dblp.org/rec/conf/fpga/WirthlinH97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/WirthlinH96, author = {Michael J. Wirthlin and Brad L. Hutchings}, editor = {Jonathan Rose and Carl Ebeling}, title = {Sequencing Run-Time Reconfigured Hardware with Software}, booktitle = {Proceedings of the 1996 Fourth International Symposium on Field Programmable Gate Arrays, {FPGA} 1996, Monterey, CA, USA, February 11-13, 1996}, pages = {122--128}, publisher = {{ACM}}, year = {1996}, url = {https://doi.org/10.1145/228370.228388}, doi = {10.1145/228370.228388}, timestamp = {Tue, 06 Nov 2018 16:58:23 +0100}, biburl = {https://dblp.org/rec/conf/fpga/WirthlinH96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/WirthlinH95, author = {Michael J. Wirthlin and Brad L. Hutchings}, title = {A dynamic instruction set computer}, booktitle = {3rd {IEEE} Symposium on Field-Programmable Custom Computing Machines {(FCCM} '95), 19-21 April 1995, Napa Valley, CA, {USA}}, pages = {99--109}, publisher = {{IEEE} Computer Society}, year = {1995}, url = {https://doi.org/10.1109/FPGA.1995.477415}, doi = {10.1109/FPGA.1995.477415}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/WirthlinH95.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/HutchingsW95, author = {Brad L. Hutchings and Michael J. Wirthlin}, editor = {Will Moore and Wayne Luk}, title = {Implementation Approaches for Reconfigurable Logic Applications}, booktitle = {Field-Programmable Logic and Applications, 5th International Workshop, {FPL} '95, Oxford, UK, August 29 - September 1, 1995, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {975}, pages = {419--428}, publisher = {Springer}, year = {1995}, url = {https://doi.org/10.1007/3-540-60294-1\_136}, doi = {10.1007/3-540-60294-1\_136}, timestamp = {Tue, 14 May 2019 10:00:48 +0200}, biburl = {https://dblp.org/rec/conf/fpl/HutchingsW95.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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