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Jongmin Lee 0002

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affiliation: KAIST, Department of Computer Science, Daejeon, South Korea
not to be confused with: Jong Min Lee 0001

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2010 – 2019

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2017
[j4]
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Jesung Kim, Jongmin Lee, Soontae Kim:
TLB Index-Based Tagging for Reducing Data Cache and TLB Energy Consumption. IEEE Trans. Computers 66(7): 1200-1211 (2017)
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Jungwoo Park, Jongmin Lee, Soontae Kim:
A Way-Filtering-Based Dynamic Logical-Associative Cache Architecture for Low-Energy Consumption. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 793-805 (2017)
2016
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Jongmin Lee, Soontae Kim:
Write Buffer-Oriented Energy Reduction in the L1 Data Cache for Embedded Systems. IEEE Trans. Very Large Scale Integr. Syst. 24(3): 871-883 (2016)
2015
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Jongmin Lee, Soontae Kim:
Filter Data Cache: An Energy-Efficient Small L0 Data Cache Architecture Driven byMiss Cost Reduction. IEEE Trans. Computers 64(7): 1927-1939 (2015)
2014
[c7]
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Seokin Hong, Jongmin Lee, Soontae Kim:
Ternary cache: Three-valued MLC STT-RAM caches. ICCD 2014: 83-89
2013
[c6]
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Yebin Lee, Soontae Kim, Seokin Hong, Jongmin Lee:
Skinflint DRAM system: Minimizing DRAM chip writes for low power. HPCA 2013: 25-34
2012
[c5]
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Jongmin Lee, Soontae Kim:
Adopting TLB index-based tagging to data caches for tag energy reduction. ISLPED 2012: 231-236
2011
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Jongmin Lee, Seokin Hong, Soontae Kim:
TLB index-based tagging for cache energy reduction. ISLPED 2011: 85-90
[c3]
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Soontae Kim, Jongmin Lee, Jesung Kim, Seokin Hong:
Residue cache: a low-energy low-area L2 cache architecture via compression and partial hits. MICRO 2011: 420-429
2010
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Soontae Kim, Jongmin Lee:
Write buffer-oriented energy reduction in the L1 data cache of two-level caches for the embedded system. ACM Great Lakes Symposium on VLSI 2010: 257-262

2000 – 2009

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2009
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Jongmin Lee, Soontae Kim:
An energy-delay efficient 2-level data cache architecture for embedded system. ISLPED 2009: 343-346

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