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Jooheung Lee
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Publications
- 2015
- [j12]Naveed Imran, Rizwan A. Ashraf, Jooheung Lee, Ronald F. DeMara:
Activity-Based Resource Allocation for Motion Estimation Engines. J. Circuits Syst. Comput. 24(1): 1550004:1-1550004:32 (2015) - 2014
- [j11]Naveed Imran, Ronald F. DeMara, Jooheung Lee, Jian Huang:
Self-Adapting Resource Escalation for Resilient Signal Processing Architectures. J. Signal Process. Syst. 77(3): 257-280 (2014) - 2013
- [j10]Naveed Imran, Jooheung Lee, Ronald F. DeMara:
Fault Demotion Using Reconfigurable Slack (FaDReS). IEEE Trans. Very Large Scale Integr. Syst. 21(7): 1364-1368 (2013) - 2011
- [j7]Jian Huang, Jooheung Lee:
Reconfigurable Architecture for ZQDCT Using Computational Complexity Prediction and Bitstream Relocation. IEEE Embed. Syst. Lett. 3(1): 1-4 (2011) - 2010
- [c10]Ronald F. DeMara, Jooheung Lee, Rawad N. Al-Haddad, Rashad S. Oreifej, Rizwan A. Ashraf, Brian Stensrud, Michael Quist:
Dynamic Partial Reconfiguration Approach to the Design of Sustainable Edge Detectors. ERSA 2010: 49-58 - [e1]Toomas P. Plaks, David Andrews, Ronald F. DeMara, Herman Lam, Jooheung Lee, Christian Plessl, Greg Stitt:
Proceedings of the 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA 2010, July 12-15, 2010, Las Vegas Nevada, USA. CSREA Press 2010, ISBN 1-60132-140-6 [contents] - 2009
- [j6]Jian Huang, Jooheung Lee:
Efficient VLSI architecture for video transcoding. IEEE Trans. Consumer Electron. 55(3): 1462-1470 (2009) - [j5]Jian Huang, Jooheung Lee:
A Self-Reconfigurable Platform for Scalable DCT Computation Using Compressed Partial Bitstreams and BlockRAM Prefetching. IEEE Trans. Circuits Syst. Video Technol. 19(11): 1623-1632 (2009) - [j4]Jian Huang, Matthew Parris, Jooheung Lee, Ronald F. DeMara:
Scalable FPGA-based architecture for DCT computation using dynamic partial reconfiguration. ACM Trans. Embed. Comput. Syst. 9(1): 9:1-9:18 (2009) - [c7]Jian Huang, Jooheung Lee:
A Self-Reconfigurable Platform for Scalable DCT Computation Using Compressed Partial Bitstreams and BlockRAM Prefetching. ISVLSI 2009: 67-72 - 2008
- [c6]Jian Huang, Jooheung Lee, Hao Li:
A Fast FPGA Implementation of Tate Pairing in Cryptography over Binary Field. Security and Management 2008: 3-9 - [c5]Jian Huang, Matthew Parris, Jooheung Lee, Ronald F. DeMara:
Scalable FPGA Architecture for DCT Computation Using Dynamic Partial Reconfiguration. ERSA 2008: 269-272
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