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Robert Schreiber
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Publications
- 2023
- [c29]Marcelo Orenes-Vera, Ilya Sharapov, Robert Schreiber, Mathias Jacquelin, Philippe Vandermersch, Sharan Chetlur:
Wafer-Scale Fast Fourier Transforms. ICS 2023: 180-191 - [i7]Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn:
RETROSPECTIVE: Corona: System Implications of Emerging Nanophotonic Technology. CoRR abs/2306.15688 (2023) - [i6]Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn:
Corona: System Implications of Emerging Nanophotonic Technology. CoRR abs/2307.06294 (2023) - 2022
- [i5]Mino Woo, Terry Jordan, Robert Schreiber, Ilya Sharapov, Shaheer Muhammad, Abhishek Koneru, Michael James, Dirk Van Essendelft:
Disruptive Changes in Field Equation Modeling: A Simple Interface for Wafer Scale Engines. CoRR abs/2209.13768 (2022) - [i4]Marcelo Orenes-Vera, Ilya Sharapov, Robert Schreiber, Mathias Jacquelin, Philippe Vandermersch, Sharan Chetlur:
Wafer-Scale Fast Fourier Transforms. CoRR abs/2209.15040 (2022) - 2020
- [c28]Kamil Rocki, Dirk Van Essendelft, Ilya Sharapov, Robert Schreiber, Michael Morrison, Vladimir Kibardin, Andrey Portnoy, Jean-Francois Dietiker, Madhava Syamlal, Michael James:
Fast stencil-code computation on a wafer-scale processor. SC 2020: 58 - [i2]Kamil Rocki, Dirk Van Essendelft, Ilya Sharapov, Robert Schreiber, Michael Morrison, Vladimir Kibardin, Andrey Portnoy, Jean-Francois Dietiker, Madhava Syamlal, Michael James:
Fast Stencil-Code Computation on a Wafer-Scale Processor. CoRR abs/2010.03660 (2020) - 2016
- [c27]Arjun Deb, Paolo Faraboschi, Ali Shafiee, Naveen Muralimanohar, Rajeev Balasubramonian, Robert Schreiber:
Enabling technologies for memory compression: Metadata, mapping, and prediction. ICCD 2016: 17-24 - 2012
- [j34]Nathan L. Binkert, Al Davis, Norman P. Jouppi, Moray McLaren, Naveen Muralimanohar, Robert Schreiber, Jung Ho Ahn:
Optical High Radix Switch Design. IEEE Micro 32(3): 100-109 (2012) - 2011
- [c26]Yves Robert, William J. Dally, Jack J. Dongarra, Satoshi Matsuoka, Robert Schreiber, Horst D. Simon, Uzi Vishkin:
Panel Statement. IPDPS 2011: 505 - [c25]Nathan L. Binkert, Al Davis, Norman P. Jouppi, Moray McLaren, Naveen Muralimanohar, Robert Schreiber, Jung Ho Ahn:
The role of optics in future high radix switch design. ISCA 2011: 437-448 - [p1]Jung Ho Ahn, Raymond G. Beausoleil, Nathan L. Binkert, Al Davis, Marco Fiorentino, Norman P. Jouppi, Moray McLaren, Matteo Monchiero, Naveen Muralimanohar, Robert Schreiber, Dana Vantrease:
CMOS Nanophotonics: Technology, System Implications, and a CMP Case Study. Low Power Networks-on-Chip 2011: 223-254 - 2009
- [c24]Dana Vantrease, Nathan L. Binkert, Robert Schreiber, Mikko H. Lipasti:
Light speed arbitration and flow control for nanophotonic interconnects. MICRO 2009: 304-315 - 2008
- [j32]Nina Mishra, Robert Schreiber, Isabelle Stanton, Robert Endre Tarjan:
Finding Strongly Knit Clusters in Social Networks. Internet Math. 5(1): 155-174 (2008) - [c23]Yunhong Zhou, Dennis M. Wilkinson, Robert Schreiber, Rong Pan:
Large-Scale Parallel Collaborative Filtering for the Netflix Prize. AAIM 2008: 337-348 - [c22]Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn:
Corona: System Implications of Emerging Nanophotonic Technology. ISCA 2008: 153-164 - [c21]Alina Ene, William G. Horne, Nikola Milosavljevic, Prasad Rao, Robert Schreiber, Robert Endre Tarjan:
Fast exact and heuristic methods for role minimization problems. SACMAT 2008: 1-10 - [c20]Bei Wang, Jeff M. Phillips, Robert Schreiber, Dennis M. Wilkinson:
Spatial Scan Statistics for Graph Clustering. SDM 2008: 727-738 - 2007
- [c18]Nina Mishra, Robert Schreiber, Isabelle Stanton, Robert Endre Tarjan:
Clustering Social Networks. WAW 2007: 56-67 - 2005
- [j30]Alain Darte, Robert Schreiber, Gilles Villard:
Lattice-Based Memory Allocation. IEEE Trans. Computers 54(10): 1242-1257 (2005) - [j29]Michael J. Schulte, Shuvra S. Bhattacharyya, Robert Schreiber:
Guest Editorial. J. VLSI Signal Process. 40(1): 5-6 (2005) - [c16]Alain Darte, Robert Schreiber:
A linear-time algorithm for optimal barrier placement. PPoPP 2005: 26-35 - 2004
- [j28]Ken Kennedy, Charles Koelbel, Robert Schreiber:
Defining and Measuring the Productivity of Programming Languages. Int. J. High Perform. Comput. Appl. 18(4): 441-448 (2004) - 2003
- [c15]Alain Darte, Robert Schreiber, Gilles Villard:
Lattice-based memory allocation. CASES 2003: 298-308 - 2002
- [j27]Vinod Kathail, Shail Aditya, Robert Schreiber, B. Ramakrishna Rau, Darren C. Cronquist, Mukund Sivaraman:
PICO: Automatically Designing Custom Computers. Computer 35(9): 39-47 (2002) - [j26]Alain Darte, Robert Schreiber, B. Ramakrishna Rau, Frédéric Vivien:
Constructing and exploiting linear schedules with prescribed parallelism. ACM Trans. Design Autom. Electr. Syst. 7(1): 159-172 (2002) - [j25]Robert Schreiber, Shail Aditya, Scott A. Mahlke, Vinod Kathail, B. Ramakrishna Rau, Darren C. Cronquist, Mukund Sivaraman:
PICO-NPA: High-Level Synthesis of Nonprogrammable Hardware Accelerators. J. VLSI Signal Process. 31(2): 127-142 (2002) - 2001
- [j24]Scott A. Mahlke, Rajiv A. Ravindran, Michael S. Schlansker, Robert Schreiber, Timothy Sherwood:
Bitwidth cognizant architecture synthesis of custom hardwareaccelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(11): 1355-1371 (2001) - 2000
- [c14]Robert Schreiber, Shail Aditya, B. Ramakrishna Rau, Vinod Kathail, Scott A. Mahlke, Santosh G. Abraham, Greg Snider:
High-Level Synthesis of Nonprogrammable Hardware Accelerators. ASAP 2000: 113- - [c13]Alain Darte, Robert Schreiber, B. Ramakrishna Rau, Frédéric Vivien:
A Constructive Solution to the Juggling Problem in Processor Array Synthesis. IPDPS 2000: 815-822 - 1997
- [j21]Robert Schreiber, Piyush Mehrotra:
High Performance Fortran Comes of Age: Guest Editors' Introduction. Sci. Program. 6(1): 1-2 (1997) - 1996
- [j20]Thomas J. Sheffler, Robert Schreiber, William W. Pugh, John R. Gilbert, Siddhartha Chatterjee:
Efficient Distribution Analysis via Graph Contraction. Int. J. Parallel Program. 24(6): 599-620 (1996) - [j19]Siddhartha Chatterjee, John R. Gilbert, Leonid Oliker, Robert Schreiber, Thomas J. Sheffler:
Algorithms for Automatic Alignment of Arrays. J. Parallel Distributed Comput. 38(2): 145-157 (1996) - 1995
- [j18]Siddhartha Chatterjee, John R. Gilbert, Fred J. E. Long, Robert Schreiber, Shang-Hua Teng:
Generating Local Address and Communication Sets for Data-Parallel Programs. J. Parallel Distributed Comput. 26(1): 72-84 (1995) - [j17]Siddhartha Chatterjee, John R. Gilbert, Robert Schreiber, Shang-Hua Teng:
Optimal Evaluation of Array Expressions on Massively Parallel Machines. ACM Trans. Program. Lang. Syst. 17(1): 123-156 (1995) - [c10]Thomas J. Sheffler, Robert Schreiber, William W. Pugh, John R. Gilbert, Siddhartha Chatterjee:
Efficient Distribution Analysis via Graph Contraction. LCPC 1995: 377-391 - 1994
- [c8]Siddhartha Chatterjee, Robert Schreiber, Thomas J. Sheffler, John R. Gilbert:
Array Distribution in Data-Parallel Programs. LCPC 1994: 76-91 - 1993
- [c6]Siddhartha Chatterjee, John R. Gilbert, Robert Schreiber:
The Alignment-Distribution Graph. LCPC 1993: 234-252 - [c5]Siddhartha Chatterjee, John R. Gilbert, Robert Schreiber, Shang-Hua Teng:
Automatic Array Alignment in Data-Parallel Programs. POPL 1993: 16-28 - [c4]Siddhartha Chatterjee, John R. Gilbert, Fred J. E. Long, Robert Schreiber, Shang-Hua Teng:
Generating Local Address and Communication Sets for Data-Parallel Programs. PPoPP 1993: 149-158 - [c3]Siddhartha Chatterjee, John R. Gilbert, Robert Schreiber:
Mobile and replicated alignment of arrays in data-parallel programs. SC 1993: 420-429 - 1992
- [j11]John R. Gilbert, Cleve Moler, Robert Schreiber:
Sparse Matrices in MATLAB: Design and Implementation. SIAM J. Matrix Anal. Appl. 13(1): 333-356 (1992) - [j10]John R. Gilbert, Robert Schreiber:
Highly Parallel Sparse Cholesky Factorization. SIAM J. Sci. Comput. 13(5): 1151-1172 (1992) - 1991
- [j9]David H. Bailey, Eric Barszcz, John T. Barton, D. S. Browning, Robert L. Carter, Leonardo Dagum, Rod A. Fatoohi, Paul O. Frederickson, T. A. Lasinski, Robert Schreiber, Horst D. Simon, V. Venkatakrishnan, Sisira Weeratunga:
The Nas Parallel Benchmarks. Int. J. High Perform. Comput. Appl. 5(3): 63-73 (1991) - [j8]John R. Gilbert, Robert Schreiber:
Optimal Expression Evaluation for Data Parallel Architectures. J. Parallel Distributed Comput. 13(1): 58-64 (1991) - [c2]John R. Gilbert, Robert Schreiber:
Optimal Data Placement for Distributed Memory Architectures. PPSC 1991: 462-471 - [c1]David H. Bailey, Eric Barszcz, John T. Barton, D. S. Browning, Robert L. Carter, Leonardo Dagum, Rod Fatoohi, Paul O. Frederickson, T. A. Lasinski, Robert Schreiber, Horst D. Simon, V. Venkatakrishnan, Sisira Weeratunga:
The NAS parallel benchmarks - summary and preliminary results. SC 1991: 158-165 - 1986
- [j3]Robert Schreiber, Wei-Pai Tang:
On On Systolic Arrays for Updating the Cholesky Factorization. BIT 26(4): 451-466 (1986)
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