Остановите войну!
for scientists:
default search action
Yoshinori Takeuchi
- > Home > Persons > Yoshinori Takeuchi
Publications
- 2019
- [j35]Salita Sombatsiri, Seiya Shibata, Yuki Kobayashi, Hiroaki Inoue, Takashi Takenaka, Takeo Hosomi, Jaehoon Yu, Yoshinori Takeuchi:
Parallelism-flexible Convolution Core for Sparse Convolutional Neural Networks on FPGA. IPSJ Trans. Syst. LSI Des. Methodol. 12: 22-37 (2019) - 2018
- [j34]Koichi Mitsunari, Yoshinori Takeuchi, Masaharu Imai, Jaehoon Yu:
Decomposed Vector Histograms of Oriented Gradients for Efficient Hardware Implementation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 101-A(11): 1766-1775 (2018) - [j33]Tomoki Sugiura, Jaehoon Yu, Yoshinori Takeuchi:
Phase Locking Value Calculator Based on Hardware-Oriented Mathematical Expression. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 101-A(12): 2254-2261 (2018) - 2017
- [j32]Yuuka Hirao, Yoshinori Takeuchi, Masaharu Imai, Jaehoon Yu:
Deformable Part Model Based Arrhythmia Detection Using Time Domain Features. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(11): 2221-2229 (2017) - [j31]Tomoki Sugiura, Masaharu Imai, Jaehoon Yu, Yoshinori Takeuchi:
A Low-Energy Application Specific Instruction-Set Processor towards a Low-Computational Lossless Compression Method for Stimuli Position Data of Artificial Vision Systems. J. Inf. Process. 25: 210-219 (2017) - [c75]Masaharu Imai, Yoshinori Takeuchi, Jun Ohta, Gregg Jørgen Suaning, Chung-Yu Wu, Napoleon Torres-Martinez:
Emerging technologies for biomedical applications: Artificial vision systems and brain machine interface. ASP-DAC 2017: 299 - [c74]Tomoki Sugiura, Jaehoon Yu, Yoshinori Takeuchi:
Hardware-oriented algorithm for phase synchronization analysis of biomedical signals. BioCAS 2017: 1-4 - [c73]Fumika Tanabe, Shusuke Yoshimoto, Yuki Noda, Teppei Araki, Takafumi Uemura, Yoshinori Takeuchi, Masaharu Imai, Tsuyoshi Sekitani:
Flexible sensor sheet for real-time pressure monitoring in artificial knee joint during total knee arthroplasty. EMBC 2017: 1591-1594 - 2016
- [c72]Tomoki Sugiura, Arif Ullah Khan, Jaehoon Yu, Yoshinori Takeuchi, Seiji Kameda, Takatsugu Kamata, Yuki Hayashida, Tetsuya Yagi, Masaharu Imai:
A programmable controller for spatio-temporal pattern stimulation of cortical visual prosthesis. BioCAS 2016: 432-435 - 2015
- [j30]Salita Sombatsiri, Yoshinori Takeuchi, Masaharu Imai:
An Efficient Performance Estimation Method for Configurable Multi-layer Bus-based SoC. IPSJ Trans. Syst. LSI Des. Methodol. 8: 26-37 (2015) - [c69]Tomoki Sugiura, Jaehoon Yu, Yoshinori Takeuchi, Masaharu Imai:
A low-energy ASIP with flexible exponential Golomb codec for lossless data compression toward artificial vision systems. BioCAS 2015: 1-4 - [c68]Yuki Hayashida, Yuichi Umehira, Kouki Takatani, Shigetoshi Futami, Seiji Kameda, Takatsugu Kamata, Arif Ullah Khan, Yoshinori Takeuchi, Masaharu Imai, Tetsuya Yagi:
Cortical neural excitations in rats in vivo with using a prototype of a wireless multi-channel microstimulation system. EMBC 2015: 1642-1645 - [c67]Toshiyo Tamura, Masaki Sekine, Zunyi Tang, Masaki Yoshida, Yoshinori Takeuchi, Masaharu Imai:
Preliminary study of a new home healthcare monitoring to prevent the recurrence of stroke. EMBC 2015: 5489-5492 - 2014
- [c66]Tomoki Sugiura, Shoko Nakatsuka, Jaehoon Yu, Yoshinori Takeuchi, Masaharu Imai:
An efficient data compression method for artificial vision systems and its low energy implementation using ASIP technology. BioCAS 2014: 81-84 - 2013
- [j29]Keishi Sakanushi, Takuji Hieda, Taichiro Shiraishi, Yasumasa Ode, Yoshinori Takeuchi, Masaharu Imai, Teruo Higashino, Hiroshi Tanaka:
Electronic triage system for continuously monitoring casualties at disaster scenes. J. Ambient Intell. Humaniz. Comput. 4(5): 547-558 (2013) - [c59]Shoko Nakatsuka, Takashi Hamabe, Yoshinori Takeuchi, Masaharu Imai:
An efficient lossless data compression method based on exponential-Golomb coding for biomedical information and its implementation using ASIP technology. BioCAS 2013: 382-385 - 2012
- [j26]Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
A Small-Area and Low-Power SoC for Less-Invasive Pressure Sensing Capsules in Ambulatory Urodynamic Monitoring. IEICE Trans. Electron. 95-C(4): 487-494 (2012) - [c55]Salita Sombatsiri, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
On-chip Communication Buffer Architecture Optimization Considering Bus Width. MCSoC 2012: 29-36 - [c54]Sho Ninomiya, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
Task Allocation and Scheduling for Voltage-Frequency Islands Applied NoC-based MPSoC Considering Network Congestion. MCSoC 2012: 107-112 - 2011
- [j22]Ittetsu Taniguchi, Ayataka Kobayashi, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
Two-Stage Configurable Decoder Model for Domain Specific FEC Decoder Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(12): 2659-2668 (2011) - [c53]Keishi Sakanushi, Takuji Hieda, Taichiro Shiraishi, Yasumasa Ode, Yoshinori Takeuchi, Masaharu Imai, Teruo Higashino, Hiroshi Tanaka:
Electronic Triage System: Casualties Monitoring System in the Disaster Scene. 3PGCIC 2011: 317-322 - [c52]Masaharu Imai, Yoshinori Takeuchi, Keishi Sakanushi, Hirofumi Iwato:
Biological information sensing technologies for medical, health care, and wellness applications. ASP-DAC 2011: 551-555 - [c50]Ittetsu Taniguchi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
Automated architecture exploration for low energy reconfigurable AGU. ISOCC 2011: 191-194 - 2010
- [j19]Masaharu Imai, Yoshinori Takeuchi, Keishi Sakanushi, Nagisa Ishiura:
Advantage and Possibility of Application-domain Specific Instruction-set Processor (ASIP). IPSJ Trans. Syst. LSI Des. Methodol. 3: 161-178 (2010) - [j18]Takahiro Kumura, Soichiro Taga, Nagisa Ishiura, Yoshinori Takeuchi, Masaharu Imai:
Software Development Tool Generation Method Suitable for Instruction Set Extension of Embedded Processors. IPSJ Trans. Syst. LSI Des. Methodol. 3: 207-221 (2010) - [j17]Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
A Low-power ASIP Generation Method by Extracting Minimum Execution Conditions. IPSJ Trans. Syst. LSI Des. Methodol. 3: 222-233 (2010) - [c49]Hiroaki Tanaka, Yutaka Ota, Nobu Matsumoto, Takuji Hieda, Yoshinori Takeuchi, Masaharu Imai:
A new compilation technique for SIMD code generation across basic block boundaries. ASP-DAC 2010: 101-106 - [c48]Ittetsu Taniguchi, Ayataka Kobayashi, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
Two-stage configurable decoder model for multiple forward error correction standards. ESTIMedia 2010: 114-120 - [c45]Hassan A. Youness, Abdel-Moniem Wahdan, Mohammed Hassan, Ashraf Salem, Mohammed Moness, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
Efficient partitioning technique on multiple cores based on optimal scheduling and mapping algorithm. ISCAS 2010: 3729-3732 - 2009
- [j14]Hassan A. Youness, Keishi Sakanushi, Yoshinori Takeuchi, Ashraf Salem, Abdel-Moniem Wahdan, Masaharu Imai:
Optimal Scheme for Search State Space and Scheduling on Multiprocessor Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(4): 1088-1095 (2009) - [j13]Ittetsu Taniguchi, Praveen Raghavan, Murali Jayapala, Francky Catthoor, Yoshinori Takeuchi, Masaharu Imai:
Reconfigurable AGU: An Address Generation Unit Based on Address Calculation Pattern for Low Energy and High Performance Embedded Processors. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(4): 1161-1173 (2009) - [j11]Takuji Hieda, Hiroaki Tanaka, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
Heuristic Instruction Scheduling Algorithm Using Available Distance for Partial Forwarding Processor. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(12): 3258-3267 (2009) - [c44]Ittetsu Taniguchi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
Systematic architecture exploration based on optimistic cycle estimation for low energy embedded processors. ASP-DAC 2009: 449-454 - 2007
- [j9]Hiroaki Tanaka, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai, Hiroki Tagawa, Yutaka Ota, Nobu Matsumoto:
Generation of Pack Instruction Sequence for Media Processors Using Multi-Valued Decision Diagram. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(12): 2800-2809 (2007) - [c38]Takeshi Shiro, Masaaki Abe, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
A Processor Generation Method from Instruction Behavior Description Based on Specification of Pipeline Stages and Functional Units. ASP-DAC 2007: 286-291 - [c37]Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
A low power VLIW processor generation method by means of extracting non-redundant activation conditions. CODES+ISSS 2007: 227-232 - [c36]Hiroaki Tanaka, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai, Shiro Kobayashi:
A Block-Floating-Point Processor for Rapid Application Development. ICASSP (2) 2007: 65-68 - [i1]M. Abdelsalam Hassan, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
RTK-Spec TRON: A Simulation Model of an ITRON Based RTOS Kernel in SystemC. CoRR abs/0710.4746 (2007) - 2006
- [c32]Kyoko Ueda, Atsushi Kosaka, Ryoichi Watanabe, Yoshinori Takeuchi, Takao Onoye, Yuichi Itoh, Yoshifumi Kitamura, Fumio Kishino:
m-ActiveCube; Multimedia Extension of Spatial Tangible User Interface. BioADIT 2006: 363-370 - [c31]Hiroaki Tanaka, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai, Yutaka Ota, Nobu Matsumoto, Masaki Nakagawa:
Pack instruction generation for media pUsing multi-valued decision diagram. CODES+ISSS 2006: 154-159 - [c29]Ittetsu Taniguchi, Kyoko Ueda, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
Task Partitioning Oriented Architecture Exploration Method for Dynamic Reconfigurable Architectures. VLSI-SoC 2006: 290-295 - [c28]Ittetsu Taniguchi, Keishi Sakanushi, Kyoko Ueda, Yoshinori Takeuchi, Masaharu Imai:
Dynamic Reconfigurable Architecture Exploration based on Parameterized Reconfigurable Processor Model. VLSI-SoC (Selected Papers) 2006: 357-376 - 2005
- [c27]M. Abdelsalam Hassan, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
Enabling RTOS simulation modeling in a system level design language. ASP-DAC 2005: 936-939 - [c26]M. Abdelsalam Hassan, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
RTK-Spec TRON: A Simulation Model of an ITRON Based RTOS Kernel in SystemC. DATE 2005: 554-559 - 2004
- [c24]Yuki Kobayashi, Shinsuke Kobayashi, Koji Okuda, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
Synthesizable HDL generation method for configurable VLIW processors. ASP-DAC 2004: 842-845 - [c23]Kyoko Ueda, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
Architecture-Level Performance Estimation for IP-Based Embedded Systems. DATE 2004: 1002-1007 - [c21]H. M. AbdElSalam, Shinsuke Kobayashi, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
Towards a Higher Level of Abstraction in Hardware/Software Co-Simulation. ICDCS Workshops 2004: 824-830 - [c20]Yohei Ishimaru, Keishi Sakanushi, Shinsuke Kobayashi, Yoshinori Takeuchi, Masaharu Imai:
S-sequence: a new floorplan representation method preserving room abutment relationships. ISCAS (4) 2004: 505-508 - 2003
- [c17]Shinsuke Kobayashi, Kentaro Mita, Yoshinori Takeuchi, Masaharu Imai:
Rapid prototyping of JPEG encoder using the ASIP development system: PEAS-III. ICASSP (2) 2003: 485-488 - [c16]Shinsuke Kobayashi, Kentaro Mita, Yoshinori Takeuchi, Masaharu Imai:
Rapid prototyping of JPEG encoder using the ASIP development system: PEAS-III. ICME 2003: 149-152 - [c14]Hiroaki Tanaka, Shinsuke Kobayashi, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai:
A Code Selection Method for SIMD Processors with PACK Instructions. SCOPES 2003: 66-80 - 2002
- [j3]Morgan Hirosuke Miki, Mamoru Sakamoto, Shingo Miyamoto, Yoshinori Takeuchi, Toyohiko Yoshida, Isao Shirakawa:
Code Efficiency Evaluation for Embedded Processors. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(4): 811-818 (2002) - [j2]Shinsuke Kobayashi, Kentaro Mita, Yoshinori Takeuchi, Masaharu Imai:
A Compiler Generation Method for HW/SW Codesign Based on Configurable Processors. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(12): 2586-2595 (2002) - [c13]Shinsuke Kobayashi, Kentaro Mita, Yoshinori Takeuchi, Masaharu Imai:
Design space exploration for DSP applications using the ASIP development system PEAS-III. ICASSP 2002: 3168-3171 - [c12]Akira Kitajima, Toshiyuki Sasaki, Yoshinori Takeuchi, Masaharu Imai:
Design of Application Specific CISC Using PEAS-III. IEEE International Workshop on Rapid System Prototyping 2002: 12-17 - 2001
- [c11]Akira Kitajima, Makiko Itoh, Jun Sato, Akichika Shiomi, Yoshinori Takeuchi, Masaharu Imai:
Effectiveness of the ASIP design system PEAS-III in design of pipelined processors. ASP-DAC 2001: 649-654 - [c10]Hideki Yamauchi, Yoshinori Takeuchi, Masaharu Imai:
VLSI Implementation of Fractal Image Compression Processor for Moving Pictures. EUROMICRO 2001: 400-409 - [c9]Morgan Hirosuke Miki, Mamoru Sakamoto, Shingo Miyamoto, Yoshinori Takeuchi, Toyohiko Yoshida, Isao Shirakawa:
Evaluation of processor code efficiency for embedded systems. ICS 2001: 229-235 - 2000
- [c6]Makiko Itoh, Shigeaki Higaki, Yoshinori Takeuchi, Akira Kitajima, Masaharu Imai, Jun Sato, Akichika Shiomi:
PEAS-III: An ASIP Design Environment. ICCD 2000: 430-436 - 1999
- [c4]Eiichirou Shigehara, Yoshinori Takeuchi, Masaharu Imai, Tsutomu Kimura:
Application of FHM-Based Design Method to Scalable 2-D DCT Processor. EUROMICRO 1999: 1406-1409 - [c3]Takafumi Morifuji, Yoshinori Takeuchi, Masaharu Imai:
A programmable processor with multiple functional units and banked registers for general purpose numerical processing. ICASSP 1999: 1985-1988 - 1998
- [c2]Nguyen-Ngoc Bình, Masaharu Imai, Yoshinori Takeuchi:
A Performance Maximization Algorithm to Design ASIPs under the Constraint of Chip Area Including RAM and ROM Sizes. ASP-DAC 1998: 367-372
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from , , and to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2023-10-01 22:31 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint