Artur Chojnacki
Lech Józwiak
Artur Chojnacki
Aleksander Slusarczyk
High-Quality Circuit Synthesis for Modern Technologies.
168-173
2008
ISQED
https://doi.org/10.1109/ISQED.2008.4479720
https://doi.ieeecomputersociety.org/10.1109/ISQED.2008.37
conf/isqed/2008
db/conf/isqed/isqed2008.html#JozwiakCS08
Lech Józwiak
Szymon Bieganski
Artur Chojnacki
Information-driven circuit synthesis with the pre-characterized gate libraries.
405-423
2005
51
J. Syst. Archit.
6-7
https://doi.org/10.1016/j.sysarc.2004.07.003
db/journals/jsa/jsa51.html#JozwiakBC05
Lech Józwiak
Aleksander Slusarczyk
Artur Chojnacki
Fast and compact sequential circuits for the FPGA-based reconfigurable systems.
227-246
2003
49
J. Syst. Archit.
4-6
https://doi.org/10.1016/S1383-7621(03)00070-5
db/journals/jsa/jsa49.html#JozwiakSC03
Lech Józwiak
Artur Chojnacki
Effective and efficient FPGA synthesis through general functional decomposition.
247-265
2003
49
J. Syst. Archit.
4-6
https://doi.org/10.1016/S1383-7621(03)00071-7
db/journals/jsa/jsa49.html#JozwiakC03
Lech Józwiak
Szymon Bieganski
Artur Chojnacki
Information-driven Library-based Circuit Synthesis.
148-157
2003
conf/dsd/2003
DSD
https://doi.org/10.1109/DSD.2003.1231917
https://doi.ieeecomputersociety.org/10.1109/DSD.2003.1231917
db/conf/dsd/dsd2003.html#JozwiakBC03
Lech Józwiak
Artur Chojnacki
High-quality sub-function construction in functional decomposition based on information relationship measures.
383-390
2001
conf/date/2001
DATE
https://doi.org/10.1109/DATE.2001.915053
https://doi.ieeecomputersociety.org/10.1109/DATE.2001.915053
http://dl.acm.org/citation.cfm?id=367279
db/conf/date/date2001.html#JozwiakC01
Lech Józwiak
Artur Chojnacki
Effective and Efficient FPGA Synthesis through Functional Decomposition Based on Information Relationship Measures.
30-37
2001
conf/dsd/2001
DSD
https://doi.org/10.1109/DSD.2001.952114
https://doi.ieeecomputersociety.org/10.1109/DSD.2001.952114
db/conf/dsd/dsd2001.html#JozwiakC01
Lech Józwiak
Artur Chojnacki
Aleksander Slusarczyk
Fast and Compact Sequential Circuits through the Information-Driven Circuit Synthesis.
46-53
2001
conf/dsd/2001
DSD
https://doi.org/10.1109/DSD.2001.952116
https://doi.ieeecomputersociety.org/10.1109/DSD.2001.952116
db/conf/dsd/dsd2001.html#JozwiakCS01
Artur Chojnacki
Lech Józwiak
High-quality FPGA Designs through Functional Decomposition with Sub-function Input Support Selection Based on Information Relationship Measures.
409-414
2001
conf/isqed/2001
ISQED
https://doi.org/10.1109/ISQED.2001.915264
https://doi.ieeecomputersociety.org/10.1109/ISQED.2001.915264
db/conf/isqed/isqed2001.html#ChojnackiJ01
Artur Chojnacki
Lech Józwiak
Multi-Valued Sub-Function Encoding in Functional Decomposition Based on Information Relationships Measures.
83-90
2000
conf/ismvl/2000
ISMVL
https://doi.org/10.1109/ISMVL.2000.848604
https://doi.ieeecomputersociety.org/10.1109/ISMVL.2000.848604
db/conf/ismvl/ismvl2000.html#ChojnackiJ00
Lech Józwiak
Artur Chojnacki
Functional Decomposition based on Information Relationship Measures Extremely Effective and Efficient for Symmetric Functions.
1150-1160
1999
conf/euromicro/1999
EUROMICRO
https://doi.org/10.1109/EURMIC.1999.794461
https://doi.ieeecomputersociety.org/10.1109/EURMIC.1999.794461
db/conf/euromicro/euromicro1999.html#JozwiakC99
Mariusz Rawski
Tadeusz Luba
Lech Józwiak
Artur Chojnacki
Efficient Logic Synthesis for FPGAs with Functional Decomposition Based on Information Relationship Measure.
10008-10015
1998
conf/euromicro/1998
EUROMICRO
https://doi.org/10.1109/EURMIC.1998.711767
https://doi.ieeecomputersociety.org/10.1109/EURMIC.1998.711767
db/conf/euromicro/euromicro1998.html#RawskiLJC98
Mariusz Rawski
Lech Józwiak
Artur Chojnacki
Application of the Information Measures to Input Support Selection in Functional Decomposition.
573-580
1998
conf/rsctc/1998
Rough Sets and Current Trends in Computing
https://doi.org/10.1007/3-540-69115-4_79
db/conf/rsctc/rsctc1998.html#RawskiJC98
Szymon Bieganski
Lech Józwiak
Tadeusz Luba
Mariusz Rawski
Aleksander Slusarczyk