John Dielissen
John Dielissen
Nur Engin
Sergei Sawitzki
Kees van Berkel 0001
Multistandard FEC Decoders for Wireless Devices.
284-288
2008
55-II
IEEE Trans. Circuits Syst. II Express Briefs
3
https://doi.org/10.1109/TCSII.2008.918964
db/journals/tcas/tcasII55.html#DielissenESB08
John Dielissen
Andries Hekstra
Non-fractional parallelism in LDPC decoder implementations.
337-342
2007
conf/date/2007
DATE
https://doi.org/10.1109/DATE.2007.364614
https://doi.ieeecomputersociety.org/10.1109/DATE.2007.364614
http://dl.acm.org/citation.cfm?id=1266438
db/conf/date/date2007.html#DielissenH07
John Dielissen
Andries Hekstra
Vincent Berg
Low cost LDPC decoder for DVB-S2.
130-135
2006
conf/date/2006
DATE Designers' Forum
https://doi.org/10.1109/DATE.2006.243816
https://doi.ieeecomputersociety.org/10.1109/DATE.2006.243816
http://dl.acm.org/citation.cfm?id=1131382
db/conf/date/date2006.html#DielissenHB06
Kees Goossens
John Dielissen
Andrei Radulescu
Æthereal Network on Chip: Concepts, Architectures, and Implementations.
414-421
2005
22
IEEE Des. Test Comput.
5
https://doi.org/10.1109/MDT.2005.99
http://doi.ieeecomputersociety.org/10.1109/MDT.2005.99
db/journals/dt/dt22.html#GoossensDR05
Andrei Radulescu
John Dielissen
Santiago González Pestana
Om Prakash Gangwal
Edwin Rijpkema
Paul Wielage
Kees Goossens
An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration.
4-17
2005
24
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
1
https://doi.org/10.1109/TCAD.2004.839493
db/journals/tcad/tcad24.html#RadulescuDPGRWG05
Kees Goossens
John Dielissen
Om Prakash Gangwal
Santiago González Pestana
Andrei Radulescu
Edwin Rijpkema
A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification.
1182-1187
2005
conf/date/2005
DATE
https://doi.org/10.1109/DATE.2005.11
https://doi.ieeecomputersociety.org/10.1109/DATE.2005.11
http://dl.acm.org/citation.cfm?id=1049296
db/conf/date/date2005.html#GoossensDGPRR05
Mauro Cocco
John Dielissen
Marc J. M. Heijligers
Andries Hekstra
Jos Huisken
A Scalable Architecture for LDPC Decodin.
88-95
2004
conf/date/2004
DATE
https://doi.org/10.1109/DATE.2004.1269212
https://doi.ieeecomputersociety.org/10.1109/DATE.2004.1269212
http://dl.acm.org/citation.cfm?id=969270
db/conf/date/date2004-df.html#CoccoDHHH04
Andrei Radulescu
John Dielissen
Kees Goossens
Edwin Rijpkema
Paul Wielage
An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration.
878-883
2004
conf/date/2004
DATE
https://doi.org/10.1109/DATE.2004.1268998
https://doi.ieeecomputersociety.org/10.1109/DATE.2004.1268998
http://dl.acm.org/citation.cfm?id=969205
db/conf/date/date2004-2.html#RadulescuDGRW04
Bart Vermeulen
John Dielissen
Kees Goossens
Calin Ciordas
Bringing communication networks on a chip: test and verification implications.
74-81
2003
41
IEEE Commun. Mag.
9
https://doi.org/10.1109/MCOM.2003.1232240
db/journals/cm/cm41.html#VermeulenDGC03
Edwin Rijpkema
Kees G. W. Goossens
Andrei Radulescu
John Dielissen
Jef L. van Meerbergen
Paul Wielage
Erwin Waterlander
Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip.
10350-10355
2003
conf/date/2003
DATE
https://doi.ieeecomputersociety.org/10.1109/DATE.2003.10100
http://dl.acm.org/citation.cfm?id=1022751
db/conf/date/date2003.html#RijpkemaGRDMWW03
Kees Goossens
John Dielissen
Jef L. van Meerbergen
Peter Poplavko
Andrei Radulescu
Edwin Rijpkema
Erwin Waterlander
Paul Wielage
Guaranteeing the Quality of Services in Networks on Chip.
61-82
2003
Networks on Chip
https://doi.org/10.1007/0-306-48727-6_4
books/sp/03/JT2003
db/books/collections/JT2003.html#GoossensDMPRRWW03
John Dielissen
Benito Otero Mathijssen
Jos Huisken
Breaking an application specific instruction-set processor: the first step towards embedded software testing.
89-92
2002
HLDVT
https://doi.org/10.1109/HLDVT.2002.1224434
https://doi.ieeecomputersociety.org/10.1109/HLDVT.2002.1224434
conf/hldvt/2002
db/conf/hldvt/hldvt2002.html#DielissenMH02
John Dielissen
Jef L. van Meerbergen
Marco Bekooij
Françoise Harmsze
Sergej Sawitzki
Jos Huisken
Albert van der Werf
Power-efficient layered turbo decoder processor.
246-251
2001
conf/date/2001
DATE
https://doi.org/10.1109/DATE.2001.915033
https://doi.ieeecomputersociety.org/10.1109/DATE.2001.915033
http://dl.acm.org/citation.cfm?id=367201
db/conf/date/date2001.html#DielissenMBHSHW01
Marco Bekooij
Vincent Berg
Kees van Berkel 0001
Calin Ciordas
Mauro Cocco
Nur Engin
Om Prakash Gangwal
Kees GoossensKees G. W. Goossens
Françoise Harmsze
Marc J. M. Heijligers
Andries Hekstra
Jos Huisken
Benito Otero Mathijssen
Jef L. van Meerbergen
Santiago González Pestana
Peter Poplavko
Andrei Radulescu
Edwin Rijpkema
Sergei SawitzkiSergej Sawitzki
Bart Vermeulen
Erwin Waterlander
Albert van der Werf
Paul Wielage