Mohamed I. Elmasry
Mohammad Ibrahim Elmasry
Salam I. Nachawi
Vincent C. Gaudet
Mohamed I. Elmasry
A Teaching Assistant for Microelectronic Circuits Problems.
1-5
2021
IISA
https://doi.org/10.1109/IISA52424.2021.9555515
conf/iisa/2021
db/conf/iisa/iisa2021.html#NachawiGE21
Assem S. Hussein
Mohamed I. Elmasry
Vincent C. Gaudet
On the Fault Tolerance of Stochastic Decoders.
219-223
2017
ISMVL
https://doi.org/10.1109/ISMVL.2017.50
https://doi.ieeecomputersociety.org/10.1109/ISMVL.2017.50
conf/ismvl/2017
db/conf/ismvl/ismvl2017.html#HusseinEG17
Assem S. Hussein
Vincent C. Gaudet
Hassan Mostafa
Mohamed I. Elmasry
A 16-bit high-speed low-power hybrid adder.
313-316
2016
ICM
https://doi.org/10.1109/ICM.2016.7847878
conf/icm2/2016
db/conf/icm2/icm2016.html#HusseinGME16
Hassan Mostafa
Mohab Anis
Mohamed I. Elmasry
Negative capacitance circuits for process variations compensation and timing yield improvement.
1-4
2014
CCECE
https://doi.org/10.1109/CCECE.2014.6900929
conf/ccece/2014
db/conf/ccece/ccece2014.html#MostafaAE14
Hassan Mostafa
Mohab Anis
Mohamed I. Elmasry
Statistical SRAM Read Access Yield Improvement Using Negative Capacitance Circuits.
92-101
2013
21
IEEE Trans. Very Large Scale Integr. Syst.
1
https://doi.org/10.1109/TVLSI.2011.2178046
db/journals/tvlsi/tvlsi21.html#MostafaAE13
Hassan Mostafa
Mohab Anis
Mohamed I. Elmasry
Negative capacitance circuits for process variations compensation and timing yield improvement.
277-280
2013
ICECS
https://doi.org/10.1109/ICECS.2013.6815408
conf/icecsys/2013
db/conf/icecsys/icecsys2013.html#MostafaAE13
Hassan Mostafa
Mohab Anis
Mohamed I. Elmasry
On-Chip Process Variations Compensation Using an Analog Adaptive Body Bias (A-ABB).
770-774
2012
20
IEEE Trans. Very Large Scale Integr. Syst.
4
https://doi.org/10.1109/TVLSI.2011.2107583
db/journals/tvlsi/tvlsi20.html#MostafaAE12
Hassan Mostafa
Mohab Anis
Mohamed I. Elmasry
Novel Timing Yield Improvement Circuits for High-Performance Low-Power Wide Fan-In Dynamic OR Gates.
1785-1797
2011
58-I
IEEE Trans. Circuits Syst. I Regul. Pap.
8
https://doi.org/10.1109/TCSI.2011.2107171
db/journals/tcas/tcasI58.html#MostafaAE11
Hassan Mostafa
Mohab Anis
Mohamed I. Elmasry
Adaptive Body Bias for Reducing the Impacts of NBTI and Process Variations on 6T SRAM Cells.
2859-2871
2011
58-I
IEEE Trans. Circuits Syst. I Regul. Pap.
12
https://doi.org/10.1109/TCSI.2011.2158708
db/journals/tcas/tcasI58.html#MostafaAE11a
Hassan Mostafa
Mohab Anis
Mohamed I. Elmasry
Analytical Soft Error Models Accounting for Die-to-Die and Within-Die Variations in Sub-Threshold SRAM Cells.
182-195
2011
19
IEEE Trans. Very Large Scale Integr. Syst.
2
https://doi.org/10.1109/TVLSI.2009.2033697
db/journals/tvlsi/tvlsi19.html#MostafaAE11
Hassan Mostafa
Mohab Anis
Mohamed I. Elmasry
A Novel Low Area Overhead Direct Adaptive Body Bias (D-ABB) Circuit for Die-to-Die and Within-Die Variations Compensation.
1848-1860
2011
19
IEEE Trans. Very Large Scale Integr. Syst.
10
https://doi.org/10.1109/TVLSI.2010.2060503
db/journals/tvlsi/tvlsi19.html#MostafaAE11a
Hassan Mostafa
Mohab Anis
Mohamed I. Elmasry
A Bias-Dependent Model for the Impact of Process Variations on the SRAM Soft Error Immunity.
2130-2134
2011
19
IEEE Trans. Very Large Scale Integr. Syst.
11
https://doi.org/10.1109/TVLSI.2010.2068317
db/journals/tvlsi/tvlsi19.html#MostafaAE11b
Mohammed El-Abd
Hassan Hassan 0001
Mohab Anis
Mohamed S. Kamel
Mohamed I. Elmasry
Discrete cooperative particle swarm optimization for FPGA placement.
284-295
2010
10
Appl. Soft Comput.
1
https://doi.org/10.1016/j.asoc.2009.07.011
db/journals/asc/asc10.html#El-AbdHAKE10
Ahmed Youssef
Zhen Yang 0006
Mohab Anis
Shawki Areibi
Anthony Vannelli
Mohamed I. Elmasry
A Power-Efficient Multipin ILP-Based Routing Technique.
225-235
2010
57-I
IEEE Trans. Circuits Syst. I Regul. Pap.
1
https://doi.org/10.1109/TCSI.2009.2015602
db/journals/tcas/tcasI57.html#YoussefYAAVE10
Hassan Mostafa
Mohab Anis
Mohamed I. Elmasry
A Design-Oriented Soft Error Rate Variation Model Accounting for Both Die-to-Die and Within-Die Variations in Submicrometer CMOS SRAM Cells.
1298-1311
2010
57-I
IEEE Trans. Circuits Syst. I Regul. Pap.
6
https://doi.org/10.1109/TCSI.2009.2033528
db/journals/tcas/tcasI57.html#MostafaAE10
Ahmed Youssef
Mohamed Zahran 0001
Mohab Anis
Mohamed I. Elmasry
On the Power Management of Simultaneous Multithreading Processors.
1243-1248
2010
18
IEEE Trans. Very Large Scale Integr. Syst.
8
https://doi.org/10.1109/TVLSI.2009.2020727
db/journals/tvlsi/tvlsi18.html#YoussefZAE10
Hassan Mostafa
Mohab Anis
Mohamed I. Elmasry
Comparative analysis of power yield improvement under process variation of sub-threshold flip-flops.
1739-1742
2010
ISCAS
https://doi.org/10.1109/ISCAS.2010.5537544
conf/iscas/2010
db/conf/iscas/iscas2010.html#MostafaAE10
Hassan Mostafa
Mohab Anis
Mohamed I. Elmasry
Statistical timing yield improvement of dynamic circuits using negative capacitance technique.
1747-1750
2010
ISCAS
https://doi.org/10.1109/ISCAS.2010.5537560
conf/iscas/2010
db/conf/iscas/iscas2010.html#MostafaAE10a
Kambiz K. Moez
Mohamed I. Elmasry
A New Loss Compensation Technique for CMOS Distributed Amplifiers.
185-189
2009
56-II
IEEE Trans. Circuits Syst. II Express Briefs
3
https://doi.org/10.1109/TCSII.2009.2015362
db/journals/tcas/tcasII56.html#MoezE09
Hassan Hassan 0001
Mohab Anis
Mohamed I. Elmasry
Total Power Modeling in FPGAs Under Spatial Correlation.
578-582
2009
17
IEEE Trans. Very Large Scale Integr. Syst.
4
https://doi.org/10.1109/TVLSI.2008.2005307
db/journals/tvlsi/tvlsi17.html#HassanAE09
Hassan Mostafa
Mohab Anis
Mohamed I. Elmasry
Comparative Analysis of Timing Yield Improvement under Process Variations of Flip-Flops Circuits.
133-138
2009
ISVLSI
https://doi.org/10.1109/ISVLSI.2009.23
https://doi.ieeecomputersociety.org/10.1109/ISVLSI.2009.23
conf/isvlsi/2009
db/conf/isvlsi/isvlsi2009.html#MostafaAE09
Ayman H. Ismail
Mohamed I. Elmasry
A 6-Bit 1.6-GS/sLow-Power Wideband Flash ADC Converter in 0.13-µm CMOS Technology.
1982-1990
2008
43
IEEE J. Solid State Circuits
9
https://doi.org/10.1109/JSSC.2008.2001936
db/journals/jssc/jssc43.html#IsmailE08
Hassan Hassan 0001
Mohab Anis
Mohamed I. Elmasry
Input Vector Reordering for Leakage Power Reduction in FPGAs.
1555-1564
2008
27
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
9
https://doi.org/10.1109/TCAD.2008.927673
db/journals/tcad/tcad27.html#HassanAE08
Kambiz K. Moez
Mohamed I. Elmasry
A Low-Noise CMOS Distributed Amplifier for Ultra-Wide-Band Applications.
126-130
2008
55-II
IEEE Trans. Circuits Syst. II Express Briefs
2
https://doi.org/10.1109/TCSII.2007.910968
db/journals/tcas/tcasII55.html#MoezE08
Ayman H. Ismail
Mohamed I. Elmasry
Analysis of the Flash ADC Bandwidth-Accuracy Tradeoff in Deep-Submicron CMOS Technologies.
1001-1005
2008
55-II
IEEE Trans. Circuits Syst. II Express Briefs
10
https://doi.org/10.1109/TCSII.2008.2001979
db/journals/tcas/tcasII55.html#IsmailE08
Ahmed Youssef
Mohab Anis
Mohamed I. Elmasry
A Comparative Study Between Static and Dynamic Sleep Signal Generation Techniques for Leakage Tolerant Designs.
1114-1126
2008
16
IEEE Trans. Very Large Scale Integr. Syst.
9
https://doi.org/10.1109/TVLSI.2008.2000730
db/journals/tvlsi/tvlsi16.html#YoussefAE08
Hassan Hassan 0001
Mohab Anis
Mohamed I. Elmasry
A Timing-Driven Algorithm for Leakage Reduction in MTCMOS FPGAs.
678-683
2007
conf/aspdac/2007
ASP-DAC
https://doi.org/10.1109/ASPDAC.2007.358065
https://doi.ieeecomputersociety.org/10.1109/ASPDAC.2007.358065
http://dl.acm.org/citation.cfm?id=1323485
db/conf/aspdac/aspdac2007.html#HassanAE07
Ahmed Youssef
Tor Myklebust
Mohab Anis
Mohamed I. Elmasry
A Low-Power Multi-Pin Maze Routing Methodology.
153-158
2007
conf/isqed/2007
ISQED
https://doi.org/10.1109/ISQED.2007.15
https://doi.ieeecomputersociety.org/10.1109/ISQED.2007.15
db/conf/isqed/isqed2007.html#YoussefMAE07
Kambiz K. Moez
Mohamed I. Elmasry
A 10dB 44GHz Loss-Compensated CMOS Distributed Amplifier.
548-621
2007
ISSCC
https://doi.org/10.1109/ISSCC.2007.373537
conf/isscc/2007
db/conf/isscc/isscc2007.html#MoezE07
Hassan Hassan 0001
Mohab Anis
Mohamed I. Elmasry
Impact of technology scaling and process variations on RF CMOS devices.
275-282
2006
37
Microelectron. J.
4
https://doi.org/10.1016/j.mejo.2005.07.013
db/journals/mj/mj37.html#HassanAE06
Hassan Hassan 0001
Mohab Anis
Mohamed I. Elmasry
Low-power multi-threshold MCML: Analysis, design, and variability.
1097-1104
2006
37
Microelectron. J.
10
https://doi.org/10.1016/j.mejo.2006.03.009
db/journals/mj/mj37.html#HassanAE06a
Kambiz K. Moez
Mohamed I. Elmasry
Lumped-element analysis and design of CMOS distributed amplifiers with image impedance termination.
1136-1145
2006
37
Microelectron. J.
10
https://doi.org/10.1016/j.mejo.2006.04.012
db/journals/mj/mj37.html#MoezE06
Kambiz K. Moez
Mohamed I. Elmasry
A 10-GHz 15-dB four-stage distributed amplifier in 0.18 µm CMOS process.
405-409
2006
conf/date/2006p
DATE
https://doi.org/10.1109/DATE.2006.243766
https://doi.ieeecomputersociety.org/10.1109/DATE.2006.243766
http://dl.acm.org/citation.cfm?id=1131590
db/conf/date/date2006p.html#MoezE06
Ayman H. Ismail
Mohamed I. Elmasry
A termination technique for the averaging network of flash ADC's.
2006
conf/iscas/2006
ISCAS
https://doi.org/10.1109/ISCAS.2006.1693336
db/conf/iscas/iscas2006.html#IsmailE06
Kambiz K. Moez
Mohammad Ibrahim Elmasry
A novel loss compensation technique for broadband CMOS distributed amplifiers.
2006
conf/iscas/2006
ISCAS
https://doi.org/10.1109/ISCAS.2006.1692915
db/conf/iscas/iscas2006.html#MoezE06
Ahmed Youssef
Mohab Anis
Mohamed I. Elmasry
Dynamic Standby Prediction for Leakage Tolerant Microprocessor Functional Units.
371-384
2006
conf/micro/2006
MICRO
https://doi.org/10.1109/MICRO.2006.22
https://doi.ieeecomputersociety.org/10.1109/MICRO.2006.22
http://dl.acm.org/citation.cfm?id=1194864
db/conf/micro/micro2006.html#YoussefAE06
Hassan Hassan 0001
Mohab Anis
Mohamed I. Elmasry
Design and optimization of MOS current mode logic for parameter variations.
417-437
2005
38
Integr.
3
https://doi.org/10.1016/j.vlsi.2004.07.014
db/journals/integration/integration38.html#HassanAE05
Dalia A. El-Dib
Mohamed I. Elmasry
Memoryless Viterbi decoder.
826-830
2005
52-II
IEEE Trans. Circuits Syst. II Express Briefs
12
https://doi.org/10.1109/TCSII.2005.853892
db/journals/tcas/tcasII52.html#El-DibE05
Ahmed Youssef
Mohab Anis
Mohamed I. Elmasry
POMR: a power-aware interconnect optimization methodology.
297-307
2005
13
IEEE Trans. Very Large Scale Integr. Syst.
3
https://doi.org/10.1109/TVLSI.2004.842901
db/journals/tvlsi/tvlsi13.html#YoussefAE05
Hassan Hassan 0001
Mohab Anis
Mohamed I. Elmasry
MOS current mode circuits: analysis, design, and variability.
885-898
2005
13
IEEE Trans. Very Large Scale Integr. Syst.
8
https://doi.org/10.1109/TVLSI.2005.853609
db/journals/tvlsi/tvlsi13.html#HassanAE05
Hassan Hassan 0001
Mohab Anis
Antoine El Daher
Mohamed I. Elmasry
Activity Packing in FPGAs for Leakage Power Reduction.
212-217
2005
conf/date/2005
DATE
https://doi.org/10.1109/DATE.2005.48
https://doi.ieeecomputersociety.org/10.1109/DATE.2005.48
http://dl.acm.org/citation.cfm?id=1049102
db/conf/date/date2005.html#HassanADE05
Hassan Hassan 0001
Mohab Anis
Mohamed I. Elmasry
A leakage-aware CAD flow for MTCMOS FPGA architectures (abstract only).
267
2005
conf/fpga/2005
FPGA
https://doi.org/10.1145/1046192.1046237
db/conf/fpga/fpga2005.html#HassanAE05
Hassan Hassan 0001
Mohab Anis
Mohamed I. Elmasry
LAP: a logic activity packing methodology for leakage power-tolerant FPGAs.
257-262
2005
conf/islped/2005
ISLPED
https://doi.org/10.1145/1077603.1077664
db/conf/islped/islped2005.html#HassanAE05
Payam Ghafari
Ehsan Mirhadi
Mohab Anis
Shawki Areibi
Mohamed I. Elmasry
A Low-Power Partitioning Methodology by Maximizing Sleep Time and Minimizing Cut Nets.
368-371
2005
conf/iwsoc/2005
IWSOC
https://doi.org/10.1109/IWSOC.2005.15
https://doi.ieeecomputersociety.org/10.1109/IWSOC.2005.15
db/conf/iwsoc/iwsoc2005.html#GhafariMAAE05
Dalia A. El-Dib
Mohamed I. Elmasry
Modified register-exchange Viterbi decoder for low-power wireless communications.
371-378
2004
51-I
IEEE Trans. Circuits Syst. I Regul. Pap.
2
https://doi.org/10.1109/TCSI.2003.822396
db/journals/tcas/tcasI51.html#El-DibE04
Ayman ElSayed
Mohamed I. Elmasry
Phase-domain fractional-N frequency synthesizers.
440-449
2004
51-I
IEEE Trans. Circuits Syst. I Regul. Pap.
3
https://doi.org/10.1109/TCSI.2003.820241
db/journals/tcas/tcasI51.html#ElSayedE04
Hassan Hassan 0001
Mohab Anis
Mohamed I. Elmasry
Design and optimization of MOS current mode logic for parameter variations.
33-38
2004
conf/glvlsi/2004
ACM Great Lakes Symposium on VLSI
https://doi.org/10.1145/988952.988961
db/conf/glvlsi/glvlsi2004.html#HassanAE04
Kambiz K. Moez
Mohammad Ibrahim Elmasry
A novel matrix-based lumped-element analysis method for CMOS distributed amplifiers.
1048-1051
2004
conf/iscas/2004
ISCAS (1)
https://doi.org/10.1109/ISCAS.2004.1328378
db/conf/iscas/iscas2004-1.html#MoezE04
Hassan Hassan 0001
Mohab Anis
Mohamed I. Elmasry
Analysis and design of low-power multi-threshold MCML.
25-29
2004
SoCC
https://doi.org/10.1109/SOCC.2004.1362338
conf/socc/2004
db/conf/socc/socc2004.html#HassanAE04
Ayman H. Ismail
Mohamed I. Elmasry
Analog-to-digital conversion for SONET OC-192.
41-44
2004
SoCC
https://doi.org/10.1109/SOCC.2004.1362344
conf/socc/2004
db/conf/socc/socc2004.html#IsmailE04
Ahmed Youssef
Mohab Anis
Mohamed I. Elmasry
POMR: a power-optimal maze routing methodology.
73-77
2004
SoCC
https://doi.org/10.1109/SOCC.2004.1362355
conf/socc/2004
db/conf/socc/socc2004.html#YoussefAE04
Hassan Hassan 0001
Mohab Anis
Mohamed I. Elmasry
Impact of technology scaling on RF CMOS.
97-101
2004
SoCC
https://doi.org/10.1109/SOCC.2004.1362363
conf/socc/2004
db/conf/socc/socc2004.html#HassanAE04a
Hassan Hassan 0001
Mohab Anis
Mohamed I. Elmasry
MOS current mode logic: design, optimization, and variability.
247-250
2004
SoCC
https://doi.org/10.1109/SOCC.2004.1362424
conf/socc/2004
db/conf/socc/socc2004.html#HassanAE04b
Mohab Anis
Shawki Areibi
Mohamed I. Elmasry
Design and optimization of multithreshold CMOS (MTCMOS) circuits.
1324-1342
2003
22
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
10
https://doi.org/10.1109/TCAD.2003.818127
db/journals/tcad/tcad22.html#AnisAE03
Amr M. Fahim
Mohamed I. Elmasry
A wideband sigma-delta phase-locked-loop modulator for wireless applications.
53-62
2003
50
IEEE Trans. Circuits Syst. II Express Briefs
2
https://doi.org/10.1109/TCSII.2003.809709
db/journals/tcasII/tcasII50.html#FahimE03
Amr M. Fahim
Mohamed I. Elmasry
A fast lock digital phase-locked-loop architecture for wireless applications.
63-72
2003
50
IEEE Trans. Circuits Syst. II Express Briefs
2
https://doi.org/10.1109/TCSII.2003.809711
db/journals/tcasII/tcasII50.html#FahimE03a
Nasser Masoumi
Safieddin Safavi-Naeini
Mohamed I. Elmasry
A methodology for substrate crosstalk evaluation for system-on-a-chip.
129-147
2002
9
Integr. Comput. Aided Eng.
2
https://doi.org/10.3233/ica-2002-9204
db/journals/icae/icae9.html#MasoumiSE02
Amr M. Fahim
Mohamed I. Elmasry
Low-power high-performance arithmetic circuits and architectures.
90-94
2002
37
IEEE J. Solid State Circuits
1
https://doi.org/10.1109/4.974550
db/journals/jssc/jssc37.html#FahimE02
Mohab Anis
Mohamed W. Allam
Mohamed I. Elmasry
Energy-efficient noise-tolerant dynamic styles for scaled-down CMOS and MTCMOS technologies.
71-78
2002
10
IEEE Trans. Very Large Scale Integr. Syst.
2
https://doi.org/10.1109/92.994977
db/journals/tvlsi/tvlsi10.html#AnisAE02
Mohab Anis
Mohamed Mahmoud
Mohamed I. Elmasry
Shawki Areibi
Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique.
480-485
2002
conf/dac/2002
DAC
https://doi.org/10.1145/513918.514041
db/conf/dac/dac2002.html#AnisMEA02
Nasser Masoumi
Mohamed I. Elmasry
Safieddin Safavi-Naeini
Haydar Hadi
A Novel Analytical Model for Evaluation of Substrate Crosstalk in VLSI Circuits.
355-359
2002
conf/delta/2002
DELTA
https://doi.org/10.1109/DELTA.2002.994649
https://doi.ieeecomputersociety.org/10.1109/DELTA.2002.994649
db/conf/delta/delta2002.html#MasoumiESH02
Mohab Anis
Mohamed I. Elmasry
Self-timed MOS current mode logic for digital applications.
113-116
2002
conf/iscas/2002
ISCAS (5)
https://doi.org/10.1109/ISCAS.2002.1010653
db/conf/iscas/iscas2002-5.html#AnisE02
A. E. Hussein
Mohamed I. Elmasry
Fractional-N frequency synthesizer for wireless communications.
513-516
2002
conf/iscas/2002
ISCAS (4)
https://doi.org/10.1109/ISCAS.2002.1010505
db/conf/iscas/iscas2002-4.html#HusseinE02
D. A. F. Ei-Dib
Mohamed I. Elmasry
Low-power register-exchange Viterbi decoder for high-speed wireless communications.
737-740
2002
conf/iscas/2002
ISCAS (5)
https://doi.org/10.1109/ISCAS.2002.1010809
db/conf/iscas/iscas2002-5.html#Ei-DibE02
Mohamed W. Allam
Mohamed I. Elmasry
Dynamic current mode logic (DyCML): a new low-power high-performance logic style.
550-558
2001
36
IEEE J. Solid State Circuits
3
https://doi.org/10.1109/4.910495
db/journals/jssc/jssc36.html#AllamE01
Muhammad M. Khellah
Mohamed I. Elmasry
A low-power high-performance current-mode multiport SRAM.
590-598
2001
9
IEEE Trans. Very Large Scale Integr. Syst.
5
https://doi.org/10.1109/92.953493
db/journals/tvlsi/tvlsi9.html#KhellahE01
Muhammad E. S. Elrabaa
Mohamed I. Elmasry
Split-Gate Logic circuits for multi-threshold technologies.
798-801
2001
conf/iscas/2001
ISCAS (4)
https://doi.org/10.1109/ISCAS.2001.922358
db/conf/iscas/iscas2001-4.html#ElrabaaE01
Abdellatif Bellaouar
Michael S. O'brecht
Amr M. Fahim
Mohamed I. Elmasry
Low-power direct digital frequency synthesis for wireless communications.
385-390
2000
35
IEEE J. Solid State Circuits
3
https://doi.org/10.1109/4.826821
db/journals/jssc/jssc35.html#BellaouarOFE00
Nasser Masoumi
Mohamed I. Elmasry
Safieddin Safavi-Naeini
Fast and efficient parametric modeling of contact-to-substratecoupling.
1282-1292
2000
19
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
11
https://doi.org/10.1109/43.892852
db/journals/tcad/tcad19.html#MasoumiES00
Brian A. White
Mohamed I. Elmasry
Low-power design of decimation filters for a digital IF receiver.
339-345
2000
8
IEEE Trans. Very Large Scale Integr. Syst.
3
https://doi.org/10.1109/92.845900
db/journals/tvlsi/tvlsi8.html#WhiteE00
Mohamed W. Allam
Mohab H. Anis
Mohamed I. Elmasry
Effect of technology scaling on digital CMOS logic styles.
401-408
2000
CICC
https://doi.org/10.1109/CICC.2000.852695
conf/cicc/2000
db/conf/cicc/cicc2000.html#AllamAE00
Mohamed W. Allam
Mohamed I. Elmasry
Dynamic current mode logic (DyCML), a new low-power high-performance logic family.
421-424
2000
CICC
https://doi.org/10.1109/CICC.2000.852699
conf/cicc/2000
db/conf/cicc/cicc2000.html#AllamE00
Amr N. Hafez
Mohamed I. Elmasry
A fully-integrated low phase-noise nested-loop PLL for frequency synthesis.
589-592
2000
CICC
https://doi.org/10.1109/CICC.2000.852737
conf/cicc/2000
db/conf/cicc/cicc2000.html#HafezE00
A. E. Hussein
Mohamed I. Elmasry
Low power high speed analog-to-digital converter for wireless communications.
113-116
2000
conf/glvlsi/2000
ACM Great Lakes Symposium on VLSI
https://doi.org/10.1145/330855.331016
db/conf/glvlsi/glvlsi2000.html#HusseinE00
Nasser Masoumi
Safieddin Safavi-Naeini
Mohamed I. Elmasry
An Efficient and Accurate Model for RF/Microwave Spiral Inductors Using Microstrip Lines Theory.
127-132
2000
conf/iccd/2000
ICCD
https://doi.org/10.1109/ICCD.2000.878278
https://doi.ieeecomputersociety.org/10.1109/ICCD.2000.878278
db/conf/iccd/iccd2000.html#MasoumiSE00
Muhammad E. S. Elrabaa
Mohab H. Anis
Mohamed I. Elmasry
A contention-free domino logic for scaled-down CMOS technologies with ultra low threshold voltages.
748-751
2000
ISCAS
https://doi.org/10.1109/ISCAS.2000.857204
conf/iscas/2000
db/conf/iscas/iscas2000.html#ElrabaAE00
Mohamed W. Allam
Mohab Anis
Mohamed I. Elmasry
High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies.
155-160
2000
conf/islped/2000
ISLPED
https://doi.org/10.1145/344166.344562
db/conf/islped/islped2000.html#AllamAE00
Abdellatif Bellaouar
Michael S. Obrecht
Amr M. Fahim
Mohamed I. Elmasry
A low-power direct digital frequency synthesizer architecture for wireless communications.
593-596
1999
CICC
https://doi.org/10.1109/CICC.1999.777351
conf/cicc/1999
db/conf/cicc/cicc1999.html#BellaouarOFE99
Amr N. Hafez
Mohamed I. Elmasry
Fully integrated low phase-noise PLLs using closed-loop voltage-to-frequency converter architectures.
653-656
1999
CICC
https://doi.org/10.1109/CICC.1999.777365
conf/cicc/1999
db/conf/cicc/cicc1999.html#HafezE99
Amr N. Hafez
Mohamed I. Elmasry
A Novel Low Power Low Phase-Noise PLL Architecture for Wireless Transceivers.
306-309
1999
conf/glvlsi/1999
Great Lakes Symposium on VLSI
https://doi.org/10.1109/GLSV.1999.757439
https://doi.ieeecomputersociety.org/10.1109/GLSV.1999.757439
db/conf/glvlsi/glvlsi1999.html#HafezE99
Maitham Shams
Mohamed I. Elmasry
Delay Optimization of CMOS Logic Circuits Using Closed-Form Expressions.
563-568
1999
conf/iccd/1999
ICCD
https://doi.org/10.1109/ICCD.1999.808596
https://doi.ieeecomputersociety.org/10.1109/ICCD.1999.808596
db/conf/iccd/iccd1999.html#ShamsE99
Nasser Masoumi
Mohamed I. Elmasry
Safieddin Safavi-Naeini
A Fast Parametric Model for Contact-Substrate Coupling.
69-76
1999
conf/ifip10-5/1999
VLSI
db/conf/ifip10-5/ifip10-5-1999.html#MasoumiES99
Amr M. Fahim
Mohamed I. Elmasry
A low-power CMOS frequency synthesizer design methodology for wireless applications.
115-119
1999
conf/iscas/1999
ISCAS (2)
https://doi.org/10.1109/ISCAS.1999.780632
db/conf/iscas/iscas1999-2.html#FahimE99a
Amr M. Fahim
Mohamed I. Elmasry
A Low-Voltage High-Performance Differential Static Logic (LVDSL) family.
230-233
1999
conf/iscas/1999
ISCAS (1)
https://doi.org/10.1109/ISCAS.1999.777845
db/conf/iscas/iscas1999-1.html#FahimE99
Maitham Shams
Mohamed I. Elmasry
A formulation for quick evaluation and optimization of digital CMOS circuits.
326-329
1999
conf/iscas/1999
ISCAS (6)
https://doi.org/10.1109/ISCAS.1999.780161
db/conf/iscas/iscas1999-6.html#ShamsE99
Amr N. Hafez
Mohamed I. Elmasry
A low power monolithic subsampled phase-locked loop architecture for wireless transceivers.
549-552
1999
conf/iscas/1999
ISCAS (2)
https://doi.org/10.1109/ISCAS.1999.780808
db/conf/iscas/iscas1999-2.html#HafezE99
Ayman ElSayed
Akbar Ali
Mohamed I. Elmasry
Differential PLL for wireless applications using differential CMOS LC-VCO and differential charge pump.
243-248
1999
conf/islped/1999
ISLPED
https://doi.org/10.1145/313817.313935
db/conf/islped/islped1999.html#ElSayedAE99
Maitham Shams
Jo C. Ebergen
Mohamed I. Elmasry
Modeling and comparing CMOS implementations of the C-element.
563-567
1998
6
IEEE Trans. Very Large Scale Integr. Syst.
4
https://doi.org/10.1109/92.736128
db/journals/tvlsi/tvlsi6.html#ShamsEE98
Michael S. Obrecht
Edwin L. Heasell
Jirí Vlach
Mohamed I. Elmasry
Transient Phenomena in High Speed Bipolar Devices.
475-480
1998
8
VLSI Design
1-4
https://doi.org/10.1155/1998/35648
db/journals/vlsi/vlsi8.html#ObrechtHVE98
Amr M. Fahim
Muhammad M. Khellah
Mohamed I. Elmasry
A Low-Power High-Performance Embedded SRAM Macrocell.
13-17
1998
conf/glvlsi/1998
Great Lakes Symposium on VLSI
https://doi.org/10.1109/GLSV.1998.665192
https://doi.ieeecomputersociety.org/10.1109/GLSV.1998.665192
db/conf/glvlsi/glvlsi1998.html#FahimKE98
Amr G. Wassal
M. Anwarul Hasan
Mohamed I. Elmasry
Low-Power Design of Finite Field Multipliers for Wireless Applications.
19-25
1998
conf/glvlsi/1998
Great Lakes Symposium on VLSI
https://doi.org/10.1109/GLSV.1998.665193
https://doi.ieeecomputersociety.org/10.1109/GLSV.1998.665193
db/conf/glvlsi/glvlsi1998.html#WassalHE98
Muhammad M. Khellah
Mohamed I. Elmasry
Effective Capacitance Macro-Modelling for Architectural-Level Power Estimation.
414-419
1998
conf/glvlsi/1998
Great Lakes Symposium on VLSI
https://doi.org/10.1109/GLSV.1998.665336
https://doi.ieeecomputersociety.org/10.1109/GLSV.1998.665336
db/conf/glvlsi/glvlsi1998.html#KhellahE98
Muhammad E. S. Elrabaa
Mohamed I. Elmasry
Duljit S. Malhi
Low-power BiCMOS circuits for high-speed interchip communication.
604-609
1997
32
IEEE J. Solid State Circuits
4
https://doi.org/10.1109/4.563685
db/journals/jssc/jssc32.html#ElrabaaEM97
David Zhang 0001
Mohamed I. Elmasry
VLSI compressor design with applications to digital neural networks.
230-233
1997
5
IEEE Trans. Very Large Scale Integr. Syst.
2
https://doi.org/10.1109/92.585226
https://www.wikidata.org/entity/Q57812357
db/journals/tvlsi/tvlsi5.html#ZhangE97
Maitham Shams
Jo C. Ebergen
Mohamed I. Elmasry
Optimizing CMOS Implementations of the C-element.
700-705
1997
conf/iccd/1997
ICCD
db/conf/iccd/iccd97.html#ShamsEE97
https://doi.org/10.1109/ICCD.1997.628941
https://doi.ieeecomputersociety.org/10.1109/ICCD.1997.628941
Emad N. Farag
Ran-Hong Yan
Mohamed I. Elmasry
A programmable power-efficient decimation filter for software radios.
68-71
1997
conf/islped/1997
ISLPED
https://doi.org/10.1145/263272.263285
db/conf/islped/islped1997.html#FaragYE97
David Zhang 0001
Mohamed I. Elmasry
A Digital Perceptron Learning Implementation with Look-up Table Feedback Layer.
79-84
1996
6
J. Circuits Syst. Comput.
1
https://doi.org/10.1142/S021812669600008X
db/journals/jcsc/jcsc6.html#ZhangE96
Khaled M. Sharaf
Mohamed I. Elmasry
Analysis and optimization of series-gated CML and ECL high-speed bipolar circuits.
202-211
1996
31
IEEE J. Solid State Circuits
2
https://doi.org/10.1109/4.487997
db/journals/jssc/jssc31.html#SharafE96
Richard X. Gu
Mohamed I. Elmasry
All-N-logic high-speed true-single-phase dynamic CMOS logic.
221-229
1996
31
IEEE J. Solid State Circuits
2
https://doi.org/10.1109/4.487999
db/journals/jssc/jssc31.html#GuE96
Richard X. Gu
Mohamed I. Elmasry
Power dissipation analysis and optimization of deep submicron CMOS digital circuits.
707-713
1996
31
IEEE J. Solid State Circuits
5
https://doi.org/10.1109/4.509853
db/journals/jssc/jssc31.html#GuE96a
Issam S. Abu-Khater
Abdellatif Bellaouar
Mohamed I. Elmasry
Circuit techniques for CMOS low-power high-performance multipliers.
1535-1546
1996
31
IEEE J. Solid State Circuits
10
https://doi.org/10.1109/4.540066
db/journals/jssc/jssc31.html#Abu-KhaterBE96
David Zhang 0001
Mohamed I. Elmasry
Mapping neural networks onto systolic arrays.
341-352
1996
4
Neural Parallel Sci. Comput.
3
http://dl.acm.org/citation.cfm?id=241624
db/journals/npsc/npsc4.html#ZhangE96
David Zhang 0001
Mohamed I. Elmasry
A parallel digital layered perceptrons implementation.
493-504
1996
4
Neural Parallel Sci. Comput.
4
http://dl.acm.org/citation.cfm?id=254756
db/journals/npsc/npsc4.html#ZhangE96a
Emad N. Farag
Mohamed I. Elmasry
Low-Power Implementation of Discrete Cosine Transform.
174-177
1996
conf/glvlsi/1996
Great Lakes Symposium on VLSI
https://doi.org/10.1109/GLSV.1996.497615
https://doi.ieeecomputersociety.org/10.1109/GLSV.1996.497615
http://dl.acm.org/citation.cfm?id=875830
db/conf/glvlsi/glvlsi1996.html#FaragE96
Emad N. Farag
Mohamed I. Elmasry
Low-power subband coding algorithm.
2116-2119
1996
ICASSP
https://doi.org/10.1109/ICASSP.1996.545733
https://doi.ieeecomputersociety.org/10.1109/ICASSP.1996.545733
conf/icassp/1996
db/conf/icassp/icassp1996.html#FaragE96
Maitham Shams
Jo C. Ebergen
Mohamed I. Elmasry
A comparison of CMOS implementations of an asynchronous circuits primitive: the C-element.
93-96
1996
conf/islped/1996
ISLPED
https://doi.org/10.1109/LPE.1996.542737
https://dl.acm.org/citation.cfm?id=252579
db/conf/islped/islped1996.html#ShamsEE96
Richard X. Gu
Mohamed I. Elmasry
Novel high speed circuit structures for BiCMOS environment.
563-570
1995
May
30
IEEE J. Solid State Circuits
5
https://doi.org/10.1109/4.384169
db/journals/jssc/jssc30.html#GuE95
Abdellatif Bellaouar
Mohamed I. Elmasry
Sherif H. K. Embabi
Bootstrapped full-swing BiCMOS/BiNMOS logic circuits for 1.2-3.3 V supply voltage regime.
629-636
1995
June
30
IEEE J. Solid State Circuits
6
https://doi.org/10.1109/4.387065
db/journals/jssc/jssc30.html#BellaouarEE95
Khaled M. Sharaf
Mohamed I. Elmasry
Active-pull-down nonthreshold logic BiCMOS circuits for high-speed low-power applications.
691-695
1995
June
30
IEEE J. Solid State Circuits
6
https://doi.org/10.1109/4.387074
db/journals/jssc/jssc30.html#SharafE95
Abdellatif Bellaouar
Issam S. Abu-Khater
Mohamed I. Elmasry
Low-power CMOS/BiCMOS drivers and receivers for on-chip interconnects.
696-700
1995
June
30
IEEE J. Solid State Circuits
6
https://doi.org/10.1109/4.387075
db/journals/jssc/jssc30.html#BellaouarAE95
David Zhang 0001
Richard X. Gu
Mohamed I. Elmasry
A programmable neural network architecture using BiCMOS technology.
103-113
1995
3
Neural Parallel Sci. Comput.
1
http://dl.acm.org/citation.cfm?id=204450
db/journals/npsc/npsc3.html#ZhangGE95
Michael S. Obrecht
Mohamed I. Elmasry
Edwin L. Heasell
TRASIM: compact and efficient two-dimensional transient simulator for arbitrary planar semiconductor devices.
447-458
1995
14
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
4
https://doi.org/10.1109/43.372371
db/journals/tcad/tcad14.html#ObrechtEH95
Shaahin Hessabi
Mohamed Y. Osman
Mohamed I. Elmasry
Differential BiCMOS logic circuits: fault characterization and design-for-testability.
437-445
1995
3
IEEE Trans. Very Large Scale Integr. Syst.
3
https://doi.org/10.1109/92.407001
db/journals/tvlsi/tvlsi3.html#HessabiOE95
Issam S. Abu-Khater
Abdellatif Bellaouar
Mohamed I. Elmasry
Ran-Hong Yan
Circuit/architecture for low-power high-performance 32-bit adder.
74-
1995
conf/glvlsi/1995
Great Lakes Symposium on VLSI
https://doi.org/10.1109/GLSV.1995.516028
https://doi.ieeecomputersociety.org/10.1109/GLSV.1995.516028
http://dl.acm.org/citation.cfm?id=797416
db/conf/glvlsi/glvlsi1995.html#Abu-KhaterBEY95
Richard X. Gu
Mohamed I. Elmasry
Power Dissipation in Deep Submicron CMOS Digital Circuits.
33-36
1995
conf/iscas/1995
ISCAS
db/conf/iscas/iscas1995-1.html#GuE95
https://doi.org/10.1109/ISCAS.1995.521444
David Zhang 0001
Mohamed Kamel
Mohamed I. Elmasry
Fuzzy Clustering Neural Network (FCNN): Competitive Learning and Parallel Architecture.
289-298
1994
2
J. Intell. Fuzzy Syst.
4
https://doi.org/10.3233/IFS-1994-2402
https://www.wikidata.org/entity/Q114919417
db/journals/jifs/jifs2.html#ZhangKE94
Khaled M. Sharaf
Mohamed I. Elmasry
An accurate analytical propagation delay model for high-speed CML bipolar circuits.
31-45
1994
January
29
IEEE J. Solid State Circuits
1
https://doi.org/10.1109/4.272092
db/journals/jssc/jssc29.html#SharafE94
Muhammad E. S. Elrabaa
Michael S. Obrecht
Mohamed I. Elmasry
Novel low-voltage low-power full-swing BiCMOS circuits.
86-94
1994
February
29
IEEE J. Solid State Circuits
2
https://doi.org/10.1109/4.272111
db/journals/jssc/jssc29.html#ElrabaaOE94
Samir S. Rofail
Mohamed I. Elmasry
Schottky merged BiCMOS structures.
356-361
1994
March
29
IEEE J. Solid State Circuits
3
https://doi.org/10.1109/4.278361
db/journals/jssc/jssc29.html#RofailE94
Mohamed Y. Osman
Mohamed I. Elmasry
Highly testable design of BiCMOS logic circuits.
671-678
1994
June
29
IEEE J. Solid State Circuits
6
https://doi.org/10.1109/4.293112
db/journals/jssc/jssc29.html#OsmanE94
Abdellatif Bellaouar
Issam S. Abu-Khater
Mohamed I. Elmasry
A. Chikima
Full-swing Schottky BiCMOS/BiNMOS and the effects of operating frequency and supply voltage scaling.
693-700
1994
June
29
IEEE J. Solid State Circuits
6
https://doi.org/10.1109/4.293115
db/journals/jssc/jssc29.html#BellaouarAEC94
Richard X. Gu
Mohamed I. Elmasry
High-speed dynamic reference voltage (DRV) CMOS/ECL interface circuits.
1282-1287
1994
October
29
IEEE J. Solid State Circuits
10
https://doi.org/10.1109/4.315215
db/journals/jssc/jssc29.html#GuE94
Li Deng 0001
Khaled Hassanein
Mohamed I. Elmasry
Analysis of the correlation structure for a neural predictive model with application to speech recognition.
331-339
1994
7
Neural Networks
2
https://doi.org/10.1016/0893-6080(94)90027-2
https://www.wikidata.org/entity/Q55885644
db/journals/nn/nn7.html#DengHE94
David Zhang 0001
Li Deng 0001
Mohamed I. Elmasry
Pipelined architecture for neural-network-based speech recognition.
81-92
1994
2
Neural Parallel Sci. Comput.
1
http://dl.acm.org/citation.cfm?id=184206
db/journals/npsc/npsc2.html#ZhangDE94
Arun Achyuthan
Mohamed I. Elmasry
Mixed analog/digital hardware synthesis of artificial neural networks.
1073-1087
1994
13
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
9
https://doi.org/10.1109/43.310897
db/journals/tcad/tcad13.html#AchyuthanE94
Khaled M. Sharaf
Mohamed I. Elmasry
Low-power differential CML and ECL BiCMOS circuit techniques.
208-213
1994
Great Lakes Symposium on VLSI
https://doi.org/10.1109/GLSV.1994.289967
conf/glvlsi/1994
db/conf/glvlsi/glvlsi1994.html#SharafE94
Khaled Hassanein
Li Deng 0001
Mohamed I. Elmasry
Vowel classification using a neural predictive HMM: a discriminative training approach.
665-668
1994
ICASSP (2)
https://doi.org/10.1109/ICASSP.1994.389568
https://doi.ieeecomputersociety.org/10.1109/ICASSP.1994.389568
conf/icassp/1994
db/conf/icassp/icassp1994.html#HassaneinDE94
Richard X. Gu
Mohamed I. Elmasry
An All-N-Logic High-Speed Single-Phase Dynamic CMOS Logic.
7-10
1994
conf/iscas/1994
ISCAS
db/conf/iscas/iscas1994-4.html#GuE94
https://doi.org/10.1109/ISCAS.1994.409183
Khaled M. Sharaf
Mohamed I. Elmasry
BiCMOS Active-Pull-Down Non-Threshold Logic Cicuits for High-Speed Low-Power Applications.
19-22
1994
conf/iscas/1994
ISCAS
db/conf/iscas/iscas1994-4.html#SharafE94
https://doi.org/10.1109/ISCAS.1994.409186
Sameh Ebrahim Rehan
Mohamed I. Elmasry
Modular switched-resistor ANN chip for character recognition using novel parallel VLSI architecture.
241-262
1993
1
Neural Parallel Sci. Comput.
db/journals/npsc/npsc1.html#RehanE93
Catherine H. Gebotys
Mohamed I. Elmasry
Global optimization approach for architectural synthesis.
1266-1278
1993
12
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
9
https://doi.org/10.1109/43.240074
db/journals/tcad/tcad12.html#GebotysE93
Waleed Fakhr
Mohamed I. Elmasry
Minimum description length pruning and maximum mutual information training of adaptive probabilistic neural networks.
1338-1342
1993
ICNN
https://doi.org/10.1109/ICNN.1993.298746
conf/icnn/1993
db/conf/icnn/icnn1993.html#FakhrE93
L. Song
Mohamed I. Elmasry
Anthony Vannelli
Analog neural network building blocks based on current mode subthreshold operation.
2462-2465
1993
conf/iscas/1993
ISCAS
db/conf/iscas/iscas1993-4.html#SongEV93
J. Paul Harvey
Mohamed I. Elmasry
Bosco Leung
STAIC: an interactive framework for synthesizing CMOS and BiCMOS analog circuits.
1402-1417
1992
11
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
11
https://doi.org/10.1109/43.177403
db/journals/tcad/tcad11.html#HarveyEL92
Brian A. White
Mohamed I. Elmasry
The digi-neocognitron: a digital neocognitron neural network model for VLSI.
73-85
1992
3
IEEE Trans. Neural Networks
1
https://doi.org/10.1109/72.105419
https://www.wikidata.org/entity/Q39834660
db/journals/tnn/tnn3.html#WhiteE92
Aly Ezzat Salama
Mohamed I. Elmasry
Testing and design for testability of BiCMOS logic circuits.
217-222
1992
VTS
https://doi.org/10.1109/VTEST.1992.232755
https://doi.ieeecomputersociety.org/10.1109/VTEST.1992.232755
conf/vts/1992
db/conf/vts/vts1992.html#SalamaE92
Catherine H. Gebotys
Mohamed I. Elmasry
Simultaneous Scheduling and Allocation for Cost Constrained Optimal Architectural Synthesis.
2-7
1991
conf/dac/1991
DAC
https://doi.org/10.1145/127601.127609
db/conf/dac/dac91.html#GebotysE91
Catherine H. Gebotys
Mohamed I. Elmasry
A Global Optimization Approach for Architectural Synthesis.
258-261
1990
conf/iccad/1990
ICCAD
db/conf/iccad/iccad1990.html#GebotysE90
https://doi.org/10.1109/ICCAD.1990.129896
https://doi.ieeecomputersociety.org/10.1109/ICCAD.1990.129896
Waleed Fakhr
Mohamed I. Elmasry
A fast learning technique for the multilayer perceptron.
257-262
1990
IJCNN
https://doi.org/10.1109/IJCNN.1990.137854
conf/ijcnn/1990
db/conf/ijcnn/ijcnn1990.html#FakhrE90
Baher Haroun
Mohamed I. Elmasry
Architectural synthesis for DSP silicon compilers.
431-447
1989
8
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
4
https://doi.org/10.1109/43.29596
https://www.wikidata.org/entity/Q121177120
db/journals/tcad/tcad8.html#HarounE89
O. A. Buset
Mohamed I. Elmasry
ACE: A Hierarchical Graphical Interface for Architectual Synthesis.
537-542
1989
conf/dac/1989
DAC
https://doi.org/10.1145/74382.74472
db/conf/dac/dac89.html#BusetE89
Catherine H. Gebotys
Mohamed I. Elmasry
VLSI Design Synthesis with Testability.
16-21
1988
conf/dac/1988
DAC
http://portal.acm.org/citation.cfm?id=285730.285734
db/conf/dac/dac88.html#GebotysE88
Baher Haroun
Mohamed I. Elmasry
Automatic synthesis of a multi-bus architecture for DSP.
44-47
1988
ICCAD
https://doi.org/10.1109/ICCAD.1988.122459
https://doi.ieeecomputersociety.org/10.1109/ICCAD.1988.122459
conf/iccad/1988
db/conf/iccad/iccad1988.html#HarounE88
Catherine H. Gebotys
Mohamed I. Elmasry
Integrated design and test synthesis.
398-401
1988
ICCD
https://doi.org/10.1109/ICCD.1988.25731
conf/iccd/1988
db/conf/iccd/iccd1988.html#GebotysE88
Kevin S. B. Szabó
James M. Leask
Mohamed I. Elmasry
Symbolic Layout for Bipolar and MOS VLSI.
202-210
1987
6
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
2
https://doi.org/10.1109/TCAD.1987.1270264
db/journals/tcad/tcad6.html#SzaboLE87
Kevin S. B. Szabó
Mohamed I. Elmasry
The user interface and program structure of a graphical VLSI layout editor.
219-225
1987
CHI
https://doi.org/10.1145/29933.275633
https://doi.org/10.1145/30851.275633
https://doi.org/10.1145/1165387.275633
conf/chi/1987
db/conf/chi/chi1987.html#SzaboE87
Patrick A. D. Powell
Mohamed I. Elmasry
The icewater language and interpreter.
98-102
1984
DAC
http://dl.acm.org/citation.cfm?id=800781
conf/dac/1984
db/conf/dac/dac1984.html#PowellE84
A. R. Teene
Mohamed I. Elmasry
David J. Roulston
WATPC: A Computer-Aided Design Package for Digital Bipolar Integrated Circuits.
213-219
1982
1
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
4
https://doi.org/10.1109/TCAD.1982.1270013
db/journals/tcad/tcad1.html#TeeneER82
Mohamed I. Elmasry
Logic Design Using EFL Structures.
952-956
1976
25
IEEE Trans. Computers
9
db/journals/tc/tc25.html#Elmasry76
https://doi.org/10.1109/TC.1976.1674722
http://doi.ieeecomputersociety.org/10.1109/TC.1976.1674722
Mohamed I. Elmasry
Philip M. Thompson
Two-Level Emitter-Function Logic Structures for Logic-in-Memory Computers.
250-258
1975
24
IEEE Trans. Computers
3
db/journals/tc/tc24.html#ElmasryT75
https://doi.org/10.1109/T-C.1975.224206
http://doi.ieeecomputersociety.org/10.1109/T-C.1975.224206
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