Maria Antonia Iachino
Salvatore Marra
Maria Antonia Iachino
Francesco Carlo Morabito
High Speed, Programmable Implementation of a Tanh-like Activation Function and Its Derivative for Digital Neural Networks.
506-511
2007
IJCNN
https://doi.org/10.1109/IJCNN.2007.4371008
conf/ijcnn/2007
db/conf/ijcnn/ijcnn2007.html#MarraIM07
Stefania Perri
Maria Antonia Iachino
Pasquale Corsonello
Simd Multipliers for Accelerating Embedded Processors in FPGAS.
537-550
2006
15
J. Circuits Syst. Comput.
4
https://doi.org/10.1142/S0218126606003210
db/journals/jcsc/jcsc15.html#PerriIC06
Maria Antonia Iachino
Arithmetic circuits for multimedia extension of FPGA-based processors.
Mediterranea University of Reggio Calabria, Italy
2004
https://opac.bncf.firenze.sbn.it/bncf-prod/resource?uri=BNI0010467
Stefania Perri
Pasquale Corsonello
Maria Antonia Iachino
Marco Lanuzza
Giuseppe Cocorullo
Variable precision arithmetic circuits for FPGA-based multimedia processors.
995-999
2004
12
IEEE Trans. Very Large Scale Integr. Syst.
9
https://doi.org/10.1109/TVLSI.2004.833400
db/journals/tvlsi/tvlsi12.html#PerriCILC04
Pasquale Corsonello
Stefania Perri
Maria Antonia Iachino
Giuseppe Cocorullo
Variable Precision Multipliers for FPGA-Based Reconfigurable Computing Systems.
661-669
https://doi.org/10.1007/978-3-540-45234-8_64
2003
conf/fpl/2003
FPL
db/conf/fpl/fpl2003.html#CorsonelloPIC03
Stefania Perri
Maria Antonia Iachino
Pasquale Corsonello
Speed-efficient wide adders for VIRTEX FPGAs.
599-602
2002
ICECS
https://doi.org/10.1109/ICECS.2002.1046239
conf/icecsys/2002
db/conf/icecsys/icecsys2002.html#PerriIC02
Giuseppe Cocorullo
Pasquale Corsonello
Marco Lanuzza
Salvatore Marra
Francesco Carlo Morabito
Stefania Perri