Thomas Kropf
Jo Laufenberg
Thomas Kropf
Oliver Bringmann 0001
CAN Simulation Framework - From Classic CAN to CAN XL.
3343-3348
2023
ITSC
https://doi.org/10.1109/ITSC57777.2023.10422342
conf/itsc/2022
db/conf/itsc/itsc2023.html#LaufenbergK023
Jo Laufenberg
Susanne Throner
Thomas Kropf
Oliver Bringmann 0001
Attack Simulation and Adaptation in CAN for Training and Evaluation of IDS.
1-6
2023
IV
https://doi.org/10.1109/IV55152.2023.10186799
conf/ivs/2023
db/conf/ivs/ivs2023.html#LaufenbergTKB23
Jo Laufenberg
Thomas Kropf
Oliver Bringmann 0001
A Framework for CAN Communication and Attack Simulation.
1-7
2022
VTC Spring
https://doi.org/10.1109/VTC2022-Spring54318.2022.9860568
conf/vtc/2022s
db/conf/vtc/vtc2022s.html#LaufenbergK022
Jo Laufenberg
Thomas Kropf
Oliver Bringmann 0001
Automated Graph-Based Fault Injection Into Virtual Prototypes for Robustness Evaluation.
1-2
2020
ETS
https://doi.org/10.1109/ETS48528.2020.9131573
conf/ets/2020
db/conf/ets/ets2020.html#LaufenbergK020
Kim Mens
Rafael Capilla
Herman Hartmann
Thomas Kropf
Modeling and Managing Context-Aware Systems' Variability.
58-63
2017
34
IEEE Softw.
6
https://doi.org/10.1109/MS.2017.4121225
http://doi.ieeecomputersociety.org/10.1109/MS.2017.4121225
db/journals/software/software34.html#MensCHK17
Stefan Huster
Jonas Ströbele
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Using Robustness Testing to Handle Incomplete Verification Results When Combining Verification and Testing Techniques.
54-70
2017
ICTSS
https://doi.org/10.1007/978-3-319-67549-7_4
conf/pts/2017
db/conf/pts/ictss2017.html#HusterSRKR17
Jo Laufenberg
Sebastian Reiter 0003
Alexander Viehl
Oliver Bringmann 0001
Thomas Kropf
Wolfgang Rosenstiel
Combining graph-based guidance with error effect simulation for efficient safety analysis.
1132-1135
2016
DATE
https://ieeexplore.ieee.org/document/7459479/
conf/date/2016
db/conf/date/date2016.html#LaufenbergRVBKR16
Jörg Behrend
Djones Lettnin
Alexander Grünhage
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Scalable and Optimized Hybrid Verification of Embedded Software.
151-166
2015
31
J. Electron. Test.
2
https://doi.org/10.1007/s10836-015-5518-4
db/journals/et/et31.html#BehrendLGRKR15
Florian Merz 0001
Carsten Sinz
Hendrik Post
Thomas Gorges
Thomas Kropf
Bridging the gap between test cases and requirements by abstract testing.
233-242
2015
11
Innov. Syst. Softw. Eng.
4
https://doi.org/10.1007/s11334-015-0245-7
db/journals/isse/isse11.html#MerzSPGK15
Hanno Eichelberger
Thomas Kropf
Jürgen Ruf
Thomas Greiner
Wolfgang Rosenstiel
Efficient Fault Localization During Replay of Embedded Software.
43-52
2015
EUROMICRO-SEAA
https://doi.org/10.1109/SEAA.2015.55
https://doi.ieeecomputersociety.org/10.1109/SEAA.2015.55
conf/euromicro/2015
db/conf/euromicro/euromicro2015.html#EichelbergerKRG15
Stefan Huster
Sebastian Burg
Hanno Eichelberger
Jo Laufenberg
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Efficient Testing of Different Loop Paths.
117-131
2015
SEFM
https://doi.org/10.1007/978-3-319-22969-0_9
conf/sefm/2015
db/conf/sefm/sefm2015.html#HusterBELRKR15
Hanno Eichelberger
Jürgen Ruf
Thomas Kropf
Thomas Greiner
Wolfgang Rosenstiel
Debugger-Based Record Replay and Dynamic Analysis for In-Vehicle Infotainment.
387-401
2014
ICCSA (5)
https://doi.org/10.1007/978-3-319-09156-3_28
conf/iccsa/2014-5
db/conf/iccsa/iccsa2014-5.html#EichelbergerRKGR14
Jörg Behrend
Alexander Grünhage
Douglas Schroeder
Djones Lettnin
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Optimized hybrid verification of embedded software.
1-6
2014
LATW
https://doi.org/10.1109/LATW.2014.6841906
conf/latw/2014
db/conf/latw/latw2014.html#BehrendGSLRKR14
Hanno Eichelberger
Patrick Heckeler
Jürgen Ruf
Stefan Huster
Sebastian Burg
Thomas Kropf
Wolfgang Rosenstiel
Thomas Greiner
Erkennen von Speicherverletzungen im Testbetrieb von eingebetteter Software.
61-70
2014
MBMV
conf/mbmv/2014
db/conf/mbmv/mbmv2014.html#EichelbergerHRHBKRG14
Stefan Huster
Merdin Macic
Sebastian Burg
Hanno Eichelberger
Patrick Heckeler
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Increasing Software Reliability by Integrating Formal Verification and Robustness Testing.
125-136
2014
MBMV
conf/mbmv/2014
db/conf/mbmv/mbmv2014.html#HusterMBEHRKR14
Sebastian Burg
Patrick Heckeler
Stefan Huster
Hanno Eichelberger
Jörg Behrend
Jürgen Ruf
Thomas Kropf
Oliver Bringmann 0001
LoCEG: Local Preprocessing in SAT-Solving through Counter-Example Generation.
193-196
2014
MBMV
conf/mbmv/2014
db/conf/mbmv/mbmv2014.html#BurgHHEBRKB14
Stefan Huster
Patrick Heckeler
Hanno Eichelberger
Jürgen Ruf
Sebastian Burg
Thomas Kropf
Wolfgang Rosenstiel
More Flexible Object Invariants with Less Specification Overhead.
302-316
2014
SEFM
https://doi.org/10.1007/978-3-319-10431-7_25
conf/sefm/2014
db/conf/sefm/sefm2014.html#HusterHERBKR14
Christian Bräuchle
Folko Flehmig
Wolfgang Rosenstiel
Thomas Kropf
Maneuver decision for active pedestrian protection under uncertainty.
646-651
2013
ITSC
https://doi.org/10.1109/ITSC.2013.6728304
conf/itsc/2013
db/conf/itsc/itsc2013.html#BraeuchleFRK13
Hanno Eichelberger
Patrick Heckeler
Stefan Huster
Sebastian Burg
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Bastian Schlich
Beschleunigte Robustheitstests für verhaltensbeschreibende Zustandsmaschinen.
161-170
2013
MBMV
conf/mbmv/2013
db/conf/mbmv/mbmv2013.html#EichelbergerHHBRKRS13
Stefan Huster
Patrick Heckeler
Jürgen Ruf
Sebastian Burg
Thomas Kropf
Wolfgang Rosenstiel
A Software Testing Framework to Integrate Formal Verification Results.
183-192
2013
MBMV
conf/mbmv/2013
db/conf/mbmv/mbmv2013.html#HusterHRBKR13
Patrick Heckeler
Bastian Schlich
Thomas Kropf
Accelerated robustness testing of state-based components using reverse execution.
1188-1195
2013
SAC
https://doi.org/10.1145/2480362.2480587
conf/sac/2013
db/conf/sac/sac2013.html#HeckelerSK13
Alexander Grünhage
Jörg Behrend
Patrick Heckeler
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Djones Lettnin
Optimized Static Parameter Assignment for Semiformal Software Verification.
25-35
2012
MBMV
conf/mbmv/2012
db/conf/mbmv/mbmv2012.html#GrunhageBHRKRL12
Patrick Heckeler
Jörg Behrend
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Roland Weiss
DWARF-driven Equivalence Checking of UML Statecharts and Software Components.
2011
31
Softwaretechnik-Trends
3
http://pi.informatik.uni-siegen.de/stt/31_3/03_Technische_Beitraege/heckeler.pdf
db/journals/stt/stt31.html#HeckelerBRKRW11
Jörg Behrend
Djones Lettnin
Patrick Heckeler
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Scalable hybrid verification for embedded software.
179-184
2011
DATE
https://doi.org/10.1109/DATE.2011.5763039
https://doi.ieeecomputersociety.org/10.1109/DATE.2011.5763039
conf/date/2011
db/conf/date/date2011.html#BehrendLHRKR11
Jörg Behrend
Patrick Heckeler
Stefan Huster
Djones Lettnin
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Scalable and Extendable Hybrid Verification Platform.
259-268
2011
MBMV
conf/mbmv/2011
db/conf/mbmv/mbmv2011.html#BehrendHHLRKR11
Stefan Lämmermann
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Alexander Viehl
Alexander Jesser
Lars Hedrich
Towards assertion-based verification of heterogeneous system designs.
1171-1176
2010
DATE
https://doi.org/10.1109/DATE.2010.5456985
http://dl.acm.org/citation.cfm?id=1871210
conf/date/2010
db/conf/date/date2010.html#LammermannRKRVJH10
Patrick Heckeler
Jörg Behrend
Thomas Kropf
Jürgen Ruf
Wolfgang Rosenstiel
Roland J. Weiss
State-based Analysis and UML-driven Equivalence Checking for C++ State Machines.
49-62
2010
FM+AM
conf/fmam/2010
db/conf/fmam/fmam2010.html#HeckelerBKRRW10
https://dl.gi.de/handle/20.500.12116/19659
http://subs.emis.de/LNI/Proceedings/Proceedings179/article6223.html
Florian Merz 0001
Carsten Sinz
Hendrik Post
Thomas Gorges
Thomas Kropf
Abstract Testing: Connecting Source Code Verification with Requirements.
89-96
2010
QUATIC
https://doi.org/10.1109/QUATIC.2010.14
https://doi.ieeecomputersociety.org/10.1109/QUATIC.2010.14
conf/quatic/2010
db/conf/quatic/quatic2010.html#MerzSPGK10
Djones Lettnin
Pradeep Kumar Nalla
Jörg Behrend
Jürgen Ruf
Joachim Gerlach
Thomas Kropf
Wolfgang Rosenstiel
Volker Schönknecht
Stephan Reitemeyer
Semiformal verification of temporal properties in automotive hardware dependent software.
1214-1217
2009
DATE
https://doi.org/10.1109/DATE.2009.5090847
http://dl.acm.org/citation.cfm?id=1874912
conf/date/2009
db/conf/date/date2009.html#LettninNBRGKRSR09
Hendrik Post
Carsten Sinz
Florian Merz 0001
Thomas Gorges
Thomas Kropf
Linking Functional Requirements and Software Verification.
295-302
2009
RE
https://doi.org/10.1109/RE.2009.43
https://doi.ieeecomputersociety.org/10.1109/RE.2009.43
conf/re/2009
db/conf/re/re2009.html#PostSMGK09
Alexander Jesser
Stefan Lämmermann
Alexander Pacholik
Roland Weiss
Jürgen Ruf
Lars Hedrich
Wolfgang Fengler 0001
Thomas Kropf
Wolfgang Rosenstiel
Advanced Assertion-Based Design for Mixed-Signal Verification.
3548-3555
2008
91-A
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
12
https://doi.org/10.1093/ietfec/e91-a.12.3548
db/journals/ieicet/ieicet91a.html#JesserLPWRHFKR08
Djones Lettnin
Pradeep Kumar Nalla
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Tobias Kirsten
Volker Schönknecht
Stephan Reitemeyer
Verification of Temporal Properties in Automotive Embedded Software.
164-169
2008
DATE
https://doi.org/10.1109/DATE.2008.4484680
https://doi.ieeecomputersociety.org/10.1109/DATE.2008.4484680
https://doi.org/10.1145/1403375.1403417
conf/date/2008
db/conf/date/date2008.html#LettninNRKRKSR08
Thomas Kropf
Software Bugs Seen from an Industrial Perspective or Can Formal Methods Help on Automotive Software Development?
3
2007
conf/cav/2007
CAV
https://doi.org/10.1007/978-3-540-73368-3_3
db/conf/cav/cav2007.html#Kropf07
Pradeep Kumar Nalla
Jörg Behrend
Prakash Mohan Peranandam
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Grid Based Fast Falsification For Bounded Property Checking.
299-304
2007
FDL
http://www.ecsi-association.org/ecsi/main.asp?l1=library&fn=def&id=286
conf/fdl/2007
db/conf/fdl/fdl2007.html#NallaBPRKR07
Djones Lettnin
Markus Winterholer
Axel G. Braun
Joachim Gerlach
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Coverage Driven Verification applied to Embedded Software.
159-164
2007
conf/isvlsi/2007
ISVLSI
https://doi.org/10.1109/ISVLSI.2007.33
https://doi.ieeecomputersociety.org/10.1109/ISVLSI.2007.33
db/conf/isvlsi/isvlsi2007.html#LettninWBGRKR07
Djones Lettnin
Pradeep Kumar Nalla
Jürgen Ruf
Roland J. Weiss
Axel G. Braun
Joachim Gerlach
Thomas Kropf
Wolfgang Rosenstiel
Semiformal Verification of Temporal Properties in Embedded Software.
19-28
2007
MBMV
conf/mbmv/2007
db/conf/mbmv/mbmv2007.html#LettninNRWBGKR07
Stefan Lämmermann
Jörg Behrend
Roland J. Weiss
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
UML/SysML-Systemanalyse zur Generierung von formalen Verifikationseigenschaften für verschiedene Abstraktionsebenen.
29-38
2007
MBMV
conf/mbmv/2007
db/conf/mbmv/mbmv2007.html#LammermannBWRKR07
Prakash Mohan Peranandam
Pradeep Kumar Nalla
Jürgen Ruf
Roland J. Weiss
Thomas Kropf
Wolfgang Rosenstiel
Fast falsification based on symbolic bounded property checking.
1077-1082
2006
conf/dac/2006
DAC
https://doi.org/10.1145/1146909.1147181
db/conf/dac/dac2006.html#PeranandamNRWKR06
Paul Duplys
Roland J. Weiss
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Monitoring-based Formal Hardware Verification.
217-221
2006
MBMV
conf/mbmv/2006
db/conf/mbmv/mbmv2006.html#DuplysWRKR06
Stefan Lämmermann
Roland J. Weiss
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Automatische Eigenschaftsextraktion auf Systemebene aus SystemC Modellen.
222-226
2006
MBMV
conf/mbmv/2006
db/conf/mbmv/mbmv2006.html#LammermannWRKR06
Roland J. Weiss
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Efficient and Customizable Integration of Temporal Properties.
385-397
2005
FDL
http://www.ecsi-association.org/ecsi/main.asp?l1=library&fn=def&id=494
conf/fdl/2005
db/conf/fdl/fdl2005.html#WeissRKR05
Prakash Mohan Peranandam
Pradeep Kumar Nalla
Roland J. Weiss
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Overlap reduction in symbolic system traversal.
145-152
2005
HLDVT
https://doi.org/10.1109/HLDVT.2005.1568829
https://doi.ieeecomputersociety.org/10.1109/HLDVT.2005.1568829
conf/hldvt/2005
db/conf/hldvt/hldvt2005.html#PeranandamNWRKR05
Pradeep Kumar Nalla
Roland J. Weiss
Prakash Mohan Peranandam
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Distributed Symbolic Bounded Property Checking.
47-63
2005
conf/pdmc/2005
PDMC@ICALP
https://doi.org/10.1016/j.entcs.2005.10.018
db/conf/pdmc/pdmc2005.html#NallaWPRKR06
Jürgen Ruf
Roland J. Weiss
Thomas Kropf
Wolfgang Rosenstiel
Modeling and Formal Verification of Production Automation Systems.
541-566
https://doi.org/10.1007/978-3-540-27863-4_29
2004
conf/dfg/2004
SoftSpez Final Report
db/conf/dfg/softspez2004.html#RufWKR04
Prakash Mohan Peranandam
Roland J. Weiss
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Dynamic guiding of bounded property checking.
15-18
2004
HLDVT
https://doi.org/10.1109/HLDVT.2004.1431223
https://doi.ieeecomputersociety.org/10.1109/HLDVT.2004.1431223
conf/hldvt/2004
db/conf/hldvt/hldvt2004.html#PeranandamWRKR04
Prakash Mohan Peranandam
Roland J. Weiss
Jürgen Ruf
Thomas Kropf
Transactional Level Verification and Coverage Metrics by Means of Symbolic Simulation.
260-269
2004
MBMV
conf/mbmv/2004
db/conf/mbmv/mbmv2004.html#PeranandamWRK04
Jürgen Ruf
Thomas Kropf
Symbolic Verification and Analysis of Discrete Timed Systems.
67-108
2003
23
Formal Methods Syst. Des.
1
https://doi.org/10.1023/A:1024437214071
db/journals/fmsd/fmsd23.html#RufK03
Jürgen Ruf
Prakash Mohan Peranandam
Thomas Kropf
Wolfgang Rosenstiel
Using Symbolic Simulation for Bounded Property Checking.
374-385
2003
FDL
http://www.ecsi-association.org/ecsi/main.asp?l1=library&fn=def&id=818
conf/fdl/2003
db/conf/fdl/fdl2003.html#RufPKR03
Jürgen Ruf
Thomas Kropf
Formal Data Analysis of Timed Finite State Systems.
257-
2002
conf/ecrts/2002
ECRTS
https://doi.org/10.1109/EMRTS.2002.1019206
https://doi.ieeecomputersociety.org/10.1109/EMRTS.2002.1019206
db/conf/ecrts/ecrts2002.html#RufK02
Jürgen Ruf
Thomas Kropf
Jochen Klose
A Visual Approach to Validating System Level Designs.
186-191
2002
conf/isss/2002
ISSS
https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227175
https://doi.org/10.1145/581199.581240
db/conf/isss/isss2002.html#RufKK02
Jürgen Ruf
Thomas Kropf
Combination of Simulation and Formal Verification.
134-143
2002
MBMV
conf/mbmv/2002
db/conf/mbmv/mbmv2002.html#RufK02
Jürgen Ruf
Thomas Kropf
Formale Verifikation diskreter Echtzeitsysteme (Formal Verification of Discrete Real-Time Systems).
39-46
2001
43
Informationstechnik Tech. Inform.
1
https://doi.org/10.1524/itit.2001.43.1.39
db/journals/it/it43.html#RufK01
Jürgen Ruf
Dirk W. Hoffmann
Joachim Gerlach
Thomas Kropf
Wolfgang Rosenstiel
Wolfgang Müller 0003
The simulation semantics of systemC.
64-70
2001
conf/date/2001
DATE
https://doi.org/10.1109/DATE.2001.915002
https://doi.ieeecomputersociety.org/10.1109/DATE.2001.915002
http://dl.acm.org/citation.cfm?id=367091
db/conf/date/date2001.html#RufHGKRM01
Jürgen Ruf
Dirk W. Hoffmann
Thomas Kropf
Wolfgang Rosenstiel
Simulation-guided property checking based on a multi-valued AR-automata.
742-748
2001
conf/date/2001
DATE
https://doi.org/10.1109/DATE.2001.915111
https://doi.ieeecomputersociety.org/10.1109/DATE.2001.915111
http://dl.acm.org/citation.cfm?id=367936
db/conf/date/date2001.html#RufHKR01
Jürgen Ruf
Thomas Kropf
Analyzing Real-Time Systems.
243-248
2000
conf/date/2000
DATE
https://doi.org/10.1109/DATE.2000.840046
https://doi.ieeecomputersociety.org/10.1109/DATE.2000.840046
https://doi.org/10.1145/343647.343775
db/conf/date/date2000.html#RufK00
Dirk W. Hoffmann
Thomas Kropf
Exploiting Hierarchy for Multiple Error Correction in Combinational Circuits.
758
2000
conf/date/2000
DATE
https://doi.org/10.1109/DATE.2000.840891
https://doi.ieeecomputersociety.org/10.1109/DATE.2000.840891
https://doi.org/10.1145/343647.344346
db/conf/date/date2000.html#HoffmannK00
Dirk W. Hoffmann
Thomas Kropf
Can Automatic Design Error Correction be Applied to Large Circuits?
1114-1121
2000
conf/euromicro/2000
EUROMICRO
https://doi.org/10.1109/EURMIC.2000.874623
https://doi.ieeecomputersociety.org/10.1109/EURMIC.2000.874623
db/conf/euromicro/euromicro2000.html#HoffmannK00
Dirk W. Hoffmann
Jürgen Ruf
Thomas Kropf
Wolfgang Rosenstiel
Simulation Meets Verification: Checking Temporal Properties in SystemC.
1435-
2000
conf/euromicro/2000
EUROMICRO
https://doi.org/10.1109/EURMIC.2000.874664
https://doi.ieeecomputersociety.org/10.1109/EURMIC.2000.874664
db/conf/euromicro/euromicro2000.html#HoffmannRKR00
Jürgen Ruf
Dirk W. Hoffmann
Thomas Kropf
Wolfgang Rosenstiel
Checking temporal properties under simulation of executable system descriptions.
161-166
2000
HLDVT
https://doi.org/10.1109/HLDVT.2000.889578
https://doi.ieeecomputersociety.org/10.1109/HLDVT.2000.889578
conf/hldvt/2000
db/conf/hldvt/hldvt2000.html#RufHKR00
Dirk W. Hoffmann
Thomas Kropf
Efficient Design Error Correction of Digital Circuits.
465-472
2000
conf/iccd/2000
ICCD
https://doi.org/10.1109/ICCD.2000.878324
https://doi.ieeecomputersociety.org/10.1109/ICCD.2000.878324
db/conf/iccd/iccd2000.html#HoffmannK00
Thomas Kropf
Introduction to Formal Hardware Verification.
I-IX, 1-299
Springer
1999
978-3-540-65445-2
978-3-642-08477-5
978-3-662-03809-3
https://doi.org/10.1007/978-3-662-03809-3
Thomas Kropf
Joachim Gerlach
Jürgen Haufe
Mathias Kortke
Methodischer HW/SW-Entwurf des GSM Sprachtranscodec-Algorithmus.
46-50
1999
41
Informationstechnik Tech. Inform.
2
https://doi.org/10.1524/itit.1999.41.2.46
db/journals/it/it41.html#KropfGHK99
Dirk W. Hoffmann
Thomas Kropf
Automatic Error Correction of Large Circuits Using Boolean Decomposition and Abstraction.
157-171
https://doi.org/10.1007/3-540-48153-2_13
1999
conf/charme/1999
CHARME
db/conf/charme/charme1999.html#HoffmannK99
Jürgen Ruf
Thomas Kropf
Modleing and Checking Networks of Communicating Real-Time Process.
265-279
https://doi.org/10.1007/3-540-48153-2_20
1999
conf/charme/1999
CHARME
db/conf/charme/charme1999.html#RufK99
Michaela Huhn
Klaus Schneider 0001
Thomas Kropf
George Logothetis
Verifying Imprecisely Working Arithmetic Circuits.
65-
1999
conf/date/1999
DATE
https://doi.org/10.1109/DATE.1999.761098
https://doi.ieeecomputersociety.org/10.1109/DATE.1999.761098
https://doi.org/10.1145/307418.307451
db/conf/date/date1999.html#HuhnSKL99
Dirk W. Hoffmann
Thomas Kropf
Automatic Error Correction of Tri-State Circuits.
51-
1999
conf/iccd/1999
ICCD
https://doi.org/10.1109/ICCD.1999.808379
https://doi.ieeecomputersociety.org/10.1109/ICCD.1999.808379
db/conf/iccd/iccd1999.html#HoffmannK99
Jürgen Ruf
Thomas Kropf
Modeling Real-Time Systems with I/O-Interval Structures.
91-100
1999
MBMV
conf/mbmv/1999
db/conf/mbmv/mbmv1999.html#RufK99
Thomas Kropf
Recent Advancements in Hardware Verification - How to Make Theorem Proving Fit for an Industrial Usage.
1-4
1999
conf/tphol/1999
TPHOLs
https://doi.org/10.1007/3-540-48256-3_1
db/conf/tphol/tphol99.html#Kropf99
Laurence Pierre
Thomas Kropf
Correct Hardware Design and Verification Methods, 10th IFIP WG 10.5 Advanced Research Working Conference, CHARME '99, Bad Herrenalb, Germany, September 27-29, 1999, Proceedings
CHARME
Lecture Notes in Computer Science
1703
Springer
1999
3-540-66559-5
https://doi.org/10.1007/3-540-48153-2
db/conf/charme/charme1999.html
Werner Grass
Thomas Kropf
Matthias Mutz
Formale Methoden bei der Spezifikation von Hardware.
13-17
1998
40
Informationstechnik Tech. Inform.
3
https://doi.org/10.1524/itit.1998.40.3.13
db/journals/it/it40.html#GrassKM98
Ralf Reetz
Klaus Schneider 0001
Thomas Kropf
Formal Specification in VHDL for Hardware Verification.
257-263
1998
conf/date/1998
DATE
https://doi.org/10.1109/DATE.1998.655865
https://doi.ieeecomputersociety.org/10.1109/DATE.1998.655865
http://dl.acm.org/citation.cfm?id=368142
db/conf/date/date1998.html#ReetzSK98
Jürgen Ruf
Thomas Kropf
Using MTBDDs for Compostion and Model Checking of Real-Time Systems.
185-202
https://doi.org/10.1007/3-540-49519-3_13
1998
conf/fmcad/1998
FMCAD
db/conf/fmcad/fmcad1998.html#RufK98
Thomas Kropf
Jürgen Ruf
Klaus Schneider 0001
Markus Wild
A Synchronous Language for Modeling and Verifying Real Time and Embedded Systems.
11-20
1998
MBMV
conf/mbmv/1998
db/conf/mbmv/mbmv1998.html#KropfRSW98
Jürgen Ruf
Thomas Kropf
Symbolic model checking for a discrete clocked temporal logic with intervals.
146-163
1997
conf/charme/1997
CHARME
db/conf/charme/charme1997.html#RufK97
Thomas Kropf
Jürgen Ruf
Using MTBDDs for discrete timed symbolic model checking.
182-187
1997
ED&TC
https://doi.org/10.1109/EDTC.1997.582356
https://doi.ieeecomputersociety.org/10.1109/EDTC.1997.582356
https://dl.acm.org/doi/10.5555/787260.787662
conf/date/1997
db/conf/date/edtc1997.html#KropfR97
Klaus Schneider 0001
Thomas Kropf
The C@S System.
248-329
1997
conf/fhv/1997
Formal Hardware Verification
db/conf/fhv/fhv1997.html#SchneiderK97
https://doi.org/10.1007/3-540-63475-4_6
Thomas Kropf
Appendix: The Common Book Examples.
330-367
1997
conf/fhv/1997
Formal Hardware Verification
db/conf/fhv/fhv1997.html#Kropf97
https://doi.org/10.1007/3-540-63475-4_7
Jürgen Ruf
Thomas Kropf
A New Algorithm for Discrete Timed Symbolic Model Checking.
18-32
1997
conf/hybrid/1997hart
HART
db/conf/hybrid/hart97.html#RufK97
https://doi.org/10.1007/BFb0014710
Thomas Kropf
Formal Hardware Verification - Methods and Systems in Comparison
Formal Hardware Verification
Lecture Notes in Computer Science
1287
Springer
1997
3-540-63475-4
https://doi.org/10.1007/3-540-63475-4
db/conf/fhv/fhv1997.html
Jürgen Frößl
Thomas Kropf
Joachim Gerlach
An Efficient Algorithm for Real-Time Symbolic Model Checking.
15-21
1996
ED&TC
https://doi.org/10.1109/EDTC.1996.494120
https://doi.ieeecomputersociety.org/10.1109/EDTC.1996.494120
https://dl.acm.org/doi/10.5555/787259.787609
conf/date/1996
db/conf/date/edtc1996.html#FrosslKG96
Klaus Schneider 0001
Thomas Kropf
A Unified Approach for Combining Different Formalisms for Hardware Verification.
202-217
1996
conf/fmcad/1996
FMCAD
db/conf/fmcad/fmcad1996.html#SchneiderK96
https://doi.org/10.1007/BFb0031809
Oliver F. Haberl
Thomas Kropf
HIST: A hierarchical self test methodology for chips, boards, and systems.
85-106
1995
6
J. Electron. Test.
1
https://doi.org/10.1007/BF00993132
db/journals/et/et6.html#HaberlK95
Ralf Reetz
Thomas Kropf
A Flowgraph Semantics of VHDL: Toward a VHDL Verification Workbench in HOL.
73-99
1995
7
Formal Methods Syst. Des.
1/2
db/journals/fmsd/fmsd7.html#ReetzK95
https://doi.org/10.1007/BF01383874
Jürgen Frößl
Thomas Kropf
Verifying real-time properties of MOS-transistor circuits.
314-319
1995
ED&TC
https://doi.org/10.1109/EDTC.1995.470378
https://doi.ieeecomputersociety.org/10.1109/EDTC.1995.470378
https://dl.acm.org/doi/10.5555/787258.787458
conf/date/1995
db/conf/date/edtc1995.html#FrosslK95
Ramayya Kumar
Thomas Kropf
Klaus Schneider 0001
Formal synthesis of circuits with a simple handshake protocol.
255-259
1995
conf/vlsid/1995
VLSI Design
https://doi.org/10.1109/ICVD.1995.512119
https://doi.ieeecomputersociety.org/10.1109/ICVD.1995.512119
db/conf/vlsid/vlsid1995.html#KumarKS95
Klaus Schneider 0001
Ramayya Kumar
Thomas Kropf
Accelerating Tableaux Proofs Using Compact Representations.
145-176
1994
5
Formal Methods Syst. Des.
1/2
db/journals/fmsd/fmsd5.html#SchneiderKK94
https://doi.org/10.1007/BF01384237
Oliver F. Haberl
Thomas Kropf
Self Testable Boards with Standard IEEE 1149.5 Module Test and Maintenance (MTM) Bus Interface.
220-225
1994
conf/eurodac/1994edac
EDAC-ETC-EUROASIC
db/conf/eurodac/eurodac1994.html#HaberlK94
https://doi.org/10.1109/EDTC.1994.326874
Jürgen Frößl
Thomas Kropf
A New Model to Uniformly Represent the Function and Timing of MOS Circuits and its Application to VHDL Simulation.
343-348
1994
conf/eurodac/1994edac
EDAC-ETC-EUROASIC
db/conf/eurodac/eurodac1994.html#FrosslK94
https://doi.org/10.1109/EDTC.1994.326854
Klaus Schneider 0001
Thomas Kropf
Ramayya Kumar
Control Path Oriented Verification of Sequential Generic Circuits with Control and Data Path.
648-652
1994
conf/eurodac/1994edac
EDAC-ETC-EUROASIC
db/conf/eurodac/eurodac1994.html#SchneiderKK94
https://doi.org/10.1109/EDTC.1994.326809
Thomas Kropf
Benchmark-Circuits for Hardware-Verification.
1-12
1994
conf/tpcd/1994
TPCD
db/conf/tpcd/tpcd1994.html#Kropf94
https://doi.org/10.1007/3-540-59047-1_39
Thomas Kropf
Klaus Schneider 0001
Ramayya Kumar
A Formal Framework for High Level Synthesis.
223-238
1994
conf/tpcd/1994
TPCD
db/conf/tpcd/tpcd1994.html#KropfSK94
https://doi.org/10.1007/3-540-59047-1_51
Ralf Reetz
Thomas Kropf
Simplifying Deep Embedding: A Formalised Code Generator.
378-390
1994
conf/tphol/1994
TPHOLs
db/conf/tphol/tphol94.html#ReetzK94
https://doi.org/10.1007/3-540-58450-1_55
Klaus Schneider 0001
Ramayya Kumar
Thomas Kropf
Automating Verification by Functional Abstraction at the System Level.
391-406
1994
conf/tphol/1994
TPHOLs
db/conf/tphol/tphol94.html#SchneiderKK94
https://doi.org/10.1007/3-540-58450-1_56
Ramayya Kumar
Thomas Kropf
Theorem Provers in Circuit Design - Theory, Practice and Experience, Second International Conference, TPCD '94, Bad Herrenalb, Germany, September 26-28, 1994, Proceedings
TPCD
Lecture Notes in Computer Science
901
Springer
1994
3-540-59047-1
https://doi.org/10.1007/3-540-59047-1
db/conf/tpcd/tpcd1994.html
Thomas Kropf
Ein einheitlicher Ansatz zur Verifikation und Testerzeugung für digitale Schaltungen mit temporaler Logik.
1993
1-147
VDI-Verlag
Karlsruhe Institute of Technology, Germany
978-3-18-147409-9
https://d-nb.info/940324733
https://publikationen.bibliothek.kit.edu/48993
https://www.base-search.net/Record/df0af19f3bb81642514e6da470351bbf761ea9bd51c3a061a386c717629db451
Ramayya Kumar
Klaus Schneider 0001
Thomas Kropf
Structuring and Automating Hardware Proofs in a Higher-Order Theorem-Proving Environment.
165-223
1993
2
Formal Methods Syst. Des.
2
db/journals/fmsd/fmsd2.html#KumarSK93
https://doi.org/10.1007/BF01383880
Thomas Kropf
Ramayya Kumar
Klaus Schneider 0001
Embedding Hardware Verification Within a Commercial Design Framework.
242-257
1993
conf/charme/1993
CHARME
db/conf/charme/charme1993.html#KropfKS93
https://doi.org/10.1007/BFb0021728
Klaus Schneider 0001
Ramayya Kumar
Thomas Kropf
Hardware-Verification using First Order BDDs.
45-62
1993
conf/chdl/1993
CHDL
db/conf/chdl/chdl1993.html#SchneiderKK93
Klaus Schneider 0001
Ramayya Kumar
Thomas Kropf
Alternative Proof Procedures for Finite-State Machines in Higher-Order Logic.
213-226
1993
conf/tphol/1993
HUG
db/conf/tphol/tphol93.html#SchneiderKK93
https://doi.org/10.1007/3-540-57826-9_137
Klaus Schneider 0001
Ramayya Kumar
Thomas Kropf
Eliminating Higher-Order Quantifiers to Obtain Decision Procedures for Hardware Verification.
385-398
1993
conf/tphol/1993
HUG
db/conf/tphol/tphol93.html#SchneiderKK93a
https://doi.org/10.1007/3-540-57826-9_150
Klaus Schneider 0001
Ramayya Kumar
Thomas Kropf
The FAUST - Prover.
766-770
1992
conf/cade/1992
CADE
db/conf/cade/cade92.html#SchneiderKK92
https://doi.org/10.1007/3-540-55602-8_221
Oliver F. Haberl
Thomas Kropf
A chip solution to hierarchical and boundary-scan compatible board level BIST.
16-21
1992
Great Lakes Symposium on VLSI
https://doi.org/10.1109/GLSV.1992.218370
conf/glvlsi/1992
db/conf/glvlsi/glvlsi1992.html#HaberlK92
Oliver F. Haberl
Thomas Kropf
HIST: A Methodology for the Automatic Insertion of a Hierarchical Self Test.
732-741
1992
conf/itc/1992
ITC
db/conf/itc/itc1992.html#HaberlK92
https://doi.org/10.1109/TEST.1992.527895
https://doi.ieeecomputersociety.org/10.1109/TEST.1992.527895
Klaus Schneider 0001
Ramayya Kumar
Thomas Kropf
Efficient Representation and Computation of Tableau Proofs.
39-57
1992
conf/tphol/1992
TPHOLs
db/conf/tphol/tphol92.html#SchneiderKK92
Klaus Schneider 0001
Ramayya Kumar
Thomas Kropf
Modelling Generic Hardware Structures by Abstract Datatypes.
165-175
1992
conf/tphol/1992
TPHOLs
db/conf/tphol/tphol92.html#SchneiderKK92a
Oliver F. Haberl
Thomas Kropf
A methodology for the insertion of a hierarchical and boundary-scan compatible self test.
37-42
1992
VTS
https://doi.org/10.1109/VTEST.1992.232721
https://doi.ieeecomputersociety.org/10.1109/VTEST.1992.232721
conf/vts/1992
db/conf/vts/vts1992.html#HaberlK92
Klaus Schneider 0001
Ramayya Kumar
Thomas Kropf
Automating Most Parts of Hardware Proofs in HOL.
365-375
1991
conf/cav/1991
CAV
db/conf/cav/cav91.html#SchneiderKK91
https://doi.org/10.1007/3-540-55179-4_35
Thomas Kropf
Hans-Joachim Wunderlich
A Common Approach to Test Generation and Hardware Verification Based on Temporal Logic.
57-66
1991
conf/itc/1991
ITC
db/conf/itc/itc1991.html#KropfW91
https://doi.org/10.1109/TEST.1991.519494
https://doi.ieeecomputersociety.org/10.1109/TEST.1991.519494
Ramayya Kumar
Thomas Kropf
Klaus Schneider 0001
Integrating a First-Order Automatic Prover in the HOL Environment.
170-176
1991
conf/tphol/1991
TPHOLs
db/conf/tphol/tphol1991.html#KumarKS91
Ramayya Kumar
Thomas Kropf
Klaus Schneider 0001
First Steps Towards Automating Hardware Proofs in HOL.
190-193
1991
conf/tphol/1991
TPHOLs
db/conf/tphol/tphol1991.html#KumarKS91a
Klaus Schneider 0001
Ramayya Kumar
Thomas Kropf
Structure in Hardware Proofs: First Steps Towards Automation in a Higher-Order Environment.
81-90
1991
conf/vlsi/1991
VLSI
db/conf/vlsi/vlsi1991.html#SchneiderKK91
Thomas Kropf
Jürgen Frößl
W. Beller
T. Giesler
A hardware implementation of a modified DES-algorithm.
59-65
1990
30
Microprocessing and Microprogramming
1-5
https://doi.org/10.1016/0165-6074(90)90218-X
db/journals/jsa/jsa30.html#KropfFBG90
Jörg Behrend
W. Beller
Christian Bräuchle
Axel G. Braun
Oliver Bringmann 0001
Sebastian Burg
Rafael Capilla
Paul Duplys
Hanno Eichelberger
Wolfgang Fengler 0001
Folko Flehmig
Jürgen Frößl
Joachim Gerlach
T. Giesler
Thomas Gorges
Werner Grass
Thomas Greiner
Alexander Grünhage
Oliver F. Haberl
Herman Hartmann
Jürgen Haufe
Patrick Heckeler
Lars Hedrich
Dirk W. Hoffmann
Michaela Huhn
Stefan Huster
Alexander Jesser
Tobias Kirsten
Jochen Klose
Mathias Kortke
Ramayya Kumar
Stefan Lämmermann
Jo Laufenberg
Djones Lettnin
George Logothetis
Merdin Macic
Kim Mens
Florian Merz 0001
Wolfgang Müller 0003
Matthias Mutz
Pradeep Kumar Nalla
Alexander Pacholik
Prakash Mohan Peranandam
Laurence Pierre
Hendrik Post
Ralf Reetz
Stephan Reitemeyer
Sebastian Reiter 0003
Wolfgang Rosenstiel
Jürgen Ruf
Bastian Schlich
Klaus Schneider 0001
Volker Schönknecht
Douglas Schroeder
Carsten Sinz
Jonas Ströbele
Susanne Throner
Alexander Viehl
Roland J. WeissRoland Weiss
Markus Wild
Markus Winterholer
Hans-Joachim Wunderlich