Jooheung Lee
Hyeonjun Shin
Jooheung Lee
Hardware Multi-Threaded System for High-Performance JPEG Decoding.
67-79
2024
January
96
J. Signal Process. Syst.
1
https://doi.org/10.1007/s11265-023-01902-7
db/journals/vlsisp/vlsisp96.html#ShinL24
Iljung Yoon
Anand Paul 0001
Jooheung Lee
Medical Development Platform Using ZyCAP-Based Partial Reconfiguration on ZynqSoC.
365-371
2017
23
Intell. Autom. Soft Comput.
2
https://doi.org/10.1080/10798587.2016.1231478
db/journals/iasc/iasc23.html#YoonPL17
Jooheung Lee
Energy efficient processing of motion estimation for embedded multimedia systems.
24749-24765
2017
76
Multim. Tools Appl.
23
https://doi.org/10.1007/s11042-017-4645-6
db/journals/mta/mta76.html#Lee17a
Hyeonggyu Kim
Soontae Kim
Jooheung Lee
Write-Amount-Aware Management Policies for STT-RAM Caches.
1588-1592
2017
25
IEEE Trans. Very Large Scale Integr. Syst.
4
https://doi.org/10.1109/TVLSI.2016.2620168
http://doi.ieeecomputersociety.org/10.1109/TVLSI.2016.2620168
db/journals/tvlsi/tvlsi25.html#KimKL17
Iljung Yoon
Heewon Joung
Jooheung Lee
Zynq-Based Reconfigurable System for Real-Time Edge Detection of Noisy Video Sequences.
2654059:1-2654059:9
2016
2016
J. Sensors
https://doi.org/10.1155/2016/2654059
https://www.wikidata.org/entity/Q59129630
db/journals/js/js2016.html#YoonJL16
Naveed Imran
Rizwan A. Ashraf
Jooheung Lee
Ronald F. DeMara
Activity-Based Resource Allocation for Motion Estimation Engines.
2015
24
J. Circuits Syst. Comput.
1
https://doi.org/10.1142/S0218126615500048
https://www.wikidata.org/entity/Q58225985
db/journals/jcsc/jcsc24.html#ImranALD15
1550004:1-1550004:32
Naveed Imran
Ronald F. DeMara
Jooheung Lee
Jian Huang
Self-Adapting Resource Escalation for Resilient Signal Processing Architectures.
257-280
2014
77
J. Signal Process. Syst.
3
https://doi.org/10.1007/s11265-013-0811-x
db/journals/vlsisp/vlsisp77.html#ImranDLH14
Naveed Imran
Jooheung Lee
Ronald F. DeMara
Fault Demotion Using Reconfigurable Slack (FaDReS).
1364-1368
2013
21
IEEE Trans. Very Large Scale Integr. Syst.
7
https://doi.org/10.1109/TVLSI.2012.2206836
db/journals/tvlsi/tvlsi21.html#ImranLD13
Junsang Cho
Jungwook Suh
Gwanggil Jeon
Jooheung Lee
Jechang Jeong
Error surface-aware modeling algorithm for quarter-pixel motion estimation.
912-916
2012
58
IEEE Trans. Consumer Electron.
3
https://doi.org/10.1109/TCE.2012.6311336
db/journals/tce/tce58.html#ChoSJLJ12
Rakan Khraisha
Jooheung Lee
A Bit-Rate Aware Scalable H.264/AVC Deblocking Filter Using Dynamic Partial Reconfiguration.
225-234
2012
66
J. Signal Process. Syst.
3
https://doi.org/10.1007/s11265-011-0584-z
db/journals/vlsisp/vlsisp66.html#KhraishaL12
Jian Huang
Jooheung Lee
Reconfigurable Architecture for ZQDCT Using Computational Complexity Prediction and Bitstream Relocation.
1-4
2011
3
IEEE Embed. Syst. Lett.
1
https://doi.org/10.1109/LES.2010.2080660
db/journals/esl/esl3.html#HuangL11
Ronald F. DeMara
Jooheung Lee
Rawad N. Al-Haddad
Rashad S. Oreifej
Rizwan A. Ashraf
Brian Stensrud
Michael Quist
Dynamic Partial Reconfiguration Approach to the Design of Sustainable Edge Detectors.
49-58
2010
ERSA
conf/ersa/2010
db/conf/ersa/ersa2010.html#DeMaraLAOASQ10
Rakan Khraisha
Jooheung Lee
A scalable H.264/AVC deblocking filter architecture using dynamic partial reconfiguration.
1566-1569
2010
ICASSP
https://doi.org/10.1109/ICASSP.2010.5495525
conf/icassp/2010
db/conf/icassp/icassp2010.html#KhraishaL10
Toomas P. Plaks
David Andrews 0001
Ronald F. DeMara
Herman Lam
Jooheung Lee
Christian Plessl
Greg Stitt
Proceedings of the 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA 2010, July 12-15, 2010, Las Vegas Nevada, USA
1-60132-140-6
2010
ERSA
CSREA Press
db/conf/ersa/ersa2010.html
Jian Huang
Jooheung Lee
Efficient VLSI architecture for video transcoding.
1462-1470
2009
55
IEEE Trans. Consumer Electron.
3
https://doi.org/10.1109/TCE.2009.5278014
db/journals/tce/tce55.html#HuangL09
Jian Huang
Jooheung Lee
A Self-Reconfigurable Platform for Scalable DCT Computation Using Compressed Partial Bitstreams and BlockRAM Prefetching.
1623-1632
2009
19
IEEE Trans. Circuits Syst. Video Technol.
11
https://doi.org/10.1109/TCSVT.2009.2031464
db/journals/tcsv/tcsv19.html#HuangL09
Jian Huang
Matthew Parris
Jooheung Lee
Ronald F. DeMara
Scalable FPGA-based architecture for DCT computation using dynamic partial reconfiguration.
2009
9
ACM Trans. Embed. Comput. Syst.
1
https://doi.org/10.1145/1596532.1596541
db/journals/tecs/tecs9.html#HuangPLD09
9:1-9:18
Sumedha Gupta Kodipyaka
Jooheung Lee
A Scalable H.264/AVC Variable Block Size Motion Estimation Engine Using Partial Reconfiguration.
219-225
2009
ERSA
conf/ersa/2009
db/conf/ersa/ersa2009.html#KodipyakaL09
Jian Huang
Jooheung Lee
A Self-Reconfigurable Platform for Scalable DCT Computation Using Compressed Partial Bitstreams and BlockRAM Prefetching.
67-72
2009
ISVLSI
https://doi.org/10.1109/ISVLSI.2009.29
https://doi.ieeecomputersociety.org/10.1109/ISVLSI.2009.29
conf/isvlsi/2009
db/conf/isvlsi/isvlsi2009.html#HuangL09
Jian Huang
Jooheung Lee
Hao Li
A Fast FPGA Implementation of Tate Pairing in Cryptography over Binary Field.
3-9
2008
Security and Management
conf/csreaSAM/2008
db/conf/csreaSAM/csreaSAM2008.html#HuangLL08
Jian Huang
Matthew Parris
Jooheung Lee
Ronald F. DeMara
Scalable FPGA Architecture for DCT Computation Using Dynamic Partial Reconfiguration.
269-272
2008
ERSA
conf/ersa/2008
db/conf/ersa/ersa2008.html#HuangPLD08
Yidong Liu
Srinivasan Santhanam
Jooheung Lee
Performance Evaluation of FPGA-based Hardware Accelerator: A Case Study.
313-314
2008
ERSA
conf/ersa/2008
db/conf/ersa/ersa2008.html#LiuSL08
Jooheung Lee
Narayanan Vijaykrishnan
Mary Jane Irwin
Wayne H. Wolf
An efficient architecture for motion estimation and compensation in the transform domain.
191-201
2006
16
IEEE Trans. Circuits Syst. Video Technol.
2
https://doi.org/10.1109/TCSVT.2005.857780
db/journals/tcsv/tcsv16.html#LeeVIW06
Jooheung Lee
Narayanan Vijaykrishnan
Mary Jane Irwin
Inverse discrete cosine transform architecture exploiting sparseness and symmetry properties.
655-662
2006
16
IEEE Trans. Circuits Syst. Video Technol.
5
https://doi.org/10.1109/TCSVT.2006.873155
db/journals/tcsv/tcsv16.html#LeeVI06
Jooheung Lee
Narayanan Vijaykrishnan
Mary Jane Irwin
Rajarathnam Chandramouli
Block-based frequency scalable technique for efficient hierarchical coding.
2559-2566
2006
54
IEEE Trans. Signal Process.
7
https://doi.org/10.1109/TSP.2006.874806
db/journals/tsp/tsp54.html#LeeVIC06
Jooheung Lee
Narayanan Vijaykrishnan
Mary Jane Irwin
High Performance Array Processor for Video Decoding.
28-33
2005
conf/isvlsi/2005
ISVLSI
https://doi.org/10.1109/ISVLSI.2005.36
https://doi.ieeecomputersociety.org/10.1109/ISVLSI.2005.36
db/conf/isvlsi/isvlsi2005.html#LeeVI05
Jooheung Lee
Narayanan Vijaykrishnan
Mary Jane Irwin
Efficient VLSI implementation of inverse discrete cosine transform [image coding applications].
177-180
2004
ICASSP (5)
https://doi.org/10.1109/ICASSP.2004.1327076
conf/icassp/2004
db/conf/icassp/icassp2004.html#LeeVI04
Jooheung Lee
Narayanan Vijaykrishnan
Mary Jane Irwin
Wayne H. Wolf
An Architecture for Motion Estimation in the Transform Domain.
1077-1082
2004
conf/vlsid/2004
VLSI Design
https://doi.org/10.1109/ICVD.2004.1261072
https://doi.ieeecomputersociety.org/10.1109/ICVD.2004.1261072
db/conf/vlsid/vlsid2004.html#LeeVIW04
Rawad N. Al-Haddad
David Andrews 0001
Rizwan A. Ashraf
Rajarathnam Chandramouli
Junsang Cho
Ronald F. DeMara
Jian Huang
Naveed Imran
Mary Jane Irwin
Gwanggil Jeon
Jechang Jeong
Heewon Joung
Rakan Khraisha
Hyeonggyu Kim
Soontae Kim
Sumedha Gupta Kodipyaka
Herman Lam
Hao Li
Yidong Liu
Rashad S. Oreifej
Matthew Parris
Anand Paul 0001
Toomas P. Plaks
Christian Plessl
Michael Quist
Srinivasan Santhanam
Hyeonjun Shin
Brian Stensrud
Greg Stitt
Jungwook Suh
Narayanan Vijaykrishnan
Marilyn WolfWayne H. Wolf
Iljung Yoon