Renji Thomas
Renji Thomas
Kristin Barber
Naser Sedaghati
Li Zhou
Radu Teodorescu
Core tunneling: Variation-aware voltage noise mitigation in GPUs.
151-162
2016
HPCA
https://doi.org/10.1109/HPCA.2016.7446061
https://doi.ieeecomputersociety.org/10.1109/HPCA.2016.7446061
conf/hpca/2016
db/conf/hpca/hpca2016.html#ThomasBSZT16
Renji Thomas
Naser Sedaghati
Radu Teodorescu
EmerGPU: Understanding and mitigating resonance-induced voltage noise in GPU architectures.
79-89
2016
ISPASS
https://doi.org/10.1109/ISPASS.2016.7482076
https://doi.ieeecomputersociety.org/10.1109/ISPASS.2016.7482076
conf/ispass/2016
db/conf/ispass/ispass2016.html#ThomasST16
Dimitrios Skarlatos 0002
Renji Thomas
Aditya Agrawal
Shibin Qin
Robert C. N. Pilawa-Podgurski
Ulya R. Karpuzcu
Radu Teodorescu
Nam Sung Kim
Josep Torrellas
Snatch: Opportunistically reassigning power allocation between processor and memory in 3D stacks.
54:1-54:12
2016
MICRO
https://doi.org/10.1109/MICRO.2016.7783757
https://doi.ieeecomputersociety.org/10.1109/MICRO.2016.7783757
http://dl.acm.org/citation.cfm?id=3195704
conf/micro/2016
db/conf/micro/micro2016.html#SkarlatosTAQPKT16
Timothy N. Miller
Renji Thomas
Radu Teodorescu
Mitigating the Effects of Process Variation in Ultra-low Voltage Chip Multiprocessors using Dual Supply Voltages and Half-Speed Units.
45-48
2012
11
IEEE Comput. Archit. Lett.
2
https://doi.org/10.1109/L-CA.2011.36
http://doi.ieeecomputersociety.org/10.1109/L-CA.2011.36
db/journals/cal/cal11.html#MillerTT12
Timothy N. Miller
Xiang Pan
Renji Thomas
Naser Sedaghati
Radu Teodorescu
Booster: Reactive core acceleration for mitigating the effects of process variation and application imbalance in low-voltage chips.
27-38
2012
HPCA
https://doi.org/10.1109/HPCA.2012.6168942
https://doi.ieeecomputersociety.org/10.1109/HPCA.2012.6168942
conf/hpca/2012
db/conf/hpca/hpca2012.html#MillerPTST12
Timothy N. Miller
Renji Thomas
Xiang Pan
Radu Teodorescu
VRSync: Characterizing and eliminating synchronization-induced voltage emergencies in many-core processors.
249-260
2012
ISCA
https://doi.org/10.1109/ISCA.2012.6237022
https://doi.ieeecomputersociety.org/10.1109/ISCA.2012.6237022
http://dl.acm.org/citation.cfm?id=2337188
conf/isca/2012
db/conf/isca/isca2012.html#MillerTPT12
Naser Sedaghati
Renji Thomas
Louis-Noël Pouchet
Radu Teodorescu
P. Sadayappan
StVEC: A Vector Instruction Extension for High Performance Stencil Computation.
276-287
2011
PACT
https://doi.org/10.1109/PACT.2011.59
https://doi.ieeecomputersociety.org/10.1109/PACT.2011.59
conf/IEEEpact/2011
db/conf/IEEEpact/pact2011.html#SedaghatiTPTS11
Timothy N. Miller
Renji Thomas
James Dinan
Bruce M. Adcock
Radu Teodorescu
Parichute: Generalized Turbocode-Based Error Correction for Near-Threshold Caches.
351-362
2010
MICRO
https://doi.org/10.1109/MICRO.2010.28
https://doi.ieeecomputersociety.org/10.1109/MICRO.2010.28
http://dl.acm.org/citation.cfm?id=1934981
conf/micro/2010
db/conf/micro/micro2010.html#MillerTDAT10
Bruce M. Adcock
Aditya Agrawal
Kristin Barber
James Dinan
Ulya R. Karpuzcu
Nam Sung Kim
Timothy N. Miller
Xiang Pan
Robert C. N. Pilawa-Podgurski
Louis-Noël Pouchet
Shibin Qin
P. Sadayappan
Naser Sedaghati
Dimitrios Skarlatos 0002
Radu Teodorescu
Josep Torrellas
Li Zhou